1580-V–40-$hbox{m}Omegacdot hbox{cm}^{2}$ Double-RESURF MOSFETs on 4H-SiC $(hbox{000}bar{hbox{1}})$

Double-reduced-surface-field (RESURF) MOSFETs with $hbox{N}_{2}hbox{O}$ -grown oxides have been fabricated on the 4H-SiC $(hbox{000} bar{hbox{1}})$ face. The double-RESURF structure is effective in reducing the drift resistance, as well as in increasing the breakdown voltage. In addition, by utilizing the 4H-SiC $(hbox{000}bar{hbox{1}})$ face, the channel mobility can be increased to over 30 $hbox{cm}^{2}/hbox{V}cdothbox{s}$, and hence, the channel resistance is decreased. As a result, the fabricated MOSFETs on 4H-SiC $( hbox{000}bar{hbox{1}})$ have demonstrated a high breakdown voltage $(V_{B})$ of 1580 V and a low on-resistance $(R_{rm ON})$ of 40 $hbox{m}Omega cdothbox{cm}^{2}$. The figure-of-merit $(V_{B}^{2}/R_{rm ON})$ of the fabricated device has reached 62 $hbox{MW/cm}^{2}$, which is the highest value among any lateral MOSFETs and is more than ten times higher than the “Si limit.”      

Performance Improvement of N-Type $hbox{TiO}_{x}$ Active-Channel TFTs Grown by Low-Temperature Plasma-Enhanced ALD

We report on performance improvement of $n$-type oxide–semiconductor thin-film transistors (TFTs) based on $hbox{TiO}_{x}$ active channels grown at 250 $^{circ}hbox{C}$ by plasma-enhanced atomic layer deposition. TFTs with as-grown $hbox{TiO}_{x}$ films exhibited the saturation mobility $(mu_{rm sat})$ as high as 3.2 $hbox{cm}^{2}/hbox{V}cdothbox{s}$ but suffered from the low on–off ratio $(I_{rm ON}/I_{rm OFF})$ of $hbox{2.0} times hbox{10}^{2}$. $hbox{N}_{2}hbox{O}$ plasma treatment was then attempted to improve $I_{rm ON}/I_{rm OFF}$. Upon treatment, the $hbox{TiO}_{x}$ TFTs exhibited $I_{rm ON}/I_{rm OFF}$ of $hbox{4.7} times hbox{10}^{5}$ and $mu_{rm sat}$ of 1.64 $hbox{cm}^{2}/hbox{V}cdothbox{s}$, showing a much improved performance balance and, thus, demonstrating their potentials for a wide variety of applications such as backplane technology in active-matrix displays and radio-frequency identification tags.      

Improved Microwave Noise Performance by SiN Passivation in AlGaN/GaN HEMTs on Si

Effects of silicon nitride (SiN) surface passivation by plasma enhanced chemical vapor deposition (PECVD) on microwave noise characteristics of AlGaN/GaN HEMTs on high-resistivity silicon (HR-Si) substrate have been investigated. About 25% improvement in the minimum noise figure $(NF_{min})$ (0.52 dB, from 2.03 dB to 1.51 dB) and 10% in the associate gain $(G_{rm a})$ (1.0 dB, from 10.3 dB to 11.3 dB) were observed after passivation. The equivalent circuit parameters and noise source parameters (including channel noise coefficient $(P)$, gate noise coefficient $(R)$, and their correlation coefficient $(C)$ ) were extracted. $P$ , $R$ and $C$ all increased after passivation and the increase of C contributes to the decrease of the noise figure. It was found that the improved microwave small signal and noise performance is mainly due to the increase of the intrinsic transconductance $(g_{{rm m}0})$ and the decrease of the extrinsic source resistance $(R_{rm s})$.      

Performance Mapping of Multijunction Solar Cells Based on Electroluminescence

Electroluminescence intensity maps of all three subcells of space grade III–V multijunction cells were obtained with the help of dedicated imaging sensors at a range of different injection currents. Solely based on these data, making use of the homogeneity of one subcell, the local diode properties of an equivalent single junction cell were obtained and converted into spatial distributions of open circuit voltage $(V_{rm oc})$ and current at a fixed operating voltage $(I_{rm op})$. On a sample basis of more than 200 cells, $V_{rm oc}$ and $I_{rm op}$ characterizing the entire cell were determined with an accuracy of $pm$3 mV and $pm$5 mA, respectively.      

A 3–10 GHz CMOS UWB Low-Noise Amplifier With ESD Protection Circuits

A low-power fully integrated low-noise amplifier (LNA) with an on-chip electrostatic-static discharge (ESD) protection circuit for ultra-wide band (UWB) applications is presented. With the use of a common-gate scheme with a ${rm g}_{rm m}$ -boosted technique, a simple input matching network, low noise figure (NF), and low power consumption can be achieved. Through the combination of an input matching network, an ESD clamp circuit has been designed for the proposed LNA circuit to enhance system robustness. The measured results show that the fabricated LNA can be operated over the full UWB bandwidth of 3.0 to 10.35 GHz. The input return loss $({rm S}_{11})$ and output return loss $({rm S}_{22})$ are less than ${-}8.3$ dB and ${-}9$ dB, respectively. The measured power gain $({rm S}_{21})$ is $11 pm 1.5$ dB, and the measured minimum NF is 3.3 dB at 4 GHz. The dc power dissipation is 7.2 mW from a 1.2 V supply. The chip area, including testing pads, is 1.05 mm$,times,$ 0.73 mm.      

A Linearization Technique for RF Receiver Front-End Using Second-Order-Intermodulation Injection

A linearization technique is proposed in which low-frequency second-order-intermodulation $({rm IM}_{2})$ is generated and injected to suppress the third-order intermodulation $({rm IM}_{3})$. The proposed linearization technique is applied to both a low-noise amplifier (LNA) and a down-conversion mixer in an RF receiver front-end (RFE) working at 900 MHz. Fabricated in a 0.18$ mu{hbox{m}}$ CMOS process and operated at 1.5 V supply with a total current of 13.1 mA, the RFE delivers 22 dB gain with 5.3 dB noise figure (NF). The linearization technique achieves around 20 dB ${rm IM}_{3}$ suppression and improves the RFE's ${rm IIP}_{3}$ from $-$ 10.4 dBm to 0.2 dBm without gain reduction and noise penalty while requiring only an extra current of 0.1 mA.      

Photosensitive Inverter and Ring Oscillator With Pseudodepletion Mode Load for LCD Applications

Photosensitive inverters and ring oscillators (ROs) with pseudodepletion mode loads (PDMLs) were integrated in LCD panels using conventional mass production processes. The delay time $(t_{rm pd})$ of five-stage ROs with PDML reduced from 204.3 $mu hbox{s}$ under dark to 16.3 $muhbox{s}$ under backlight illumination of 20 000 lx. The oscillation frequency exhibited a power-law dependence $(f_{rm osc} infty hbox{IL}^{gamma})$ on the backlight illuminance with the extracted fitting parameter $gamma = hbox{0.447}$ at room temperature.      

Electrical Instability of RF Sputter Amorphous In-Ga-Zn-O Thin-Film Transistors

Bias-temperature-stress (BTS) induced electrical instability of the RF sputter amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) was investigated. Both positive and negative BTS were applied and found to primarily cause a positive and negative voltage shift in transfer $(I _{rm DS} -V _{rm GS})$ characteristics, respectively. The time evolution of bulk-state density $(N _{rm BS})$ and characteristic temperature of the conduction-band-tail-states $(T _{G})$ are extracted. Since both values showed only minor changes after BTS, the results imply that observed shift in TFT $I _{rm DS} -V _{rm GS}$ curves were primarily due to channel charge injection/trapping rather than defect states creation. We also demonstrated the validity of using stretch-exponential equation to model both positive and negative BTS induced threshold voltage shift $(Delta V _{rm th})$ of the a-IGZO TFTs. Stress voltage and temperature dependence of $Delta V _{rm th}$ evolution are described.      

The Impact of Oxide Traps Induced by SOI Thickness on Reliability of Fully Silicide Metal-Gate Strained SOI MOSFET

In this letter, we investigate the effects of oxide traps induced by various silicon-on-insulator (SOI) thicknesses $({T}_{rm SOI})$ on the performance and reliability of a strained SOI MOSFET with SiN-capped contact etch stop layer (CESL). Compared to the thicker ${T}_{rm SOI}$ device, the thinner ${T}_{rm SOI}$ device with high-strain CESL possesses a higher interface trap $({N}_{rm it})$ density, leading to degradation in the device performance. On the other hand, however, the thicker ${T}_{rm SOI}$ device reveals inferior gate oxide reliability. From low-frequency noise analysis, we found that thicker ${T}_{rm SOI}$ has a higher bulk oxide trap $({N}_{rm BOT})$ density, which is induced by larger strain in the gate oxide film and is mainly responsible for the inferior TDDB reliability. Presumably, the gate oxide film is bended up and down for the p- and nMOSFETs, respectively, by the net stress in thicker ${T}_{rm SOI}$ devices in this strain technology.      

Schottky Barrier Height Modulation of Nickel–Dysprosium-Alloy Germanosilicide Contacts for Strained P-FinFETs

This letter reports on the fabrication and hole Schottky barrier $(Phi_{ rm B}^{rm p})$ modulation of a novel nickel (Ni)–dysprosium (Dy)-alloy germanosilicide (NiDySiGe) on silicon–germanium (SiGe). Aluminum (Al) implant is utilized to lower the $Phi_{rm B}^{rm p}$ of NiDySiGe from $sim$0.5 to $sim$ 0.12 eV, with a correspondingly increasing Al dose in the range of $ hbox{0}$–$hbox{2}timeshbox{10}^{15} hbox{atoms}/ hbox{cm}^{2}$. When integrated as the contact silicide in p-FinFETs (with SiGe source/drain), NiDySiGe with an Al implant dose of $hbox{2}timeshbox{10}^{14} hbox{atoms}/ hbox{cm}^{2}$ leads to 32% enhancement in $I_{rm DSAT}$ over p-FinFETs with conventional NiSiGe contacts. Ni–Dy-alloy silicide is a promising single silicide solution for series-resistance reduction in CMOS FinFETs.      

Q-Band pHEMT and mHEMT Subharmonic Gilbert Upconversion Mixers

This letter makes a comparison between Q-band 0.15 $mu{rm m}$ pseudomorphic high electron mobility transistor (pHEMT) and metamorphic high electron mobility transistor (mHEMT) stacked-LO subharmonic upconversion mixers in terms of gain, isolation and linearity. In general, a 0.15 $mu{rm m}$ mHEMT device has a higher transconductance and cutoff frequency than a 0.15 $mu{rm m}$ pHEMT does. Thus, the conversion gain of the mHEMT is higher than that of the pHEMT in the active Gilbert mixer design. The Q-band stacked-LO subharmonic upconversion mixers using the pHEMT and mHEMT technologies have conversion gain of $-$7.1 dB and $-$0.2 dB, respectively. The pHEMT upconversion mixer has an ${rm OIP}_{3}$ of $-$12 dBm and an ${rm OP}_{1 {rm dB}}$ of $-$24 dBm, while the mHEMT one shows a 4 dB improvement on linearity for the difference between the ${rm OIP}_{3}$ and ${rm OP}_{1 {rm dB}}$. Both the chip sizes are the same at 1.3 mm $times$ 0.9 mm.      

An Analytical Method to Extract the Physical Parameters of a Solar Cell From Four Points on the Illuminated $J{-}V$ Curve

For a variety of solar cells, it is shown that the single exponential $J{-}V$ model parameters, namely—ideality factor $eta$ , parasitic series resistance $R_{s}$, parasitic shunt resistance $R_{rm sh}$, dark current $J_{0}$, and photogenerated current $J_{rm ph}$ can be extracted simultaneously from just four simple measurements of the bias points corresponding to $V_{rm oc}$, $sim!hbox{0.6}V_{rm oc}$, $J_{rm sc}$, and $sim! hbox{0.6}J_{rm sc}$ on the illuminated $J{-}V$ curve, using closed-form expressions. The extraction method avoids the measurements of the peak power point and any $dJ/dV$ (i.e., slope). The method is based on the power law $J{-}V$ model proposed recently by us.      

Integrated Hydrogen-Sensing Amplifier With GaAs Schottky-Type Diode and InGaP–GaAs Heterojunction Bipolar Transistor

New hydrogen-sensing amplifiers are fabricated by integrating a GaAs Schottky-type hydrogen sensor and an InGaP–GaAs heterojunction bipolar transistor. Sensing collector currents ( $I_{rm CN}$ and $I_{rm CH}$) reflecting to $hbox{N}_{2}$ and hydrogen-containing gases are employed as output signals in common-emitter characteristics. Gummel-plot sensing characteristics with testing gases as inputs show a high sensing-collector-current gain $(I_{rm CH}/I_{rm CN})$ of $≫hbox{3000}$. When operating in standby mode for in situ long-term detection, power consumption is smaller than 0.4 $muhbox{W}$. Furthermore, the room-temperature response time is 85 s for the integrated hydrogen-sensing amplifier fabricated with a bipolar-type structure.      

A 0.55 V 60 dB-DR Fourth-Order Analog Baseband Filter

A 0.55 V supply voltage fourth-order low-pass continuous-time filter is presented. The low-voltage operating point is achieved by an improved bias circuit that uses different opamp input and output common-mode voltages. The fourth-order filter architecture is composed by two Active- ${rm G}_{rm m}{-}{rm RC}$ biquadratic cells, which use a single opamp per-cell with a unity-gain-bandwidth comparable to the filter cut-off frequency. The $-$ 3 dB filter frequency is 12 MHz and this is higher than any other low-voltage continuous-time filter cut-off frequency. The $-$3 dB frequency can be adjusted by means of a digitally-controlled capacitance array. In a standard 0.13 $mu{rm m}$ CMOS technology with ${V}_{THN}approx 0.25 {rm V}$ and ${V}_{THP}approx 0.3 {rm V}$, the filter operates with a supply voltage as low as 0.55 V. The filter $({rm total} {rm area}=0.47 {rm mm}^{2})$ consumes 3.4 mW. A 8 dBm-in-band IIP3 and a 13.3 dBm-out-of-band IIP3 demonstrate the validity of the proposal.      

AlN/GaN Insulated-Gate HEMTs With 2.3 A/mm Output Current and 480 mS/mm Transconductance

High-electron mobility transistors (HEMTs) based on ultrathin AlN/GaN heterostructures with a 3.5-nm AlN barrier and a 3-nm $hbox{Al}_{2}hbox{O}_{3}$ gate dielectric have been investigated. Owing to the optimized AlN/GaN interface, very high carrier mobility $(sim!!hbox{1400} hbox{cm}^{2}/hbox{V}cdothbox{s})$ and high 2-D electron-gas density $(sim!!kern1pthbox{2.7} times hbox{10}^{13} /hbox{cm}^{2})$ resulted in a record low sheet resistance $(sim !!hbox{165} Omega/hbox{sq})$. The resultant HEMTs showed a maximum dc output current density of $simkern1pt$2.3 A/mm and a peak extrinsic transconductance $g_{m,{rm ext}} sim hbox{480} hbox{mS/mm}$ (corresponding to $g_{m,{rm int}} sim hbox{1} hbox{S/mm}$). An $f_{T}/f_{max}$ of 52/60 GHz was measured on $hbox{0.25} times hbox{60} muhbox{m}^{2}$ gate HEMTs. With further improvements of the ohmic contacts, the gate dielectric, and the lowering of the buffer leakage, the presented results suggest that, by using AlN/GaN heterojunctions, it may be possible to push the performance of nitride HEMTs to current, power, and speed levels that are currently unachievable in AlGaN/GaN technology.      

Energy-Efficient Subthreshold Processor Design

Subthreshold circuits have drawn a strong interest in recent ultralow power research. In this paper, we present a highly efficient subthreshold microprocessor targeting sensor application. It is optimized across different design stages including ISA definition, microarchitecture evaluation and circuit and implementation optimization. Our investigation concludes that microarchitectural decisions in the subthreshold regime differ significantly from that in conventional superthreshold mode. We propose a new general-purpose sensor processor architecture, which we call the Subliminal Processor. On the circuit side, subthreshold operation is known to exhibit an optimal energy point $ (V_{rm min})$. However, propagation delay also becomes more sensitive to process variation and can reduce the energy scaling gain. We conduct thorough analysis on how supply voltage and operating frequency impact energy efficiency in a statistical context. With careful library cell selection and robust static RAM design, the Subliminal Processor operates correctly down to 200 mV in a 0.13- $ mu{hbox {m}}$ technology, which is sufficiently low to operate at $ V_{rm min}$. Silicon measurements of the Subliminal Processor show a maximum energy efficiency of 2.6 pJ/ instruction at 360 mV supply voltage and 833 kHz operating frequency. Finally, we examine the variation in frequency and $ V_{rm min}$ across die to verify our analysis of adaptive tuning of the clock frequency and $ V_{rm min}$ for optimal energy efficiency.      

2 MHz AO $Q$ -switched ${rm TEM}_{00}$ Grazing Incidence Laser With 3 at.% Neodymium Doped Nd:YVO$_{4}$

We present a detailed experimental and theoretical study of the ultrahigh repetition rate AO $Q$ -switched ${rm TEM}_{00}$ grazing incidence laser. Up to 2.1 MHz $Q$-switching with ${rm TEM}_{00}$ output of 8.6 W and 2.2 MHz $Q$ -switching with multimode output of 10 W were achieved by using an acousto-optics $Q$ -switched grazing-incidence laser with optimum grazing-incidence angle and cavity configuration. The crystal was 3 at.% neodymium doped Nd:YVO$_{4}$ slab. The pulse duration at 2 MHz repetition rate was about 31 ns. The instabilities of pulse energy at 2 MHz repetition rate were less than ${pm}6.7hbox{%}$ with ${rm TEM}_{00}$ operation and ${pm}3.3hbox{%}$ with multimode operation respectively. The modeling of high repetition rate $Q$-switched operation is presented based on the rate equation, and with the solution of the modeling, higher pump power, smaller section area of laser mode, and larger stimulated emission cross section of the gain medium are beneficial to the $Q$-switched operation with ultrahigh repetition rate, which is in consistent with the experimental results.      

A Light-Impact Model for p-Type and n-Type Poly-Si TFTs

This paper introduces and verifies a new light-impact model (LIM) for both p-type and n-type polycrystalline thin-film transistors (poly-Si TFTs). The ratio of the produced current under a specific light intensity $(I_{d})$ over the dark current $(I_{rm dark})$ is calculated. The new model has been also implemented in the circuit simulation program HSPICE. Comparative results between measurements and simulated characteristics are presented for different sizes of widths/lengths, different values of the $V_{rm ds}$ and $V_{rm gs}$ voltages and of light intensities.      

Surface Deposition of Ionic Contaminants on Silicon Wafers in a Cleanroom Environment

The adsorption and desorption behaviors of ionic micro-contaminants on the silicon wafers in a cleanroom environment were investigated in this study. The experimental measurements showed that the surface density of ionic contaminants was significantly affected by both the exposure time and the properties of contaminants. The rate parameters of a kinetic model for surface deposition were determined by numerical optimization of fitting the experimental data on surface and ambient concentrations of airborne molecular contaminants (AMCs). Subsequently, the time-dependent deposition velocity and sticking coefficient of ionic species were obtained. The results showed that ${rm F}^{-}$, ${rm Cl}^{-}$, ${rm NO}_{3}^{-}$, ${rm SO}_{4}^{2-}$, ${rm Na}^{+}$, ${rm NH}_{4}^{+}$, ${rm K}^{+}$, and ${rm Mg}^{2+}$ were the major ionic microcontamination species on the wafer surfaces, with the adsorption rate constant and the sticking coefficient of ${rm K}^{+}$ ion being larger than those of other ionic contaminants. After the determination of sticking coefficients, the allowable wafer exposure durations and the maximum ambient concentrations of ionic species were exemplified based on the guideline recommended by the International Technology Roadmap for Semiconductors (ITRS).      

A 10-kV Monolithic Darlington Transistor With $beta_{ rm forced}$ of 336 in 4H-SiC

4H-SiC bipolar Darlington transistors with a record-high current gain have been demonstrated. The dc forced current gain was measured up to 336 at 200 $hbox{W/cm}^{2}$ ( $J_{C} = hbox{35} hbox{A/cm}^{2}$ at $V_{rm CE} = hbox{5.7} hbox{V}$) at room temperature. The current gain exhibits a negative temperature coefficient and remains as high as 135 at 200 $^{circ}hbox{C}$. The specific on-resistance is 140 $hbox{m}Omegacdothbox{cm}^{2}$ at room temperature and increases at elevated temperatures. An open-emitter breakdown voltage $(BV_{rm CBO})$ of 10 kV was achieved at a leakage current density of $≪hbox{1} hbox{mA/cm}^{2}$. The device exhibits an open-base breakdown voltage $(BV_{rm CEO})$ of 9.5 kV. The high current gain of SiC Darlington transistors can significantly reduce the gate-drive power consumption with the same forward-voltage drop as that of 10-kV SiC bipolar junction transistors, thus making the device attractive for high-power high-temperature applications.