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在数字化系统的发展中,先进FPGA和DSP等大规模集成电路得以广泛应用,其测试的困难伴随而来。以某电路板为例,进行了可测试性分析,该板应用了高端的FPGA和DSP芯片,以及CPCI总线接口,是数字化整机的典型代表。还介绍了边界扫描测试开发软件Scanworks,并通过Scanworks进行了该板的测试程序集(TPS)开发,通过开发结果来看,该TPS能有效解决CPCI总线形式下数字电路板的边扫测试,能有效覆盖该板的焊接和器件类故障,对于该电路板的批量生产检测和维护有着重要的意义。 相似文献
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FLUKE9100FT在线测试系统采用专利仿真技术,通过内置CPU输出针对交换机各种不同工作状态下的激励信号及采集交换机的响应状态判断交换机系统工作情况,完成对带CPU电路板的在线测试及故障定位。介绍FLUKE9100FT在线测试系统的工作原理.程序设计方法及对国产HJD-04数字程控交换机MP-04板主板(MP-04板)和信令板(ASP-03板)的测试方法探究。 相似文献
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为了解决带DSP(数字信号处理器)芯片数字电路板中部分非边界扫描器件的功能测试难题,采用了边界扫描测试技术与传统的外部输入矢量测试相结合的方法,对一块带有DSP芯片数字电路板中的非边界扫描器件进行了功能测试。测试结果表明,该测试方法能够对这部分器件进行有效的故障检测和故障隔离,并可将故障隔离到芯片。充分说明这种应用边界扫描技术与传统测试方法相结合的功能测试方法能够有效地解决带DSP芯片数字电路板中部分非边界扫描器件的功能测试问题。 相似文献
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4 平视显示 /武器瞄准系统2 0世纪 60年代数字电子技术、真空电子器件的发展 ,引发了航空火控系统从探测传感到控制计算和瞄准显示的“数字革命”。从目标探测及飞机传感到计算与显示都发生了原理和结构的巨大变化。平视显示 /武器瞄准系统是首当其冲的。为了克服飞行员既要上视远 (数千米 )看目标及飞机外界 (空中、地面 )的景物 ,又要低头看座舱内仪表板上极近 (不到 1 m)距离的飞行数据、各功能分系统工作情况和武器准备状态 ,所带来的视觉转换造成的黑视与延误 ,用光学电子瞄准系统——平显火控系统代替光学瞄准具 ,瞄准的同时又能够观… 相似文献
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随着被测对象的复杂程度不断提高,在自动测试系统中用探笔定位元器件位置变得非常困难。通过探笔快速定位技术的研究,可以在电路板的自动测试过程中利用UUT实物图形来进行探测引导,能够实现快速准确地标定探测点或者故障器件在电路板上的位置,大大提高测试速度,降低误操作率,提高电路板自动测试系统的故障诊断效率。 相似文献
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某导弹测试设备电路板智能检测系统设计 总被引:2,自引:0,他引:2
针对某型导弹测试设备电路板故障缺乏行之有效检测方法的现状,设计了某导弹测试设备电路板智能检测系统。首先简单介绍了电路板检测原理,结合该设备电路板的结构和工作特点,建立了某型导弹测试设备电路板故障检测的模型,阐述了该系统硬件各功能模块的设计方案和系统软件实现方法;以典型的光电转换电路的测试为例,对电路板智能检测系统的进行了试验;试验结果表明,该系统能解决导弹测试设备电路板检测困难、测试效率较低的问题,提高了检测的效率和故障定位的能力,其性能稳定可靠,操作使用方便,结果显示直观;结合试验积累的经验,从两个方面对下一步继续研究进行了展望。本文网络版地址:http://www.eepw. com.cn/article/273266.htm 相似文献
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供输弹机是武器上易发生故障的子系统,以往的故障检测设备体积庞大。针对这一问题,以某型火炮的供输弹机为对象,结合数据采集的思想,提出了一种基于嵌入式PC104控制总线的便携式故障检测系统。论述了该系统的工作原理,硬件设计,并阐述了基于Visual C++开发工具的系统软件实现。试验表明,该检测系统在保证供输弹机运转的同时,能够快速检测弹丸输送中的多路信号,为准确定位供输弹机的故障,提供了有效的解决方案。 相似文献
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Power-return plane pairs in printed circuit boards are often modeled as resonant cavities. Cavity models can be used to calculate transfer impedance parameters used to predict levels of power bus noise. Techniques for applying the cavity model to lossy printed circuit board geometries rely on a low-loss assumption in their derivations. Boards that have been designed to damp power bus resonances (e.g., boards with embedded capacitance) generally violate this low-loss assumption. This paper investigates the validity of the cavity model when applied to printed circuit board structures where the board resonances are significantly damped. Cavity modeling results for sample lossy power-return plane structures are validated using a three-dimensional full wave numerical code. A simple method is also established to check the validity of the cavity model for a power-return plane structure with imperfect conductors and lossy dielectric substrates. 相似文献
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Antonini G. Drewniak J.L. Orlandi A. Ricchiuti V. 《Microwave Theory and Techniques》2002,50(7):1807-1815
A method for simulating the eye pattern of high-speed digital signals propagated on printed circuit boards using multiconductor transmission-line modeling is proposed in this paper. The approach takes into account the frequency-dependent properties of the dielectric materials of the board and of the conductors. The validation is performed by comparing the modeling with measurements taken from the literature, and directly performed on test boards specially design for this study 相似文献
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Nai-Chi Lee 《Analog Integrated Circuits and Signal Processing》1993,4(3):261-268
Progress in analog circuit testing has been hindered by the lack of structured design-for-testability methodologies. With the increasing complexity of analog/mixed-signal circuits, test program development time is now a major obstacle in achieving shorttime-to-market, while production testing cost is a prominent factor in total production cost. TheAnalog Autonomous Test is a structured design-for-testability scheme for analog circuits. Originally developed for testing analog circuits at chip level, AAT extends naturally to cover testing of mixedsignal integrated circuits mounted on printed circuit boards. With the addition of an analog test bus to PCBs, testability for analog components (bothcore circuits andglue circuits) can be improved, in a manner similar to that achieved for digital boards by the IEEE 1149.1 boundary scan scheme. Details on the implementation of thisAnalog Autonomous Test Bus, both at chip level and board level, are presented here. Its limitations and potential applications are also discussed. 相似文献
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A method for de-embedding the scattering parameters matrix for single-end or differential through, buried, and blind via holes in multilayer printed circuit boards for high-speed digital applications is presented. The proposed technique starts from a measurement or simulation of the structure containing the discontinuity and, after the structure's partitioning, extracts the scattering parameters of the required discontinuity. The procedure is applied to different kinds of single-ended and differential via holes and is validated by measurements. The finite integration technique is used to perform the needed three-dimensional electromagnetic simulations. Due to its reduced CPU time, the proposed methodology is suitable for a parametric analysis on the electrical performance of the via hole discontinuities and it gives useful results for the extraction of accurate computer-aided design models. 相似文献
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Nai-Chi Lee 《Journal of Electronic Testing》1993,4(4):361-368
Progress in analog circuit testing has been hindered by the lack of structured design-for-testability methodologies. With the increasing complexity of analog/mixed-signal circuits, test program development time is now a major obstacle in achieving shorttime-to-market, while production testing cost is a prominent factor in total production cost. TheAnalog Autonomous Test is a structured design-for-testability scheme for analog circuits. Originally developed for testing analog circuits at chip level, AAT extends naturally to cover testing of mixedsignal integrated circuits mounted on printed circuit boards. With the addition of an analog test bus to PCBs, testability for analog components (bothcore circuits andglue circuits) can be improved, in a manner similar to that achieved for digital boards by the IEEE 1149.1 boundary scan scheme. Details on the implementation of thisAnalog Autonomous Test Bus, both at chip level and board level, are presented here. Its limitations and potential applications are also discussed. 相似文献
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电路板测试台是一种自动化数字电路故障测试设备,能快速、准确地将故障定位到芯片。本文介绍了测试台的基本组成、硬件设计、软件设计及其应用,该测试台在测试接口上采用多种电路板接口,在测试通道上采用总线接口通道和探针通道并存的方式。 相似文献
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目前大容量的FPGA多采用BGA封装,当其焊接到电路板上后,引脚连接情况很难检测。本文根据单板上除了FPGA外是否使用其他处理器为依据,将使用了FPGA的单板分为仅有FPGA的单板和包含处理器的单板,根据不同类型单板的特点,给出了FPGA方波输出法和MCU地址数据总线扫描法两种切实可行的检测方法,将这两种方法配合在一起,可以检测出大部分FPGA连接问题。文章还以Altera公司的CycloneIV系列FPGA为例,说明了这些检测方法的实现方式。这些检测方法在单板返修中取得了良好的效果。 相似文献