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1.
介绍了一种用于对雷达回波I/Q信号进行双路高速采集与数据存储的系统,采样速率为200MHz,分辨率为12位,存储深度为4GB.该系统采用FPGA作为主控制器,ADS62P29作为高速数据转换器,K9K8G08U0M作为大容量数据存储器,通过USB实现系统与计算机之间的通信.利用Cadence软件和VHDL语言完成了系统设计、软件仿真及关键信号的完整性仿真.测试结果表明,ADC的有效位数可达10.69,输入信号为80 MHz的正弦信号时,两路ADC信号之间的相干系数达到0.998 4,可满足雷达系统对回波信号进行高精度相位测量的要求.  相似文献   

2.
本文针对噪声雷达信号模型研究与实验的需求,基于高速FPGA、双通道高速DAC和双通道高速ADC芯片,开发了噪声雷达中频信号产生与基带接收系统.该系统的最大发射和接收信号带宽分别为220 MHz和200 MHz,可作为研究噪声雷达信号模型和处理算法的实验平台.介绍了系统的软硬件设计,给出了Chirp信号和混沌噪声信号的产生与接收采样以及处理结果,验证了设计的正确性和所开发平台的可用性.  相似文献   

3.
胡瑞永 《硅谷》2008,(15):19-20
设计采用单片机与FPGA开发系统实现数字示波器.阐述示波器的实现原理及过程,利用AD783做取样保持电路,对被测信号进行实时采样并保持,将采样信号送入FPGA,进行实施采样和等效采样,实现对信号的完整取样并还原波形,再由单片机处理,最后实现LCD显示和键盘操作.对各功能模块、电路原理进行分析.实测表明系统实时采样频率和等效采样频率范围覆盖1KHz~100MHz,输入阻抗大于1MΩ.设计模块过程中进行最大限度的数字化,外围电路简单,极大地减少了被测信号的受干扰率.系统稳定性好、可靠度高,较好的实现了设计目的.  相似文献   

4.
介绍一种基于EV10AQ190的超高速采样系统设计与实现,系统通过该芯片的四通道高速交错采样配合高速数据信号分离降速传输在FPGA平台上实现。实验及测试结果表明,交错采样方法及高速数据降速并行传输可实现EV10AQ190最高5GHz采样速率。  相似文献   

5.
针对高频声学应用中多普勒信号软件解调的局限,提出了一种基于FPGA的数字硬件信号解调方案.基于AD9467设计了高速ADC采集系统,以实现原始多普勒信号的奈奎斯特采样或带通采样;基于Xilinx Zynq-7000片上芯片系统设计数字信号处理系统,实现了 DDS合成参考信号与多普勒信号混频、低通滤波产生I&Q基带信号对...  相似文献   

6.
向海生  张卫清 《硅谷》2012,(1):8-9,5
介绍基于ADC和FPGA(现场可编程门阵列)的八通道高速数据采集板,描述设计方案、实现途径和主要指标测试结果,该采集板是一个通用的宽带、高速数据采集平台,模拟带宽可达600MHz,支持最大1.5GB存储深度,在交互模式下,单通道最大采样率可达4.8Gsps。  相似文献   

7.
介绍了一种基于并联ADC芯片结构方式,实现了一种通用的、用相对较低速的ADC器件实现较高采样频率的数据采集系统的设计方法.所设计的系统以FPGA为核心器件,通过采用并联的两片AD9254模拟转换芯片作为一个数据采集通道,利用时钟芯片AD9516-3进行时钟时序分配,控制两片AD9254芯片轮询采样.实验结果验证了用两片150 MHz采样频率的ADC器件并联工作,能够使数据采集系统达到300MHz的采样频率,并能准确测试72 MHz的输入信号.  相似文献   

8.
本文针对目前市场上的影像白板产品存在的触摸延迟和部分定位误差偏大问题。设计了一款基于DSP+FPGA的影像白板控制器,同时配备高性能摄像头,FPGA通过内部锁相环将主频率倍频至300MHz。第一帧数据在DSP中DMA传输、运算处理的同时FPGA同步控制预处理、缓存第二帧数据,利用FPGA并发运行的特点在FPGA内部设计三个功能模块,实现同步高速数据采集、存储、传输、实时显示的功能。  相似文献   

9.
本文利用DDS技术在FPGA平台上设计实现了一种Chirp信号发生器,该信号发生器能产生标准的Chirp波形和正余弦波形,通过PC机软件可调整波形的类型、频率和相位。该信号发生器输出频率范围为0.01Hz-25MHz,频率分辨率为0.01Hz,具有控制灵活,输出稳定的优点。  相似文献   

10.
李楠  徐欣  孙兆林 《计测技术》2007,27(5):49-52
介绍了一种基于PXI总线的高速数字化仪的设计理论和实现方法,从硬件和软件两个方面详细介绍了系统的设计方法.该采集平台基于高速模数转换器ADC08D1500和高性能可编程逻辑器件VIRTEX-4 SX35,可以实现3Gsps的实时采样率和8位的采样精度;板载512M DDR2内存模组,可以实现高速信号的实时存储;接口上采用PXI总线技术,采用PCI9054作为接口芯片;软件开发上采用DLL API的模式,方便不同用户的定制.  相似文献   

11.
A compact medical ultrasound beamformer architecture that uses oversampled 1-bit analog-to-digital (A/D) converters is presented. Sparse sample processing is used, as the echo signal for the image lines is reconstructed in 512 equidistant focal points along the line through its in-phase and quadrature components. That information is sufficient for presenting a B-mode image and creating a color flow map. The high sampling rate provides the necessary delay resolution for the focusing. The low channel data width (1-bit) makes it possible to construct a compact beamformer logic. The signal reconstruction is done using finite impulse reponse (FIR) filters, applied on selected bit sequences of the delta-sigma modulator output stream. The approach allows for a multichannel beamformer to fit in a single field programmable gate array (FPGA) device. A 32-channel beamformer is estimated to occupy 50% of the available logic resources in a commercially available mid-range FPGA, and to be able to operate at 129 MHz. Simulation of the architecture at 140 MHz provides images with a dynamic range approaching 60 dB for an excitation frequency of 3 MHz.  相似文献   

12.
We present a cost-effective portable ultrasound system based on a single field-programmable gate array (FPGA) for point-of-care applications. In the portable ultrasound system developed, all the ultrasound signal and image processing modules, including an effective 32-channel receive beamformer with pseudo-dynamic focusing, are embedded in an FPGA chip. For overall system control, a mobile processor running Linux at 667 MHz is used. The scan-converted ultrasound image data from the FPGA are directly transferred to the system controller via external direct memory access without a video processing unit. The potable ultrasound system developed can provide real-time B-mode imaging with a maximum frame rate of 30, and it has a battery life of approximately 1.5 h. These results indicate that the single FPGA-based portable ultrasound system developed is able to meet the processing requirements in medical ultrasound imaging while providing improved flexibility for adapting to emerging POC applications.  相似文献   

13.
High-frequency ultrasound (HFUS) in the 20 MHz to 100 MHz range has to meet the opposite requirements of good spatial resolution and of high penetration depth for in vivo ultrasound biomicroscopy (UBM) of skin. The attenuation of water, which serves as sound propagation medium between utilized single element transducers and the skin, becomes very eminent with increasing frequency. Furthermore, the spectra of acquired radio frequency (rf) echo signals change over depth because of the diffracted sound field characteristics. The reduction of the system's center frequency and bandwidth causes a significant loss of spatial resolution over depth. In this paper, the spectral characteristics of HFUS imaging systems and the potential of inverse echo signal filtering for the optimization of pulse-echo measurements is analyzed and validated. A Gaussian model of the system's transfer function, which takes into account the frequency-dependent attenuation of the water path, was developed. Predictions of system performance are derived from this model and compared with measurement results. The design of a HFUS skin imaging system with a 100 MHz range transducer and a broadband driving electronics is discussed. A time-variant filter for inverse rf echo signal filtering was designed to compensate the system's depth-dependent imaging properties. Results of in vivo measurements are shown and discussed.  相似文献   

14.
CCD相机视频处理电路设计   总被引:1,自引:1,他引:0  
魏伟  刘恩海  郑中印 《光电工程》2012,39(6):144-150
为了提高CCD相机的成像质量,对CCD的噪声进行了分类和分析,设计了高信噪比的视频处理电路。讨论了针对复位噪声和1/f噪声进行处理的相关双采样电路的原理。以专用视频处理芯片VSP2270和FPGA为核心设计了视频处理电路。最后结合CCD驱动电路,进行了图像采集和信噪比测试实验。实验结果表明,视频处理电路在本身引入噪声较小的同时,有效地抑制了CCD复位噪声、1/f噪声等噪声。数据输出率为20MHz时,整机系统信噪比高达58.4dB。基本满足星图成像的应用要求。  相似文献   

15.
This is the second part of a two-paper series reporting a recent effort in the development of a high-frequency annular array ultrasound imaging system. In this paper an imaging system composed of a six-element, 43 MHz annular array transducer, a six-channel analog front-end, a field programmable gate array (FPGA)-based beamformer, and a digital signal processor (DSP) microprocessor-based scan converter will be described. A computer is used as the interface for image display. The beamformer that applies delays to the echoes for each channel is implemented with the strategy of combining the coarse and fine delays. The coarse delays that are integer multiples of the clock periods are achieved by using a first-in-first-out (FIFO) structure, and the fine delays are obtained with a fractional delay (FD) filter. Using this principle, dynamic receiving focusing is achieved. The image from a wire phantom obtained with the imaging system was compared to that from a prototype ultrasonic backscatter microscope with a 45 MHz single-element transducer. The improved lateral resolution and depth of field from the wire phantom image were observed. Images from an excised rabbit eye sample also were obtained, and fine anatomical structures were discerned.  相似文献   

16.
Ultrasound biomicroscopy (UBM) has been extensively applied to preclinical studies in small animal models. Individual animal study is unique and requires different utilization of the UBM system to accommodate different transducer characteristics, data acquisition strategies, signal processing, and image reconstruction methods. There is a demand for a flexible and open UBM platform to allow users to customize the system for various studies and have full access to experimental data. This paper presents the development of an open UBM platform (center frequency 20 to 80 MHz) for various preclinical studies. The platform design was based on a field-programmable gate array (FPGA) embedded in a printed circuit board to achieve B-mode imaging and directional pulsed-wave Doppler. Instead of hardware circuitry, most functions of the platform, such as filtering, envelope detection, and scan conversion, were achieved by FPGA programs; thus, the system architecture could be easily modified for specific applications. In addition, a novel digital quadrature demodulation algorithm was implemented for fast and accurate Doppler profiling. Finally, test results showed that the platform could offer a minimum detectable signal of 25 μV, allowing a 51 dB dynamic range at 47 dB gain, and real-time imaging at more than 500 frames/s. Phantom and in vivo imaging experiments were conducted and the results demonstrated good system performance.  相似文献   

17.
High-frequency (>20 MHz) ultrasound (HFUS) imaging systems have made it possible to image small structures with fine spatial resolution. They find a variety of biomedical applications in dermatology, ophthalmology, intravascular imaging, and small-animal imaging. One critical technical challenge of HFUS is to generate high-voltage, high-frequency pulsed signals to effectively excite the transducer for a high SNR. This paper presents the development of a multifunctional, reconfigurable pulse generator for HFUS imaging. The pulse generator can produce a high-voltage unipolar pulse, a bipolar pulse, or arbitrary pulses for B-mode imaging, Doppler measurement, and modulated excitation imaging. The characteristics of the pulses, such as timing, waveform, and frequency are reconfigurable by a high-speed field-programmable gate array (FPGA). Customized software was developed to interface with the FPGA through a USB connector for pulse selection, and easy, flexible, real-time pulse management. The hardware was implemented in a compact, printed circuit board (PCB)-based scheme using state-of-the-art electronics for costeffectiveness and fully digital control. Testing results show that the unipolar pulse can reach over 165 Vpp with a 6-dB bandwidth of 70 MHz, and the bipolar pulse and arbitrary pulses can reach 150 and 60 Vpp with central frequencies of 60 and 120 MHz, respectively.  相似文献   

18.
介绍了能同时实现直接频率合成(DDFS)及直接波形存储(DDWS)两种方式的宽带数字Chirp信号产生器的研制工作.数字Chirp采用了数模转换率达到1 Gsps的16位DAC,在8倍过采样率下,可输出基带最高频率达110 MHz.通过正交调制,带宽可达220 MHz.正交调制器的载频泄露小于-49 dBc,镜像频率抑制-41 dBc,在500~1 500 MHz频带内的最大杂散为-25 dBc.文中对比了直接频率合成与波形存储两种体制的性能及资源使用情况,并给出两种模式的测试和实验结果.  相似文献   

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