用户级通信中基于网络接口的虚实地址变换技术

用户级通信允许应用程序直接访问网络接口,减小了通信操作的软件层开销。为了支持用户级通信,高效的虚拟地址到物理地址的变换起到关键作用。本文提出了基于地址变换表的地址变换机制,虚实地址变换都在网络接口控制器上完成,变换过程不需要操作系统的参与,并且无需失效处理。采用这种机制,我们实现了基于PCI-X面向集群系统的互连通信子系统CNI。实际测试获得了2．4μs的最小单边延迟和850MB／s的峰值带宽。     

WADE系统的支持对象通信的绑定代理

为了支持基于校园网络的元计算系统WADE的分布式对象的高效通信，提出了一种具有分级体系结构的分布式对象模型。该模型负责建立、定位、管理、删除和迁移对象。论文在讨论对象通信过程和模型的基础上，提出了利用绑定代理技术实现对象通信地址绑定的方法。该方法通过绑定缓冲器和消息缓冲器来提高对象的通信效率，基于双重缓冲的绑定代理技术可以有效提高对象的通信效率。     

Design and analysis of a scalable cache coherence scheme based onclocks and timestamps

A timestamp-based software-assisted cache coherence scheme that does not require any global communication to enforce the coherence of multiple private caches is proposed. It is intended for shared memory multiprocessors. The scheme is based on a compile-time marking of references and a hardware-based local incoherence detection scheme. The possible incoherence of a cache entry is detected and the associated entry is implicitly invalidated by comparing a clock (related to program flow) and a timestamp (related to the time of update in the cache). Results of a performance comparison, which is based on a trace-driven simulation using actual traces. between the proposed timestamp-based scheme and other software-assisted schemes indicate that the proposed scheme performs significantly better than previous software-assisted schemes, especially when the processors are carefully scheduled so as to maximize the reuse of cache contents. This scheme requires neither a shared resource nor global communication and is, therefore, scalable up to a large number of processors     

基于m-via的用户级通信研究

用户级通信允许应用程序直接访问网络接口,减少了通信层次的软件开销.为了支持用户级通信,高效的虚拟地址到物理地址的转换起到关键作用.通过对几种地址转换方法的比较,提出了用户级操作的地址转换法.并用其对虚拟接口高性能模块的实现(M-VIA)进行了改进.实验证明用户级操作的地址转换法具有更好的通信性能.     

高速网络环境下NAT快速转换算法

网络地址转换(NAT)是路由器的一项基本功能，它有效地隐藏了内部网的规模和拓扑结构，为内部网提供了必要的安全，并且也是临时解决IP地址短缺的途径。从实际应用出发，提出了一种基于Patricia树的高速网络环境下NAT转换条目的快速搜索算法，该算法将NAT的转换条目组织成Patricia，并辅之以Hash表，加快了转换条目的搜索过程。为满足实时业务的需要，还引入了Cache，并对传统NAT转换条目的操作进行了适当的优化，大大地提高了NAT的性能。     

Estimating neural networks-based algorithm for adaptive cachereplacement

In this paper, we propose an adaptive cache replacement scheme based on the estimating type of neural networks (NN's). The statistical prediction property of such NN's is used in our work to develop a neural network based replacement policy which can effectively identify and eliminate inactive cache lines. This would provide larger free space for a cache to retain actively referenced lines. The proposed strategy may, therefore, yield better cache performance as compared to the conventional schemes. Simulation results for a wide spectrum of cache configurations indicate that the estimating neural network based replacement scheme provides significant performance advantage over existing policies.     

一种基于两级缓存的协同缓存机制

信息中心网络（information-centric networking,简称ICN）将网络通信模式从当前的以地址为中心转变为以信息为中心.泛在化缓存是ICN重要特性之一,它通过赋予网络任意节点缓存的能力来缓和服务器的压力,降低用户访问延迟.然而,由于缺少内容热度的分布感知,现有ICN缓存策略仍存在缓存利用率较低、缓存位置缺乏合理规划等问题.为了解决这些问题,提出一种基于两级缓存的协同缓存机制（a cache coordination scheme based on two-level cache,简称CSTC）.将每个节点的缓存空间分为热度感知和协作分配两部分,为不同热度的内容提供不同的缓存策略.同时,结合提出的热度筛选机制和路由策略,降低了缓存冗余,实现了缓存位置优化.最后,基于真实网络拓扑的仿真实验表明,CSTC在次热门内容缓存数量上提升了2倍,缓存命中率提升了将近50%,且平均往返跳数在多数情况下优于现有On-path缓存方式.     

A novel approach to enhance distributed virtual memory

Distributed virtual memory (DVM) has been introduced in several researches and models in order to improve system memory performance. In this paper, various practical issues are addressed, examined and analyzed to exploit further areas of performance enhancements. In particular, a novel distributed algorithm for DVM management based on cluster cache in order to enhance previous DVM techniques is discussed. The algorithm employs address translation, page out policies and page replacement. The algorithm performance is evaluated across several test benches under variant system loads to show the efficiency of our technique. Compared with practical DVM and conventional virtual memory (CVM), our algorithm outperforms the previous algorithms and reduces the page faults by a considerable amount of 15% and 25%, respectively.     

A proxy-based integrated cache consistency and mobility management scheme for client–server applications in Mobile IP systems

In this paper, we investigate a proxy-based integrated cache consistency and mobility management scheme for supporting client–server applications in Mobile IP systems with the objective to minimize the overall network traffic generated. Our cache consistency management scheme is based on a stateful strategy by which cache invalidation messages are asynchronously sent by the server to a mobile host (MH) whenever data objects cached at the MH have been updated. We use a per-user proxy to buffer invalidation messages to allow the MH to disconnect arbitrarily and to reduce the number of uplink requests when the MH is reconnected. Moreover, the user proxy takes the responsibility of mobility management to further reduce the network traffic. We investigate a design by which the MH’s proxy serves as a gateway foreign agent (GFA) as in the MIP Regional Registration protocol to keep track of the address of the MH in a region, with the proxy migrating with the MH when the MH crosses a regional area. We identify the optimal regional area size under which the overall network traffic cost, due to cache consistency management, mobility management, and query requests/replies, is minimized. The integrated cache consistency and mobility management scheme is demonstrated to outperform MIPv6, no-proxy and/or no-cache schemes, as well as a decoupled scheme that optimally but separately manages mobility and service activities in Mobile IPv6 environments.     

Benefits of using parallelized non-progressive network coding

Network coding helps improve communication rate and save bandwidth by performing a special coding at the sending or intermediate nodes. However, encoding/decoding at the nodes creates computation overhead on large input data that causes coding delays. Therefore the progressive method which can hide decoding delay in waiting time is proposed in the previous works. However, the network speed has been greatly accelerated and progressive schemes are no longer the most efficient decoding method. Thus, we present non-progressive decoding algorithm that can be more aggressively parallelized than the progressive network coding, which can diminish the advantages of hidden decoding time of progressive methods by utilizing the multi-core processors. Moreover, the block algorithm implemented by non-progressive decoding helps to reduce cache misses. Through experiments, our scheme which relies on matrix inversion and multiplication shows 46.0% improved execution time and 89.2% last level cache miss reduction compared to the progressive method on multi-core systems.     

基于网络处理器的NAT优化设计

提出基于网络处理器IXP2400的网络地址转换(NAT)实现方案,并对NAT表的存储结构、表项的创建和删除、ME与XScale之间的通信机制、MAC地址修改与校验和计算等关键技术进行优化设计,使其既具有线速处理的能力,又能灵活地配置。     

基于多层加密机制的内容中心网络隐私保护策略

内容中心网络（Content-Centric Networking,CCN）作为一种新型的网络架构,将通信从基于IP地址的端到端的模式转变为基于内容的模式,成为未来网络最有发展潜力的网络架构之一。CCN网络请求者获得所需内容不用考虑内容存在何处,该网络的优势在于可以在路由器中缓存已请求过的内容。然而,内容、请求者以及发布者三者的隐私保护对于CCN网络是一个新的挑战。提出一种基于多层加密机制的内容中心网络隐私保护策略,在发挥CCN网络缓存优势的情况下,能够防止非法兴趣包请求,同时减轻了路由器以及请求者需要存储大量密钥的负担,提高网络的安全性。     

对等网络中穿越NAT解决方案的研究

网络通信的发展极其迅速,与传统通信一样,P2P通信同样受到NAT穿越问题的制约.针对对等网络在NAT上进行穿越的问题,分析了对等网络通信受到NAT影响的原因,提出了一种检测NAT类型的方法.在该方法的基础上,对基于锥型网络地址转换和对称型网络地址转换的P2P网络穿越NAT过程进行了分析,对现有的穿越方案进行了总结,并提出了一种综合解决方案.     

D2D网络中的缓存副本数布设算法

在Device-to-Device (D2D)缓存网络中,缓存文件的副本数量是制约系统缓存效率的重要因素,过多的副本会导致缓存资源不能得到充分利用,副本数过低又将使流行文件难以被有效获取。针对D2D缓存网络副本布设问题,以系统缓存命中率最大化为目标,利用凸规划理论,提出了一种缓存文件副本数布设算法(CRP)。仿真结果显示,与现有副本数量布设算法相比,该算法可以有效提升D2D缓存网络总体缓存命中率。     

Modbus通信协议的紫蜂无线传输网络的研究

介绍了紫蜂（ZigBee）无线网络的技术特点和Modbus通信协议的原理，对基于Modbus通信协议的紫蜂无线总线网络系统的实现进行了分析和探讨，提出了一个利用紫蜂设备的IEEE地址与其设定Modbus地址进行绑定，同时利用网络短址进行网络地址定向，并通过无线透传的方式来实现遵循Modbus通信协议的数据在紫蜂无线网络中传输的具体方案。通过理论与实验印证，该方案是可行的，而且在工业环境下有着广阔的应用前景。     

一种基于移动环境的语义缓存一致性维护技术

在深入研究缓存失效广播技术和语义缓存的基础上，提出了一种新的基于移动环境的语义缓存一致性维护技术——基于语义缓存的异步有状态（BSCAS）技术。BSCAS技术可以支持移动客户的各种断接方式，减少无线通信的开销，让移动客户有更好的自治性。     

MUTABOR, a coprocessor supporting memory management in anobject-oriented architecture

The author describes MUTABOR, a micro-programmable coprocessor that works with a 68020 CPU to control and update a 4096-entry address translation cache that achieves an excellent hit rate. He defines the requirements for an object-oriented memory-management unit, and outlines the architecture of MUTABOR and the object-addressing mechanism. He also discusses the design decisions concerning the address translation cache, which were based on simulation results     

Adaptive-level memory caches on World Wide Web servers

Owing to the fast growth of World Wide Web (WWW), web traffic has become a major component of Internet traffics. Consequently, the reduction of document retrieval latency on WWW becomes more and more important. The latency can be reduced in two ways: reduction of network delay and improvement of web servers’ throughput. Our research aims at improving a web server’s throughput by keeping a memory cache in a web server’s address space.In this paper, we focus on the design and implementation of a memory cache scheme. We propose a novel web cache management policy named the adaptive-level policy that either caches the whole file content or only a portion of it, according to the file size. The experimental results show three things. First, our memory cache is beneficial since, under our experimental workloads, the throughput improvement can achieve 32.7%. Second, our cache management policy is suitable for current web traffic. Third, with the increasing popularity of multimedia files, our policy will outperform others currently used in WWW.     

RTLinUx下基于半轮询驱动的用户级报文传输机制

网络通信软件的处理开销已成为影响机群系统的性能瓶颈,为了提高机群系统的网络性能,在实时操作系统RTLinux下,设计并实现了一个符合VIA规范的用户级通信软件UMPS,提出了半轮询驱动的概念,利用半轮询驱动机制降低了系统中断频率,明显提高了短报文的处理能力.通过更为高效的地址翻译和基于资源映射图的缓冲区管理算法,应用程序旁路操作系统,依靠异步DMA直接与通信设备进行交互,有效地降低了网络通信的延迟与开销.通过性能的分析比较表明,UMPS接收64 byte与1500 byte的报文时吞吐量分别达到394 Mbps和895 Mbps,与现有的报文传输机制相比,UMPS的性能有了较为显著的提高.     

基于CAN总线的多PLC网络通信方案研究

目前,很多小型PLC并没有集成CAN通信接口,这样就妨碍了通信模块的连接。提出了一种基于CAN总线的PLC网络通信方案,该方案通过将各厂家不同的通信协议转化为统一的CAN网络通信,从而实现了较好的互相连通性以及统一的上位机监控能力。