CMOS linear programmable transconductor suitable for adjustable Gm-C filters

A novel CMOS linear programmable transconductor is presented. It is based on a telescopic cascode operational transconductance amplifier with source degeneration implemented by means of highly linear tunable active resistors. The transconductor has been designed in a 0.5 mum CMOS technology featuring a third-order intermodulation (IM3) of -54.8 dB at 10 MHz for a 1 V_pp output voltage. Its feasibility for Gm-C filter design has been experimentally validated with a 1 MHz tunable third-order Chebyshev lowpass filter suitable for Bluetooth applications.     

Linearity improvement of source degenerated transconductance amplifiers

Mobility degradation is predominant in submicron CMOS technology. The effect of this mobility reduction in a linear operational transconductance amplifier (OTA) with signal attenuation and source degeneration is examined in this study. Theoretical analysis shows that the cubic non-linearity in the attenuator helps to improve the linearity of the source degenerated transconductor by partial cancellation of the harmonic distortion component. Such a linear transconductor and a third order low pass filter based on this linear OTA are fabricated in UMC 180 nm CMOS process technology. Experimental results show that third order intermodulation distortion of the linear OTA is less than ?60 dB for 500 mVpp differential input signal while for 2 % transconductance variation the linear range is about 1.2 Vpp. The linear transconductor consumes only 0.45 mW of power with 1.8 V supply.     

Low‐Voltage Tunable Pseudo‐Differential Transconductor with High Linearity

A novel tunable transconductor is presented. Input transistors operate in the triode region to achieve programmable voltage‐to‐current conversion. These transistors are kept in the triode region by a novel negative feedback loop which features simplicity, low voltage requirements, and high output resistance. A linearity analysis is carried out which demonstrates how the proposed transconductance tuning scheme leads to high linearity in a wide transconductance range. Measurement results for a 0.5 μm CMOS implementation of the transconductor show a transconductance tuning range of more than a decade (15 μA/V to 165 μA/V) and a total harmonic distortion of ?67 dB at 1 MHz for an input of 1 V_pp and a supply voltage of 1.8 V.     

A CMOS “soft-switched” transconductor and itsapplication in gain control and filters

This paper presents a transconductor suitable for implementation in submicron CMOS technology. The transconductor is nearly insensitive for the second-order effects of the MOS transistors, which become more and more prevalent in today's submicron processes. The transconductor relies on a differential pair with variable degeneration resistance, while the degeneration resistors are “soft-switched” by means of MOS transistors. The transconductance is continuously tunable. A transconductor, using a device in which the degeneration resistors and “soft switches” are merged, is optimized for a maximum tuning range and can be used in variable gain stages like in an automatic gain control (AGC) circuit. Besides, a third-order 5.5 MHz low-pass filter has been realized in a 0.5-μm CMOS process using the “soft-switched” transconductor. At a 3.3 V supply voltage the filter dissipates 12 mW and the dynamic range equals 62 dB where the total harmonic distortion (THD) is -48 dB for an input voltage of 1 Vpp     

An active device based wide tuning range CMOS transconductor

A CMOS transconductor for wide tuning range filter application is presented. The linear transconductor is designed based on the flipped-voltage follower (FVF) circuit and can work in the weak, moderate, and strong inversion regions to maximize the transconductance tuning range. The transconductance tuning can be achieved by changing the bias current of the active resistor, and a ratio of 28 is obtained. The transconductor was evaluated by using TSMC 0.18 μm CMOS process, and the total harmonic distortion (THD) of −56 dB can be obtained by giving a 12 MHz 0.4 Vpp input swing signal. In the design, the maximum power consumption is 2 mW with the transconductance of 1.1 mS under a 1.8 V supply voltage.     

A low-transconductance OTA with improved linearity suitable for low-frequency Gm-C filters

A fully differential operational transconductance amplifier is presented in this paper with enhanced linearity and low transconductance, suitable for low-frequency Gm-C filters. This paper also proposes a new common-mode feedback scheme that presents low sensitivity to large differential voltage swings at the OTA outputs. The proposed OTA was employed in the design of a fully-integrated Gm-C low-pass filter with a cutoff frequency of 30 kHz. The Gm-C filter was fabricated in a 0.35 μm CMOS technology and presented a THD at the output less than 1% for input signals with differential amplitudes up to 3.2 V.     

A Gm-C continuous-time anti-alias filter for UWB analog front-end

A proposed constant drain-source transconductor topology is designed to keep linearity at high frequency. By using the proposed operational transconductance amplifier as a building block, a fourth-order low-pass filter is realized. The filter was fabricated in 0.18 μm CMOS technology and feathers a 250 MHz cutoff frequency. The measured IM3 performance is ?36 dB at 0.6 V_pp input swing and the power consumption is 22 mW.     

A low-voltage low-power CMOS fully differential linear transconductor with mobility reduction compensation

A highly linear fully differential CMOS transconductor architecture based on flipped voltage follower (FVF) is proposed. The linearity of the proposed architecture is improved by mobility reduction compensation technique. The simulated total harmonic distortion (THD) of the proposed transconductor with 0.4V_pp differential input is improved from ?42 dB to ?55 dB while operating from 1.0 V supply. As an example of the applications of the proposed transconductor, a 4th-order 5 MHz Butterworth Gm-C filter is presented. The filter has been designed and simulated in UMC 130 nm CMOS process. It achieves THD of ?53 dB for 0.4V_pp differential input. It consumes 345 μw from 1.0 V single supply. Theoretical and simulated results are in good agreement.     

Minimum component high frequency Gm-C wavelet filters based on Maclaurin series and multiple loop feedback

A minimum component high frequency Gm-C wavelet filter structure is presented. A simple function from Maclaurin series approximation is used and the current-mode follow-the-leader feedback structure is employed. For the seventh-order Marr wavelet bandpass filter, the proposed implementation architecture contains only seven ideal Gm-C integrators for poles and one transconductor for zeros. A 100 MHz wavelet filter has been designed and simulated in 0.18 m CMOS and results show the feasibility of the proposed approach.     

A highly linear CMOS transconductance amplifier in 180?nm process technology

The present article describes the design and analysis of an operational transconductance amplifier (voltage to current converter) with wide linear input range. The proposed configuration combines the techniques of signal attenuation and source degeneration in order to reduce the odd order harmonic distortion significantly. The proposed circuit is compared with several circuit topologies based on MOS differential pairs with respect to their achievable linearity, input referred noise and power consumption. The linear transconductor is designed and simulated in 180?nm CMOS process technology with 1.8?V power supply. Simulation results show third order harmonic distortion (HD ₃) of ?70?dB for 600?mV_pp input signal. For 1% transconductance variation the linear range is about 1.2?V_pp. The input referred noise of the transconductor is $70\,\hbox{nV}/\sqrt{\text {Hz}}$ at 10?MHz. The quiescent power consumption is only 450???W.     

Multimode $G_{m}$– $C$ Channel Selection Filter for Mobile Applications in 1-V Supply Voltage

A CMOS transconductor for multimode channel selection filter is presented. The transconductor includes a voltage-to-current converter and a current multiplier. Voltage-to-current conversion employs linear region MOS transistors, and the conversion features high linearity over a wide input swing range. The current multiplier which operates in the weak inversion region provides a wide transconductance tuning range without degrading the linearity. A third-order Butterworth low-pass filter implemented with the transconductors was designed by TSMC 0.18 mum CMOS process. The measurement results show that the filter can operate with the cutoff frequency of 135 kHz to 2.2 MHz. The tuning range and the linearity performance would be suitable for the wireless specifications of GSM, Bluetooth, cdma2000, and wide-band CDMA. In the design, the maximum power consumption at the highest cutoff frequency is 2 mW under a 1-V supply voltage.     

A <Emphasis Type="Italic">G</Emphasis><Subscript><Emphasis Type="Italic">m</Emphasis></Subscript><Emphasis Type="Italic">-C</Emphasis> continuous-time analog filter for IEEE 802.11 a/b/g/n wireless LANs

A CMOS transconductor for multi-mode wireless channel selection filter is presented. The linear transconductor is designed based on the flipped-voltage follower (FVF) circuit and an active resistor to achieve the transconductance tuning. The transconductance tuning can be obtained by changing the bias current of the active resistor. A third-order Butterworth low-pass filter implemented with the transconductors was designed by TSMC 0.18-μm CMOS process. The results show that the filter can operate with the cutoff frequency of 10–20 MHz. The tuning range would be suitable for the specifications of IEEE 802.11 a/b/g/n Wireless LANs under the consideration of saving chip areas. In the design, the maximum power consumption is 13 mW with the cutoff frequency of 20 MHz under a 1.8 V supply voltage.     

低电压高线性度宽输入范围Gm-C滤波器实现

本文采用低电压高线性度宽输入范围跨导运算放大器设计实现四阶Chebyshev低通滤波器,对所设计的四阶Chebyshev传输函数应用两个双二次节Gm-C滤波单元元级联实现,3．3V电源电压的全差分跨导运算放大器在1V输入信号范围内Gm值的线性度波动小于0．5％,0．5μmCMOS工艺MOS管级的计算机仿真结果表明所提出的电路方案正确有效,适于全集成。     

A low power tunable Gm–C filter based on double CMOS inverters in 0.35?μm

In this article, an inverter based transconductor using double CMOS pair is proposed for implementation of a second order lowpass G_m?CC Filter. The proposed operational transconductance amplifier (OTA) and biquad filter are designed using standard 0.35???m CMOS technology. Simulation results demonstrate the central frequency tunability from 10?kHz to 2.8?MHz which is suitable for the wireless specifications of Bluetooth (650?kHz), CDMA 2000 (700?kHz) and Wideband CDMA (2.2?MHz) applications. The power consumption of the filter is 445?nW and 178???W at 10?kHz and 2.8?MHz from 3.3?V supply voltage, respectively. The active area occupied by the designed filter on the silicon is 215?×?720???m². The proposed approach guarantees the upper bound on THD to be ?40?dB for 300?mVpp signal swing. Employing the double CMOS pair in the inverters causes PSRR to reach 68.6?dB which is higher than similar works.     

Highly Linear Tunable CMOS $Gm{hbox{-}}C$ Low-Pass Filter

A comprehensive analysis of tunable transconductor topologies based on passive resistors is presented. Based on this analysis, a new CMOS transconductor is designed, which features high linearity, simplicity, and robustness against geometric and parametric mismatches. A novel tuning technique using just a MOS transistor in the triode region allows the adjustment of the transconductance in a wide range without affecting the voltage-to-current conversion core. Measurement results of the transconductor fabricated in a 0.5- mum CMOS technology confirm the high linearity predicted. As an application, a third-order Gm-C tunable low-pass filter fabricated in the same technology is presented. The measured third-order intermodulation distortion of the filter for a single 5-V supply and a 2-V_pp two-tone input signal centered at 10 MHz is -78 dB.     

A large-signal very low-distortion transconductor forhigh-frequency continuous-time filters

A high-frequency large-signal very low-distortion voltage-to-current transducer is presented. The total harmonic distortion (THD), for supply voltages of only ±2.5 V, is smaller than 0.1% for fully differential input signals up to 2.4 V peak to peak (V_pp). The dynamic range is on the order of 89 dB with the transconductor noise integrated over a bandwidth of 1 MHz. Moreover, this structure presents low sensitivity to transistor mismatches. An operational transconductance amplifier (OTA), based on this transconductor, has been used in an adjustable quality factor 1.8-MHz biquadratic continuous-time filter. The quality factor Q is controlled, from 2 to 50, with a novel current-source configuration. Both the OTA and the filter have been fabricated in a CMOS 3-μm n-well process     

A Novel Tunable Transconductance Amplifier Based on Voltage-Controlled Resistance by MOS Transistors

A new tunable transconductance amplifier is proposed for the programmable analog signal processing or low power filter applications. The transconductor linearization is based on the compensation of nonlinear behaviour by two MOS transistors. The transconductance amplifier in this brief exhibits the good common-mode dynamic range and the voltage-controlled transconductance. HSPICE circuit simulation using 0.18-$muhbox m$standard CMOS technology shows the$pm$50% tunable transconductance range with the$pm$0.2-V control voltage, and the linearity of less than 60 dB in the total harmonic distortion for the 0.6$hbox V_ PP$input signal.     

A New CMOS Programmable Balanced Output Transconductor and Application to a Mixed Mode Universal Filter Suitable for VLSI

A new CMOS programmable balanced output transconductor (BOTA) is introduced. The BOTA is a useful block for continuous-time analog signal processing. A new CMOS realization based on MOS transistors operating in the saturation region is given. Application of the BOTA in realizing a mixed mode universal filter using six BOTAs and two grounded capacitors is also introduced. The filter's gain can be adjusted simply by varying the amplitude of a transconductance through its control voltage without affecting ₀ and Q of the filter. Also, the Q of the filter can be adjusted by a single transconductor independent of ₀. PSpice simulation results for the BOTA circuit and for the universal filter are also given.     

A CMOS transconductor with 80-dB SFDR up to 10 MHz

A CMOS transconductor uses resistors at the input and an OTA in unity-gain feedback to achieve 80-dB spurious-free dynamic range (SFDR) for 3.6-V_pp differential inputs up to 10 MHz. The combination of resistors at the input and negative feedback around the operational transconductance amplifier (OTA) allows this transconductor to accommodate a differential input swing of 4 V with a 3.3-V supply. The total harmonic distortion (THD) of the transconductor is -77 dB at 10 MHz for a 3.6-V_pp differential input and third-order intermodulation spurs measure less than -79 dBe for 1.8-V_pp differential inputs at 1 MHz. The transconductance core dissipates 10.56 mW from a 3.3-V supply and occupies 0.4 mm² in a 0.35-μm CMOS process     

New CMOS triode transconductor

A new CMOS transconductor is proposed, which is built around two conversion transistors operating in the triode region with their source and drain voltages kept constant. The proposed transconductor has an input swing range of 7 V peak to peak within 1% THD at supply voltages of ±5 V and a large transconductance tuning range. Moreover, it can operate satisfactorily regardless of the transistor body connection