Ledge-flow-controlled catalyst interface dynamics during Si nanowire growth

Self-assembled nanowires offer the prospect of accurate and scalable device engineering at an atomistic scale for applications in electronics, photonics and biology. However, deterministic nanowire growth and the control of dopant profiles and heterostructures are limited by an incomplete understanding of the role of commonly used catalysts and specifically of their interface dynamics. Although catalytic chemical vapour deposition of nanowires below the eutectic temperature has been demonstrated in many semiconductor-catalyst systems, growth from solid catalysts is still disputed and the overall mechanism is largely unresolved. Here, we present a video-rate environmental transmission electron microscopy study of Si nanowire formation from Pd silicide crystals under disilane exposure. A Si crystal nucleus forms by phase separation, as observed for the liquid Au-Si system, which we use as a comparative benchmark. The dominant coherent Pd silicide/Si growth interface subsequently advances by lateral propagation of ledges, driven by catalytic dissociation of disilane and coupled Pd and Si diffusion. Our results establish an atomistic framework for nanowire assembly from solid catalysts, relevant also to their contact formation.     

Epitaxial growth of silicon nanowires using an aluminium catalyst

Silicon nanowires have been identified as important components for future electronic and sensor nanodevices. So far gold has dominated as the catalyst for growing Si nanowires via the vapour-liquid-solid (VLS) mechanism. Unfortunately, gold traps electrons and holes in Si and poses a serious contamination problem for Si complementary metal oxide semiconductor (CMOS) processing. Although there are some reports on the use of non-gold catalysts for Si nanowire growth, either the growth requires high temperatures and/or the catalysts are not compatible with CMOS requirements. From a technological standpoint, a much more attractive catalyst material would be aluminium, as it is a standard metal in Si process lines. Here we report for the first time the epitaxial growth of Al-catalysed Si nanowires and suggest that growth proceeds via a vapour-solid-solid (VSS) rather than a VLS mechanism. It is also found that the tapering of the nanowires can be strongly reduced by lowering the growth temperature.     

Aging effect on the conductance of discontinuous copper films

Room temperature void growth and intermetallic compound formation during interdiffusion in a thin film gold/lead diffusion couple were examined by transmission electron microscopy. It was found that the extent of intermetallic compound formation can be effectively reduced by the presence of a thin oxide layer grown on the lead film. Furthermore, the oxide layer allowed the original gold structure to be retained, so that the study of void growth due to interdiffusion was possible. Excess vacancies induced by the Kirkendall effect appeared to contribute to the growth of pre-existing voids in the gold film. In the absence of a lead oxide layer, interdiffusion was practically complete after aging for several weeks at room temperature. By this time the gold/lead film consisted almost entirely of intermetallic compounds.     

Morphology of self-catalyzed GaN nanowires and chronology of their formation by molecular beam epitaxy

GaN nanowires are synthesized by plasma-assisted molecular beam epitaxy on Si(111) substrates. The strong impact of the cell orientation relative to the substrate on the nanowire morphology is shown. To study the kinetics of growth, thin AlN markers are introduced periodically during NW growth. These markers are observed in single nanowires by transmission electron microscopy, giving access to the chronology of the nanowire formation and to the time evolution of the nanowire morphology. A long delay precedes the beginning of nanowire formation. Then, their elongation proceeds at a constant rate. Later, shells develop on the side-wall facets by ascending growth of layer bunches which first agglomerate at the nanowire foot.     

Electrical Characteristics of Hybrid Nanoparticle–Nanowire Devices

Gold nanoparticles synthesized by a colloidal method were deposited in an Al₂O₃ dielectric layer of an omega-gated single ZnO nanowire FET. These gold nanoparticles were utilized as localized trap sites. The adsorption of the gold nanoparticles on an Al₂O₃-coated ZnO nanowire was confirmed by high-resolution transmission electron microscopy. In this study, a hybrid nanoparticle-nanowire device was fabricated by conventional Si processing. Its electrical characteristics indicated that electrons in the conduction band of the ZnO nanowire can be transported to the localized trap sites by gold nanoparticles for gate voltages greater than 1 V, through the 10-nm-thick Al ₂O₃ tunneling oxide layer.     

Growing Oxide Nanowires and Nanowire Networks by Solid State Contact Diffusion into Solution‐Processed Thin Films

New techniques to directly grow metal oxide nanowire networks without the need for initial nanoparticle seed deposition or postsynthesis nanowire casting will bridge the gap between bottom‐up formation and top‐down processing for many electronic, photonic, energy storage, and conversion technologies. Whether etched top‐down, or grown from catalyst nanoparticles bottom‐up, nanowire growth relies on heterogeneous material seeds. Converting surface oxide films, ubiquitous in the microelectronics industry, to nanowires and nanowire networks by the incorporation of extra species through interdiffusion can provide an alternative deposition method. It is shown that solution‐processed thin films of oxides can be converted and recrystallized into nanowires and networks of nanowires by solid‐state interdiffusion of ionic species from a mechanically contacted donor substrate. NaVO₃ nanowire networks on smooth Si/SiO₂ and granular fluorine‐doped tin oxide surfaces can be formed by low‐temperature annealing of a Na diffusion species‐containing donor glass to a solution‐processed V₂O₅ thin film, where recrystallization drives nanowire growth according to the crystal habit of the new oxide phase. This technique illustrates a new method for the direct formation of complex metal oxide nanowires on technologically relevant substrates, from smooth semiconductors, to transparent conducting materials and interdigitated device structures.     

Selective-area catalyst-free MBE growth of GaN nanowires using a patterned oxide layer

GaN nanowires (NWs) were grown selectively in holes of a patterned silicon oxide mask, by rf-plasma-assisted molecular beam epitaxy (PAMBE), without any metal catalyst. The oxide was deposited on a thin AlN buffer layer previously grown on a Si(111) substrate. Regular arrays of holes in the oxide layer were obtained using standard e-beam lithography. The selectivity of growth has been studied varying the substrate temperature, gallium beam equivalent pressure and patterning layout. Adjusting the growth parameters, GaN NWs can be selectively grown in the holes of the patterned oxide with complete suppression of the parasitic growth in between the holes. The occupation probability of a hole with a single or multiple NWs depends strongly on its diameter. The selectively grown GaN NWs have one common crystallographic orientation with respect to the Si(111) substrate via the AlN buffer layer, as proven by x-ray diffraction (XRD) measurements. Based on the experimental data, we present a schematic model of the GaN NW formation in which a GaN pedestal is initially grown in the hole.     

Ultra-sharp pointed tip Si nanowires produced by very high frequency plasma enhanced chemical vapor deposition via VLS mechanism

Needle-like silicon nanowires have been grown using gold colloid as the catalyst and silane (SiH₄) as the precursor by very high frequency plasma enhanced chemical vapor deposition (VHF-PECVD). Si nanowires produced by this method were unique with sharpness below 3 nm. High resolution transmission electron microscopy (HRTEM) and X-ray diffraction technique (XRD) confirmed the single crystalline growth of the Si nanowires with (111) crystalline structure. Raman spectroscopy also has revealed the presence of crystalline Si in the grown Si nanowire body. In this research, presence of a gold nanoparticle on tip of the nanowires proved vapor–liquid–solid growth mechanism.     

Manufacturing aspects of oxide nanowires

Exploring the mass manufacturing aspects of nanostructures can enable the transition from laboratory-based research into a commercial product. Among the several one-dimensional nanostructures, oxide nanomaterials have a wide variety of applications including energy harvesting, photonics and biosensing applications. In this article, mass manufacturing aspects of bottom-up grown silica nanowires on silicon (Si) by metal thin film catalysis have been detailed. The investigation reports on (a) a growth model derived from studying nanowire nucleation as a function of heating time, (b) nanowire growth rate estimation via weight differential of the Si substrate before and after growth, and (c) reusability of the Si substrate for nanowire growth.Silica nanowires were found to grow on Pd coated Si substrate in an open tube furnace at 1100 °C with Ar as a carrier gas and a Si support wafer. Nanowires nucleated following a combination of Vapor Liquid Solid (VLS) and Oxide Assisted Growth (OAG) mechanisms conducive for mass manufacturing. The role of SiO vapor was found to be critical in the growth of the wires. Further, five distinct growth regimes were identified while estimating the growth rate. Experimental observations indicated the non-reusability of the Si substrate after one time growth due to depletion of catalyst.     

Epitaxial insertion of gold silicide nanodisks during the growth of silicon nanowires

Nanodisk-shaped, single-crystal gold silicide heterojunctions were inserted into silicon nanowires during vapor-liquid-solid growth using Au as a catalyst within a specific range of chlorine-to-hydrogen atomic ratio. The mechanism of nanodisk formation has been investigated by changing the source gas ratio of SiCl4 to H2. We report that an over-supply of silicon into the Au-Si liquid alloy leads to highly supersaturated solution and enhances the precipitation of Au in the silicon nanowires due to the formation of unstable phases within the liquid alloy. It is shown that the gold precipitates embedded in the silicon nanowires consisted of a metastable gold silicide. Interestingly, faceting of gold silicide was observed at the Au/Si interfaces, and silicon nanowires were epitaxially grown on the top of the nanodisk by vapor-liquid-solid growth. High resolution transmission electron microscopy confirmed that gold silicide nanodisks are epitaxially connected to the silicon nanowires in the direction of growth direction. These gold silicide nanodisks would be useful as nanosized electrical junctions for future applications in nanowire interconnections.     

Uniform and position-controlled InAs nanowires on 2" Si substrates for transistor applications

This study presents a novel approach for indirect integration of InAs nanowires on 2' Si substrates. We have investigated and developed epitaxial growth of InAs nanowires on 2' Si substrates via the introduction of a thin yet high-quality InAs epitaxial layer grown by metalorganic vapor phase epitaxy. We demonstrate well-aligned nanowire growth including precise position and diameter control across the full wafer using very thin epitaxial layers (<300 nm). Statistical analysis results performed on the grown nanowires across the 2' wafer size verifies our full control on the grown nanowire with 100% growth yield. From the crystallographic viewpoint, these InAs nanowires are predominantly of wurtzite structure. Furthermore, we show one possible device application of the aforementioned structure in vertical wrap-gated field-effect transistor geometry. The vertically aligned InAs nanowires are utilized as transistor channels and the InAs epitaxial layer is employed as the source contact. A high uniformity of the device characteristics for numerous transistors is further presented and RF characterization of these devices demonstrates an f(t) of 9.8 GHz.     

Metal on metal oxide nanowire Co-catalyzed Si photocathode for solar water splitting

We report a systematic study of Si|ZnO and Si|ZnO| metal photocathodes for effective photoelectrochemical cells and hydrogen generation. Both ZnO nanocrystalline thin films and vertical nanowire arrays were studied. Si|ZnO electrodes showed increased cathodic photocurrents due to improved charge separation by the formation of a p/n junction, and Si|ZnO:Al (n(+)-ZnO) and Si|ZnO(N(2)) (thin films prepared in N(2)/Ar gas) lead to a further increase in cathodic photocurrents. Si|ZnONW (nanowire array) photocathodes dramatically increased the photocurrents and thus photoelectrochemical conversion efficiency due to the enhanced light absorption and enlarged surface area. The ZnO film thickness and ZnO nanowire length were important to the enhancements. A thin metal coating on ZnO showed increased photocurrent due to a catalyzed hydrogen evolution reaction and Ni metal showed comparable catalytic activities to those of Pt and Pd. Moreover, photoelectrochemical instability of Si|ZnO electrodes was minimized by metal co-catalysts. Our results indicate that the metal and ZnO on p-type Si serve as co-catalysts for photoelectrochemical water splitting, which can provide a possible low-cost and scalable method to fabricate high efficiency photocathodes for practical applications in clean solar energy harvesting.     

Mo-Co catalyst nanoparticles: Comparative study between TiN and Si surfaces for single-walled carbon nanotube growth

Highly pure single-walled carbon nanotubes (SWNT) were synthesized by alcohol catalytic chemical vapor deposition on silicon substrates partially covered by a thin layer of TiN. The TiN coating selectively prevented the growth of carbon nanotubes. Field emission scanning electron microscopy and Raman spectroscopy revealed the formation of high purity vertically aligned SWNT in the Si region. X-ray Photoelectron Spectroscopy and Atomic Force Microscopy indicated that Co nanoparticles are present on the Si regions, and not on the TiN regions. This clearly explains the obtained experimental results: the SWNT only grow where the Co is presented as nanoparticles, i.e. on the Si regions.     

Misfit-guided self-organization of anticorrelated ge quantum dot arrays on si nanowires

Misfit-strain guided growth of periodic quantum dot (QD) arrays in planar thin film epitaxy has been a popular nanostructure fabrication method. Engineering misfit-guided QD growth on a nanoscale substrate such as the small curvature surface of a nanowire represents a new approach to self-organized nanostructure preparation. Perhaps more profoundly, the periodic stress underlying each QD and the resulting modulation of electro-optical properties inside the nanowire backbone promise to provide a new platform for novel mechano-electronic, thermoelectronic, and optoelectronic devices. Herein, we report a first experimental demonstration of self-organized and self-limited growth of coherent, periodic Ge QDs on a one-dimensional Si nanowire substrate. Systematic characterizations reveal several distinctively different modes of Ge QD ordering on the Si nanowire substrate depending on the core diameter. In particular, Ge QD arrays on Si nanowires of around 20 nm diameter predominantly exhibit an anticorrelated pattern whose wavelength agrees with theoretical predictions. The correlated pattern can be attributed to propagation and correlation of misfit strain across the diameter of the thin nanowire substrate. The QD array growth is self-limited as the wavelength of the QDs remains unchanged even after prolonged Ge deposition. Furthermore, we demonstrate a direct kinetic transformation from a uniform Ge shell layer to discrete QD arrays by a postgrowth annealing process.     

Manipulation of Crawling Growth for the Formation of Sub-millimeter Long ZnO Nanowalls

Vapor-phase growth of ZnO nanowires based on gold catalyst is usually accompanied with lateral crawling growth on the substrate surface. We present results from our systematic experiments where the growth temperature and catalyst size are controlled. The data corroborate that it is possible to obtain clean vertical nanowire arrays while avoiding the crawling growth. 0% the other hand, crawling growth can be manipulated to obtain root-interconnected nanowire arrays, which could be useful for certain applications. Our results also imply that the previously suggested growth mechanism for the wire-on-wall hybridstructure might be incorrect. Finally, we show the formation of sub-millimeter long, straight ZnO nanowalls by combining a gold-catalyzed epitaxial growth of vertical nanowires and their mergence due to a confined crawling growth. These unconventional nanostructures might have unique electric or optical transport properties.     

Metal Oxide Nanostructures from Simple Metal-oxygen Reaction in Air

Metal oxide nanostructures （CuO, Co3O4, ZnO and α-Fe2O3） have been successfully fabricated by a simple and efficient method： heating the appropriate metals in air at low temperatures ranging from 200 to 400℃. The chemical composition, morphology and crystallinity of the nanostructures have been characterized by micro-Raman spectroscopy, X-ray diffraction, scanning electron microscopy and transmission electron microscopy. Two mechanisms： vapor-solid and surface diffusion play dominant roles in the growth of metal oxide nanostructures starting with low melting point metals （Zn and Cu） and high melting point metals （Fe and Co）, respectively. With sharp ends and large aspect ratio, the metal oxide nanostructures exhibit impressive field-induced electron emission properties, indicating their potentials as future electron source and displays. The water wettability and anti-wettability properties of iron oxide nanoflakes were also discussed in this work.     

The growth mechanism for silicon oxide nanowires synthesized from an Au nanoparticle/polyimide/Si thin film stack

During pyrolysis of polyimide (PI) thin film, amorphous silicon oxide nanowires (SiO(x)NWs) were produced on a large scale through heat treatment of an Au nanoparticle/PI/Si thin film stack at 1000?°C. It was shown that carbonization of the PI film preceded the nucleation of the SiO(x)NWs. The formation of the SiO(x)NWs was sustained by the oxygen derived from carbonization of the polyimide thin film while Si was provided from the substrate. Au nanoparticles promoted the SiO(x)NW growth by inducing localized melting of the Si substrate and by catalyzing the nanowire growth.     

Growth of nickel silicides in Si and Si/SiOx core/shell nanowires

We exploited the oxide shell structure to explore the structure confinement effect on the nickel silicide growth in one-dimensional nanowire template. The oxide confinement structure is similar to the contact structure (via hole) in the thin film system or nanodevices passivated by oxide or nitride film. Silicon nanowires in direct contact with nickel pads transform into two phases of nickel silicides, Ni31Si12 and NiSi2, after one-step annealing at 550 °C. In a bare Si nanowire during the annealing process, NiSi2 grows initially through the nanowire, followed by the transformation of NiSi2 into the nickel-rich phase, Ni31Si12 starting from near the nickel pad. Ni31Si12 is also observed under the nickel pads. Although the same phase transformations of Si to nickel silicides are observed in nanowires with oxide confinement structure, the growth rate of nickel silicides, Ni31Si12 and NiSi2, is retarded dramatically. With increasing oxide thickness from 5 to 50 nm, the retarding effect of the Ni31Si12 growth and the annihilation of Ni2Si into the oxide confined-Si is clearly observed. Ni31Si12 and Ni2Si phases are limited to grow into the Si/SiOx core-shell nanowire as the shell thickness reaches 50 nm. It is experimental evidence that phase transformation is influenced by the stressed structure at nanoscale.     

Oxidative fabrication of patterned, large, non-flaking CuO nanowire arrays

We report a simple and fast approach to fabricate large, non-flaking arrays of CuO nanowires by oxidizing thin copper substrates in air. Oxidative CuO nanowire growth is commonly accompanied by oxide layer flaking due to stress at the copper-copper oxide interface. Using thin substrates is shown to prevent this flaking by introducing favourable material thickness ratios in the samples after oxidation. Additionally, thin foils allow larger scale topographic patterns to be transferred from an underlying mould to realize non-flat, nanowire-decorated surfaces. Further patterning is possible by electrodeposition of a nickel layer, which restricts nanowire growth to specific areas of the sample.     

高压PLD法生长p型钠掺杂氧化锌纳米线阵列

采用高压脉冲激光沉积法(HP-PLD)研究了压强、金催化层厚度对钠掺杂氧化锌纳米线(ZnO:Na)生长的影响, 并制备了ZnO:Al薄膜/ZnO:Na纳米线阵列同质pn结器件。实验发现, 当金膜厚度为4.2 nm, 生长压强为3.33×10⁴ Pa, 生长温度为875℃时, 可在单晶Si衬底上生长c轴取向性良好的ZnO纳米线阵列。X射线衍射和X射线光电子能谱综合分析证实了Na元素成功掺入ZnO纳米线晶格中。在低温(15 K)光致发光谱中, 观测到了一系列由Na掺杂ZnO产生引起的受主光谱指纹特征, 如中性受主束缚激子峰(3.356 eV, A0X)、导带电子到受主峰(3.312 eV, (e, A0))和施主受主对发光峰(3.233 eV, DAP)等。通过在ZnO:Al薄膜上生长ZnO:Na纳米线阵列形成同质结, 测得I-V曲线具有明显的整流特性, 证实了ZnO:Na纳米线具有良好的p型导电性能。