共查询到20条相似文献,搜索用时 15 毫秒
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Bart De Geeter Olivier Nys Jean-Paul Bardyn 《Analog Integrated Circuits and Signal Processing》1997,14(3):179-191
A pressure sensor interface circuit featuring micropower consumptionis presented. The sensitivity to leakage currents has been reduced, allowingoperation at high temperature. Special attention has been paid to minimisealiasing in the sampled interface. An optimal combination of contradictoryrequirements on power consumption, temperature range and sampling speed wasobtained by a very careful system design and optimisation. The circuitconverts a sensor capacitance variation of ±5pF into an 11 bit outputword at a 2Hz rate. This resolution is guaranteed in the –40°C to100°C temperature range. It may slowly decay above 100°C but ensuresat least 5 bit at 130°C. The power consumption at room temperature issmaller than 2µA from a 2.4V to 4V battery. 相似文献
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《Electron Devices, IEEE Transactions on》2009,56(1):20-30
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MEMS加速度计接口电路主要采用传统sigma-delta架构实现,但这种方式中的电路失调电压很容易产生积分饱和现象.为解决这个问题,本文设计了一种可以用于钻井、石油勘探等微弱信号检测的新型数字电容接口电路.该设计在电容式MEMS加速度传感器基础上,采用FPGA实现数字三阶环路滤波器,构成5阶sigma-delta系统.采用数字环路滤波器降低了ASIC模拟电路版图设计与芯片测试难度,利于快速优化环路滤波器设计参数,改善系统稳定性和优化系统噪声性能.前置放大器采用一种相对简单的相关双采样技术,能够有效减小前置放大器的失调电压.根据MEMS加速度计前置放大器输出信号符合正态分布的特点,设计了带有一定预测功能的8-bit瞬时浮点ADC,实现模拟与数字环路滤波器互联.在200Hz带宽内,该接口电路系统噪声基底达到53.09ng/rt(Hz),满足系统噪声设计要求.前置放大器与ADC采用XFAB XH018混合信号CMOS工艺流片,开环测试表明,前置放大器的灵敏度和噪声分别为0.69V/pF和3.20μV/rt(Hz). 相似文献
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A Low-Power Multiphase Circuit Technique 总被引:1,自引:0,他引:1
《Solid-State Circuits, IEEE Journal of》1967,2(4):213-220
The principle of multiphase MOS digital circuits is briefly discussed and the features of some presently used multi-phase schemes are given. The basic theory and implementation of a six-phase scheme, which make use of a basic principle not normally considered in low-power digital circuitry, are then described, and the first-order equations for power dissipation are derived. The theoretical power dissipation of a six-phase shift register is compared to the power dissipation of equivalent shift registers using other low-power circuit techiques, including the complementary MOS transistor technique, and it is shown that the six-phase technique has the lowest power dissipation from very low frequencies up to a limiting high frequency. Finally, the power dissipation of an actual six-phase circuit is compared to the dissipation predicted from the derived equations. 相似文献
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本文给出一种互补型CML电路,该电路可以工作在很低的功耗下,具有很高的开关速度。mwSPICE仿真结果表明,单门功耗为0.5mW和0.2mW时,平均门延时可分别低达18ps和30.5ps。 相似文献
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Janusz A. Starzyk Haibo He 《Circuits and Systems II: Express Briefs, IEEE Transactions on》2007,54(2):176-180
This brief proposes a novel low-power digital logic design scheme based on the energy exchange in the switched inductor-capacitor (SLC) circuit. It presents a design paradigm which in ideal case may lead to a circuit capable of performing logic operations with no switching losses. In traditional integrated circuit design, the energy is stored in the output load capacitor through a pull-up path (corresponding to storing a logic 1). When the output changes its logic value, this stored energy is dissipated through the pull down path to the ground. In order to reduce this switching energy dissipation each time the load capacitor is discharged, we store its energy in the magnetic field of the inductor in the proposed SLC architecture. Whenever the output load needs to be charged again, we transfer the energy back from the inductor to the load capacitor. This significantly reduces the switching energy. We illustrated the operation of the SLC architecture through SPICE simulation. A brief discussion of some practical considerations for this architecture is also presented 相似文献
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在分析电容式MEMS麦克风工作原理的基础上,提出了一种用于电容式MEMS麦克风的读出电路.该读出电路包括低极点频率的高通滤波器和低噪声单位增益缓冲器,高通滤波器用来读出MEMS麦克风在声压作用下产生的小信号,单位增益缓冲器用来隔离高通滤波器和后续信号处理电路,并提供较大的驱动能力.仿真结果表明,当电源电压在1.2~3.6V之间时,读出电路都可以正常工作,且静态电流小于60 μA,等效输入噪声为5.2 μV,电压增益大于-1.56 dB(83.6%).由于消除了失调电压的影响,电路可以处理幅度范围为50 μV~200 mV的小信号(参考X-FAB 0.35 μm CMOS工艺). 相似文献
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本文主要介绍一种高速低功耗EPROM读写电路,包括EPROM单元管、读写电路,以及产生写EPROM所需高电压的高电压发生器,并着重分析了EPROM读写电路低功耗的特点。 相似文献
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一种低功耗高可靠性的CMOS过流保护电路 总被引:4,自引:0,他引:4
提出了一种结构简单、功能可靠的CMOS过流保护电路。通过增加foldback功能有效地降低了电路损失的功耗,并且提高了系统的可靠性。在SAMSUNG0.6μmCMOS工艺下,Hspice模拟仿真结果证明该电路工作可靠、性能优良,可广泛应用于功率开关器件如MOSFET的保护电路中。 相似文献
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