一种蔡氏硬件电路系统的研究

由于混沌是貌似随机的非随机运动。它对初始条件的极端敏感性。蔡氏电路出现后,通过非线性电路研究混沌产生涡卷成为可能,而蔡氏混沌电路产生涡卷吸引子方法多种多样,利用非线性多项式产生三涡卷混沌吸引子为例,对蔡氏电路进行数学模型分析,然后进行MATLAB仿真。再此基础上,对蔡氏电路进行Multisim仿真同样可以产生三涡卷混沌吸引子,并通过硬件电路系统实现,该硬件电路能够产生三涡卷吸引子,并且可作为一个信号发生电路应用。     

集成电路中接口电路的可靠性设计

在集成电路设计中,可将承担静电放电保护、电平转换、电路驱动等功能的电路组合成接口电路,通过对接口电路的可靠性设计来提高集成电路的可靠性。从电路设计、版图设计、封装设计等设计阶段的特点出发,阐述了各阶段可靠性设计的内容,并总结了一些设计要点和设计准则,提出了可采用接口电路、封装、PCB三者协同设计的方法,以提高接口电路的可靠性。     

蔡氏电路的实验制作

本文以一个简单的经典蔡氏电路作为电子技术综合实训的实验制作电路,指导学生进行工作原理分析、状态方程建模、数值仿真、运算放大器形式的蔡氏二极管等效电路设计,以及实验观察.蔡氏电路的实验制作可以让学生从简单的电路中观察到丰富的非线性物理现象,可以巩固学生对已学内容的理解.     

三相短路冲击电流出现时刻的分析

对于无穷大电源供电的50 Hz感性电路而言,冲击电流约出现在突然短路后的0.01 s。但不同时间常数的电路所对应的冲击电流出现时刻会有所差异。为此有必要分析实际电路中冲击电流出现时刻与0.01 s的最大差异,即最不利的情况。经过分析认为:冲击电流出现在短路发生后的(0.0096,0.01)s,即其与0.01 s的最小比值大于96%。另外,冲击电流出现时刻与电路时间常数的关系是非单调变化的。     

Implementation of Chua's circuit using simulated inductance

In this study we describe how to build an inductorless version of the classic Chua's circuit. A suitable inductor for Chua's circuit is often hard to procure. The required inductor for the circuit is designed using simple circuit elements such as resistors, capacitors and operational amplifiers. The complete circuit can be implemented by using off-the-shelf components, and it can readily be integrated on a single chip. This design of Chua's circuit allows the original dynamics to be slowed down to just a few hertz, enabling implementation of sophisticated control schemes without severe time restrictions. Another novel feature of the circuit is that losses associated with capacitors due to leakages can easily be compensated by providing negative resistance using the same setup. The chaotic behaviour of the circuit is verified by PSpice and Multisim simulation and also by experimental study on a circuit breadboard. The results give excellent agreement with each other and with the results of previous investigators.     

基于二极管的限幅蔡氏电路实验研究

根据经典蔡氏电路的数学模型,获得系统各个变量之间的运算关系,利用运算放大器、电阻、电容及二极管等元器件,完成非线性限幅函数的电路设计,实现无电感元件的等效蔡氏电路硬件实验图。结果表明,通过调试电路中电阻值,可以直接从示波器观测到蔡氏电路的三个运动变量,包括周期、单涡卷、双涡卷等运动行为的时序图和相位图。搭建的电路结构简单,学生实验时调试容易,并且由于电路中不含电感元件,实验过程中混沌吸引子的稳定性也明显得到了提高。     

超高速单电源GaAs判决再生电路

设计并模拟分析了光纤通信用超高速单电源 Ga As判决再生电路 ,采用非掺 SI Ga As衬底直接离子注入、1μm耗尽型 Ga As MESFET、平面电路工艺研制出单片 Ga As判决再生电路。实验测试结果表明 ,该电路可对输入信号进行正确的“0”、“1”判决 ,并经时钟抽样后 ,输出正确的数字信号 ,传输速率可达 2 .8Gbit/s,可用于覆盖 2 .5Gbit/s系列光通信系统     

基于Multisim 10的射频LNA仿真和设计

NI Multisim 10是著名的EDA软件,其仿真功能非常强大,RF电路中LNA的设计是一个难题。使用Multisim设计RF LNA电路,利用虚拟网络分析仪和Smith圆图,对典型RF LNA电路的各种参数进行仿真测试,进而设计阻抗匹配网络,优化电路性能,在设计实践中取得了很好的效果。这对于通信电子产品的设计,对于RF电路的教学和创新型实验具有重要的意义。     

基于二叉树的时序电路测试序列设计

为了实现时序电路状态验证和故障检测,需要事先设计一个输入测试序列。基于二叉树节点和树枝的特性,建立时序电路状态二叉树,按照电路二叉树节点(状态)与树枝(输入)的层次逻辑关系,可以直观和便捷地设计出时序电路测试序列。用测试序列激励待测电路,可以验证电路是否具有全部预定状态,是否能够实现预定状态转换。     

On the Potential Instability of an RC Active Filter with Op-amps

When we design a prescribed transfer function T(s) = Q(s)/P(s), the designed circuit surely realize the above T(s) if op-amps are ideal. However due to the above-mentioned frequency characteristics of op-amps there arise higher order terms in the denominator of the transfer function.These parasitic terms have positive or negative sign. Thus in the worst case we cannot cancel a negative term by positive terms because these coefficients are not predictable a priori.When we design the circuit, it is preferable to avoid the circuit which may be potentially unstable. It is therefore preferable to give some criteria for a class of circuit to be potentially unstable.This paper give some topological criteria for an op-amp circuit to be potentially unstable. The criteria is graph-theoretic, but the conclusion is very familiar to active circuit designer.     

On Current Feedback Operational Amplifier-Based Realization of Chua's Circuit

Because they offer some significant advantages over conventional operational amplifiers, current feedback operational amplifiers (CFOAs) have been used instead of voltage operational amplifiers (VOAs) in new implementations of the chaotic Chua’s circuit. In this study, after giving a comparative investigation of CFOA-based realizations of Chua’s circuit, we will present an alternative CFOA-based realization of Chua’s circuit combining the CFOA-based circuit topologies proposed for nonlinear resistor and inductor elements in the literature. This realization offers an alternative solution for readers studying Chua’s circuit and high-frequency chaotic oscillations. The PSpice simulation experiments performed in both the time and frequency domains confirm that the proposed circuit can generate the original chaotic oscillations of Chua’s circuit and that it exhibits excellent performance at high frequencies.     

电子电路的抗干扰控制分析

随着我国科技的不断发展,人们生活水平的不断提高,电子产品已经成为人们生活中不可缺少的一部分.电子电路源于十九世纪末期,其技术的发展速度在开始时较为迟缓,但随着社会科学技术的不断创新与进步,电子电路技术在二十世纪中期时,才开始得到真正意义上的发展.现如今伴随着电子电路技术的广泛应用,电子电路技术在我国已经得到了前所未有的进步.本文主要对电子电路的抗干扰技术进行概括及电子电路的主要干扰类型进行切实分析和研究,总结概括出电子电路抗干扰的详细方法,以此为相关从业人员提供参照和采纳.     

RC电路正弦稳态特性的Multisim仿真分析

基于探索大学物理电学实验仿真技术的目的,采用Multisim10仿真软件对RC电路正弦稳态特性进行了仿真实验分析。用多个四踪示波器以面板部分重叠方式显示电路中各电量的波形,可直观观测稳态时各电量的相位关系,定量测量反映超前、滞后关系的相位差及各电量的数值大小。将电路的硬件实验方式向多元化方式转移,利于培养知识综合、知识应用、知识迁移的能力,使电路分析更加灵活和直观。     

基于ADuC841的数据采集系统的设计

针对油田现场环境复杂,一直面临着因采集到的数据不准确的问题,采用ADI公司的ADuC841芯片设计了一种具有在油田现场实现数据采集的小型电路。该数据采集电路采用片内集成的A/D转换器,大大减小电路体积;满足系统的高温、高压工作环境以及低功耗。现在的数据采集系统速度更快,功能更强,精度更高,但是体积却显得更小,总体性价比越来越高。     

NBTI-Aware Design of Integrated Circuits: A Hardware-Based Approach for Increasing Circuits’ Life Time

Advances in CMOS technology have made possible the increase of integrated circuit’s density, which impacts directly on the circuit’s performance. However, technology scaling poses some reliability concerns that directly affect the circuit’s lifetime. One of the most important issues in nanoscale circuits is related to the time-dependent variation caused by Negative Bias Temperature Instability (NBTI). This phenomenon increases the threshold voltage of pMOS transistors, which introduces delay along the integrated circuits’ paths, eventually causing functional failures. In this paper, a hardware-based technique able to increase the lifetime of Integrated Circuits (ICs) is proposed. In more detail, the technique is based on an on-chip sensor able to monitor IC’s aging and to adjust its power supply voltage in order to minimize NBTI effects and increase the circuit’s lifetime. Experimental results obtained throughout simulations demonstrate the technique’s efficiency, since the circuit’s lifetime has been increased by 150 %. Finally, the analysis of the main overheads introduced as well as the impact related to process variation renders the evaluation of the proposed approach possible.     

IP网中40 Gbit/s链路需求解决方案

本文阐述了IP网中40 Gbit/s链路需求的背景,介绍了40 Gbit/s关键技术,提出了IP网中40 Gbit/s链路应用解决方案.     

大学物理实验RC电路时间常数的Multisim仿真测试

基于探索大学物理电学实验仿真技术的目的。采用Multisiml0仿真软件对RC电路时间常数参数进行了仿真实验测试。从RC电路电容充、放电时电容电压uc的表达式出发,分析了Mc与时间常数之间的关系,给出了几种Muhisim仿真测试时间常数的实验方案。仿真实验可直观形象地描述RC电路的工作过程及有关参数测试。将电路的硬件实验方式向多元化方式转移,利于培养知识综合、知识应用、知识迁移的能力,使电路分析更加灵活和直观。     

2.5Gb/s Ga As MESFET定时判决电路

设计了 2 .5 Gb/ s光纤通信用耗尽型 Ga As MESFET定时判决电路 .通过 SPICE模拟表明恢复的时钟频率达2 .5 GHz,判决电路传输速率达 2 .5 Gb/ s.实验证明经时钟信号抽样后判决电路可产生正确的数字信号 ,传输速率达 2 .5 Gb/ s     

LDMOS宽带功率放大器匹配电路设计

针对LDMOS宽带功率放大器匹配电路设计,提出了一种快速、有效的方法.采用多节并联导纳匹配法得出宽带匹配电路的初始值后,利用ADS软件对匹配网络的S参数进行优化.仿真结果为:在频率范围为1.3 GHz～2.3 GHz内,两端口的反射系数均小于-25 dB,匹配网路的传输系数接近0 dB.为实现更好的阻抗匹配,再用ADS...     

电流激励蔡氏电路混沌的解析预测

考虑到蔡氏电路受周围电路的影响,故将受周围影响的蔡氏电路做了等效处理,并将其等效为电流激励蔡氏电路。这里首次用解析的方法对三阶非线性微分方程能够产生混沌的参数范围进行预测,利用该方法得出电流激励蔡氏电路产生混沌的必要参数条件。通过数值仿真证明了该等效电路具有极其丰富的混沌动力学行为,仿真结果与解析预测结果有较好的吻合性。