Ultrafast growth of single-crystalline Si nanowires

Silicon nanowires (SiNWs) have been catalytically synthesized by heat treatment of Si nanopowder at 980 °C. The SiNWs comprise crystalline Si nanoparticles interconnected with metal catalyst. The formation mechanism of nanowires generally depends on the presence of Fe catalysts in the synthesis process of solid–liquid–solid (SLS). Although gas phase of vapor–liquid–solid (VLS) method can be used to produce various of different nanowire materials, growth model based on the SLS mechanism by heat treatment is more ascendant for providing ultrafast growth of single-crystalline Si nanowires and controlling the diameter of them easily. The growth of single-crystalline SiNWs and morphology were discussed.     

Transport modulation in Ge/Si core/shell nanowires through controlled synthesis of doped Si shells

Appropriately controlling the properties of the Si shell in Ge/Si core/shell nanowires permits not only passivation of the Ge surface states, but also introduces new interface phenomena, thereby enabling novel nanoelectronics concepts. Here, we report a rational synthesis of Ge/Si core/shell nanowires with doped Si shells. We demonstrate that the morphology and thickness of Si shells can be controlled for different dopant types by tuning the growth parameters during synthesis. We also present distinctly different electrical characteristics that arise from nanowire field-effect transistors fabricated using the synthesized Ge/Si core/shell nanowires with different shell morphologies. Furthermore, a clear transition in the modification of device characteristics is observed for crystalline shell nanowires following removal of the shell using a unique trimming process of successive native oxide formation/etching. Our results demonstrate that the preferred transport path through the nanowire structure can be modulated by appropriately tuning the growth conditions.     

Nitrogen-doped tungsten oxide nanowires: low-temperature synthesis on Si, and electrical, optical, and field-emission properties

Very dense and uniformly distributed nitrogen-doped tungsten oxide (WO(3)) nanowires were synthesized successfully on a 4-inch Si(100) wafer at low temperature. The nanowires were of lengths extending up to 5 mum and diameters ranging from 25 to 35 nm. The highest aspect ratio was estimated to be about 200. An emission peak at 470 nm was found by photoluminescence measurement at room temperature. The suggested growth mechanism of the nanowires is vapor-solid growth, in which gaseous ammonia plays a significant role to reduce the formation temperature. The approach has proved to be a reliable way to produce nitrogen-doped WO(3) nanowires on Si in large quantities. The direct fabrication of WO(3)-based nanodevices on Si has been demonstrated.     

Field nanoemitters: ultrathin BN nanosheets protruding from Si3N4 nanowires

Field emitters in nanoscale are important in micro/nanoelectronic devices. Here, we report a large scale synthesis and effective field emission of field nanoemitters. The integrated nanostructures of ultrathin BN nanosheets aligned on Si3N4 nanowires are prepared through a two-stage process. Si3N4 nanowires were previously synthesized through heating Si powder at 1500 degrees C under a N2 atmosphere. Ultrathin BN nanosheets were then deposited on Si3N4 nanowires by heating a homemade B-N-O precursor under a N2/NH3 atmosphere. The as-prepared nanofilaments act as cold electron emitters displaying excellent field emission performance owing to the untrathin and sharp edges of the protruding BN nanosheets.     

Si/InGaN core/shell hierarchical nanowire arrays and their photoelectrochemical properties

Three-dimensional hierarchical nanostructures were synthesized by the halide chemical vapor deposition of InGaN nanowires on Si wire arrays. Single phase InGaN nanowires grew vertically on the sidewalls of Si wires and acted as a high surface area photoanode for solar water splitting. Electrochemical measurements showed that the photocurrent density with hierarchical Si/InGaN nanowire arrays increased by 5 times compared to the photocurrent density with InGaN nanowire arrays grown on planar Si (1.23 V vs RHE). High-resolution transmission electron microscopy showed that InGaN nanowires are stable after 15 h of illumination. These measurements show that Si/InGaN hierarchical nanostructures are a viable high surface area electrode geometry for solar water splitting.     

Ultralong single-crystal metallic Ni2Si nanowires with low resistivity

Ultralong, single-crystal Ni2Si nanowires sheathed with amorphous silicon oxide were synthesized on a large scale by a chemical vapor transport (CVT) method, using iodine as the transport reagent and Ni2Si powder as the source material. Structural characterization using powder X-ray diffraction, electron microscopy, and energy-dispersive spectroscopy shows that the nanowires have Ni2Si-SiOx core-shell structure with single-crystal Ni2Si core and amorphous silicon oxide shell. The oxide shell is electrically insulating and can be removed by HF etching. Four-terminal electrical measurements show that the single-crystal nanowire has extremely low resistivity of 21 muOmega.cm and is capable of supporting remarkably high failure current density >108 A/cm2. These unique Ni2Si nanowires are very attractive nanoscale building blocks for interconnects and fully silicided (FUSI) gate applications in nanoelectronics.     

Controlled growth of Si nanowire arrays for device integration

Silicon nanowires were synthesized, in a controlled manner, for their practical integration into devices. Gold colloids were used for nanowire synthesis by the vapor-liquid-solid growth mechanism. Using SiCl4 as the precursor gas in a chemical vapor deposition system, nanowire arrays were grown vertically aligned with respect to the substrate. By manipulating the colloid deposition on the substrate, highly controlled growth of aligned silicon nanowires was achieved. Nanowire arrays were synthesized with narrow size distributions dictated by the seeding colloids and with average diameters down to 39 nm. The density of wire growth was successfully varied from approximately 0.1-1.8 wires/microm2. Patterned deposition of the colloids led to confinement of the vertical nanowire growth to selected regions. In addition, Si nanowires were grown directly into microchannels to demonstrate the flexibility of the deposition technique. By controlling various aspects of nanowire growth, these methods will enable their efficient and economical incorporation into devices.     

Ultimate bending strength of Si nanowires

Test platforms for the ideal strength of materials are provided by almost defect-free nanostructures (nanowires, nanotubes, nanoparticles, for example). In this work, the ultimate bending strengths of Si nanowires with radii in the 20-60 nm range were investigated by using a new bending protocol. Nanowires simply held by adhesion on flat substrates were bent through sequential atomic force microscopy manipulations. The bending states prior to failure were analyzed in great detail to measure the bending dynamics and the ultimate fracture strength of the investigated nanowires. An increase in the fracture strengths from 12 to 18 GPa was observed as the radius of nanowires was decreased from 60 to 20 nm. The large values of the fracture strength of these nanowires, although comparable with the ideal strength of Si, are explained in terms of the surface morphology of the nanowires.     

Site-controlled fabrication of dimension-tunable Si nanowire arrays on patterned (001)Si substrates

In this study, we fabricated well-ordered arrays of site-controlled, vertically-aligned Si nanowires on the desired areas of pre-patterned (001)Si substrates by employing the nanosphere lithographic technique in combination with the Au-assisted selective etching process. The results of transmission electron microscopy and selected-area electron diffraction analysis show that the Si nanowires that fabricated on the patterned (001)Si substrates have a single-crystalline nature and form along the [001] direction. The length of the Si nanowires was found to increase linearly with the Au-assisted etching time. Scanning electron microscopy images clearly revealed that by adjusting the sizes of the nanosphere template and the etching temperature and time, the diameter and length of the patterned Si nanowires could be effectively tuned and accurately controlled. Furthermore, the diameters of the Si nanowires produced at various temperatures and time were found to be relatively uniform over the entire length. The combined approach presented here provides the capability to fabricate a variety of size-, length-tunable 1D Si-based nanostructures on various patterned Si-based substrates.     

Growth of GaAs Nanowires on Si Substrates Using a Molecular Beam Epitaxy

Au-catalyzed GaAs nanowires were grown on Si substrates by vapor-liquid-solid growth method using a molecular beam epitaxy (MBE). The MBE growth could produce controlled crystalline orientation and uniform diameter along the wire axis of the GaAs nanowires by adjusting growth conditions including growth temperature and V/III flux ratio. Growths of GaAslang001rang as well as GaAslang111rang nanowires were observed by transmission electron microscopy and scanning electron microscopy. Epitaxially grown GaAslang111rang nanowires on a Si(111) substrate were verified through x-ray diffraction out-of-plane 2thetas/omega-scans. A strong room-temperature photoluminescence (PL) was observed from the epitaxially grown GaAslang111rang nanowires on a Si(100) substrate. Results of low-temperature (10 K) PL measurements and current-sensing atomic force microscopy indicated that the GaAs nanowires on a Si substrate were unintentionally doped with Si     

Self-organized growth of Si/Silica/Er2Si2O7 core-shell nanowire heterostructures and their luminescence

Self-organized Si-Er heterostructure nanowires showed promising 1.54 microm Er(3+) optical activity. Si nanowires of about 120-nm diameter were grown vertically on Si substrates by the vapor-liquid-solid mechanism in an Si-Er-Cl-H(2) system using an Au catalyst. Meanwhile, a single-crystalline Er(2)Si(2)O(7) shell sandwiched between nanometer-thin amorphous silica shells was self-organized on the surface of Si nanowires. The nanometer-thin heterostructure shells make it possible to observe a carrier-mediated 1.53 microm Er(3+) photoluminescence spectrum consisting of a series of very sharp peaks. The Er(3+) spectrum and intensity showed absolutely no change as the temperature was increased from 25 to 300 K. The luminescence lifetime at room temperature was found to be 70 micros. The self-organized Si nanowires show great potential as the material basis for developing an Si-based Er light source.     

Synthesis of SiO2 covered SiC nanowires with milled Si,C nanopowders

SiO₂ covered β-SiC nanowires were directly synthesized with a novel method, annealing the milled Si,C nanopowders at 900–1100 °C on Si wafer or Al₂O₃ substrate, and there is no any metal catalysts used. The diameters of the nanowires are range of 20 to 50 nm, and the lengths of the nanowires are up to several hundreds of microns. There is a uniform SiO₂ amorphous layer on the surface of SiC nanowires. The axial direction of SiC nanowires is < 111>, and there are stacking faults and twin lamellae in the SiC nanowires. The synthetic mechanism of SiC nanowires includes two solid–solid reactions and one gas–solid reaction between SiO, Si, C and CO.     

A Ge/Si heterostructure nanowire-based double quantum dot with integrated charge sensor

One proposal for a solid-state-based quantum bit (qubit) is to control coupled electron spins on adjacent semiconductor quantum dots. Most experiments have focused on quantum dots made from III-V semiconductors; however, the coherence of electron spins in these materials is limited by hyperfine interactions with nuclear spins. Ge/Si core/shell nanowires seem ideally suited to overcome this limitation, because the most abundant nuclei in Ge and Si have spin zero and the nanowires can be chemically synthesized defect-free with tunable properties. Here, we present a double quantum dot based on Ge/Si nanowires in which we can completely control the coupling between the dots and to the leads. We also demonstrate that charge on the double dot can be detected by coupling it capacitively to an adjacent nanowire quantum dot. The double quantum dot and integrated charge sensor serve as an essential building block to form a solid-state qubit free of nuclear spin.     

Synthesis of single-crystal GaN nanowires on Si(111) substrate by ammonification technology

GaN nanowires have been synthesized on Si(111) substrate through ammoniating Ga₂O₃/BN films under flowing ammonia atmosphere at the temperature of 900 °C. The as-synthesized GaN nanowires were characterized by X-ray diffraction (XRD), selected-area electron diffraction (SAED), Fourier transform infrared (FTIR) spectroscopy, scanning electron microscope (SEM) and transmission electron microscope (TEM). The results demonstrated that the nanowires are hexagonal wurtzite GaN and possess a smooth surface with diameters ranging from 40 to 100 nm and lengths up to several tens of micrometers. The growth mechanism of crystalline GaN nanowires is discussed briefly.     

Diffusion in Si(x)Ge(1-x)/Si nanowire heterostructures

Si0.48Ge0.52/Si tip/nanowire heterostructures were grown by pulsed laser vaporization (PLV) at a growth temperature of 1100 degrees C. Ge diffusion in [111]-growth Si nanowires was studied for different post-synthesis annealing temperatures from 200 degrees C to 800 degrees C. Ge composition profiles were quantified by energy-dispersive X-ray spectroscopy in a transmission electron microscope. The compositional profiles were modeled by a limited-source diffusion model to extract temperature-dependent diffusion coefficients. The Ge diffusion coefficients followed an Arrhenius relationship with an activation energy of 0.622 +/- 0.050 eV. This rather low activation energy barrier is similar to the previously reported activation energy barrier of 0.67 eV for Ge surface diffusion on Si, suggesting that surface diffusion may dominate in nanowires at this length scale.     

几种Si、Ge纳米线导热系数的原子模拟

采用非平衡分子动力学方法模拟了Si纳米线、Ge纳米线、核-壳结构的Si/Ge纳米线及超晶格结构的Si/Ge纳米线的导热系数,给出了纳米线的温度与导热系数关系曲线,对比了几种纳米线导热特性的差异,研究结果表明,随着温度的升高,各纳米线的导热系数降低;相同温度下,纳米线导热系数的大小顺序为：核-壳结构的Si/Ge纳米线、超晶格结构的Si/Ge纳米线、Si纳米线、Ge纳米线。     

Si nanowires synthesized with Cu catalyst

The metal copper which is a newly developed interconnecting material for integrated circuit (IC) has been used as the catalyst to catalyze the formation of the Si nanowires in high temperature tube furnace. The growth direction of the straight Si nanowires is <111> and the polyhedron η″-Cu₃Si alloy is on the tip of the Si nanowires. The synthesis temperature of the Si nanowires is 500 °C. Such a low temperature implies that the vapor-solid (VS) should be the growth method. The cheap Cu catalyst is favorable for the mass synthesis of Si nanowires.     

Band-gap modulation in single-crystalline Si1-xGex nanowires

We report the energy band-gap modulation of single-crystalline Si1-xGex (0 相似文献   

The oxides growth during high-temperature oxidation of Si1-xGe(x) nanowires

Concerning the oxidation behavior of Si1-xGe(x) (x = 0.15, 0.3) nanowires at high temperature, Si1-xGe(x) nanowires were thermally oxidized for various lengths of time compared with Si nanowires, Si and Si1-xGe(x) thin films. The structural and compositional properties of the oxidized nanowires were characterized using several transmission electron microscopy (TEM) techniques including energy dispersive X-ray spectroscopy (EDS), which confirm that the oxidation rates of Si1-xGe(x) and Si (silicon) nanowires were saturated with increasing oxidation time due to retarding behavior, while the oxidation rate of Si1-xGe(x) nanowires were faster than that of Si nanowires. In addition, the differences in Ge (germanium) content and stress distribution contribute to the observed differences in oxidation behavior.     

Formation of epitaxial NiSi2 nanowires on Si(100) surface by atomic force microscope nanolithography

Ni nanowries were fabricated by atomic force microscope nanolithography, evaporation, lift-off and annealing processes. Epitaxial NiSi2 nanowires on a Si(100) surface along Si(110) and (100) directions were formed by the rapid thermal annealing treatment of the Ni nanowires at 400 degrees C. The silicide nanowires along the Si(110) direction had coherent type-A Si(111) and Si(100) interfaces, while those along the Si(100) direction had a type-A Si(110) interface. Silicide nanowires were agglomerated when the Ni nanowires were annealed at high temperature (> or = 500 degrees C). The mechanism of formation of a faceted nanowire was discussed based on the minimization of the total surface energy.