Dual open‐slot antennas integrated in metal frame and metal case of tablet computer for long‐term evolution applications

Dual open‐slot antennas were integrated in the metal back case and metal frame of a tablet computer for long‐term evolution applications. The single feed dual excitation source antennas were sufficiently narrow (2 mm) for installation between the metal frame and metal back case of the tablet computer. Each antenna had two open‐slot radiators (slot 1 and slot 2) with embedded filter circuits to enable wideband (699‐906 and 1710‐2690 MHz) operation required for LTE applications. The filter circuit values were adjusted to make the impedance more smooth and excite the desired modes. The proposed multiple‐input‐multiple‐output antennas were installed lengthwise on the long sides of the tablet and facing in operate directions. In this configuration, the user hand grip did not interfere with antenna performance, and isolation was improved (> 20 dB). The operating mechanism of the proposed antenna with matching circuits is described in detail. The effects of the user hand grip and the embedded display panel are also discussed.     

Letter: A new compensation pixel circuit with metal oxide thin‐film transistors for active‐matrix organic light‐emitting diode displays

This paper presents a novel compensation pixel circuit for active‐matrix organic light‐emitting diode displays, in which the coupling effect mask technology is developed to compensate the threshold voltage of driving thin‐film transistor whether it is positive or negative. Twenty discrete compensation pixel circuits have been fabricated by In‐Zn‐O thin‐film transistors process. It is measured that the non‐uniformity of the proposed pixel circuit is significantly reduced with an average value of 8.6%. Furthermore, the organic light‐emitting diode emission current remains constant during 6 h continuous operation, which also confirms the validity of the proposed pixel circuit.     

Letter: Solution‐processed flexible zinc‐tin oxide thin‐film transistors on ultra‐thin polyimide substrates

In this letter, solution‐processed flexible zinc‐tin oxide (Z_0.35T_0.65O_1.7) thin‐film transistors with electrochemically oxidized gate insulators (AlOx:Nd) fabricated on ultra‐thin (30 µm) polyimide substrates are presented. The AlOx:Nd insulators exhibited wonderful stability under bending and excellent insulating properties with low leakage current, high dielectric constant, and high breakdown field. The device exhibited a mobility of 3.9 cm²/V · s after annealing at 300 °C. In addition, the flexible device was able to maintain the electricity performance under various degrees of bending, which was attributed to the ultra‐thin polyimide substrate.     

Optically transparent and single‐band metamaterial absorber based on indium‐tin‐oxide

This article proposes and experimentally demonstrates an optically transparent and polarization‐insensitive metamaterial absorber in the terahertz (THz) frequencies. The absorber is formed by indium‐tin‐oxide (ITO) resistive films, providing efficient absorption with absorptivity of 94.1% at the peak absorption frequency of 120.8 GHz. We systematically investigate the surface current distribution and the power loss analysis, and explain the architecture of the absorber. Moreover, the absorber exhibits unique absorption properties at resonant frequencies, that is, featuring single‐band or dual‐band operation by changing the surface resistance of the ITO patterns. In addition, the experimental demonstration and measurement results are in good agreement with the simulated results. Most importantly, the fabricated absorber exhibits an optical transparency above 70% over the entire visible waveband, thereby enabling a wide range of applications such as optically transparent THz absorbers and detectors.     

Solution‐processed and low‐temperature metal oxide n‐channel thin‐film transistors and low‐voltage complementary circuitry on large‐area flexible polyimide foil

High‐performance solution‐based n‐type metal oxide thin‐film transistors (TFTs), fabricated directly on polyimide foil at a post‐annealing temperature of only 250 °C, are realized and reported. Saturation mobilities exceeding 2 cm²/(Vs) and on‐to‐off current ratios up to 10⁸ are achieved. The usage of these oxide n‐type TFTs as the pixel drive and select transistors in future flexible active‐matrix organic light‐emitting diode (AMOLED) displays is proposed. With these oxide n‐type TFTs, fast and low‐voltage n‐type only flexible circuitry is demonstrated. Furthermore, a complete 8‐bit radio‐frequency identification transponder chip on foil has been fabricated and measured, to prove that these oxide n‐type TFTs have reached already a high level of yield and reliability. The integration of the same solution‐based oxide n‐type TFTs with organic p‐type TFTs into hybrid complementary circuitry on polyimide foil is demonstrated. A comparison between both the n‐type only and complementary elementary circuitry shows the high potential of this hybrid complementary technology for future line‐drive circuitry embedded at the borders of flexible AMOLED displays.     

A new threshold‐voltage compensation technique of poly‐Si TFTs for AMOLED display pixel circuits

Abstract— A new threshold‐voltage compensation technique for polycrystal line‐silicon thin‐film transistors (poly‐Si TFTs) used in active‐matrix organic light‐emitting‐diode (AMOLED) display pixel circuits is presented. The new technique was applied to a conventional 2‐transistor—1‐capacitor (2T1C) pixel circuit, and a new voltage‐programmed pixel circuit (VPPC) is proposed. Theoretically, the proposed pixel is the fastest pixel with threshold‐voltage compensation reported in the literature because of the new compression technique implemented with a static circuit block, which does not affect the response time of the conventional 2T1C pixel circuit. Furthermore, the new pixel exhibits all the other advantages of the 2T1C pixel, such as the simplicity of the peripheral drivers and improves other characteristics, such as its behavior in the temperature variations. The verification of the proposed pixel is made through simulations with HSpice. In order to obtain realistic simulations, device parameters were extracted from fabricated low‐temperature poly‐Si (LTPS) TFTs.     

Comparative study of source–drain contact metals for amorphous InGaZnO thin‐film transistors

In this work, we compared the thin‐film transistor (TFT) characteristics of amorphous InGaZnO TFTs with six different source–drain (S/D) metals (MoCr, TiW, Ni, Mo, Al, and Ti/Au) fabricated in bottom‐gate bottom‐contact (BGBC) and bottom‐gate top‐contact (BGTC) configurations. In the BGTC configuration, nearly every metal can be injected nicely into the a‐IGZO leading to nice TFT characteristics; however, in the BGBC configuration, only Ti/Au is injected nicely and shows comparable TFT characteristics. We attribute this to the metal‐containing deposits in the channel and the contact oxidation during a‐IGZO layer sputtering in the presence of S/D metal. In bias‐stress stability, TFTs with Ti/Au S/D metal showed good results in both configurations; however, in the BGTC configuration, not all the TFTs showed as good bias results as Ti/Au S/D metal TFTs. We attribute this to backchannel interface change, which happened because of the metal‐containing deposits at the backchannel during the final the SiO₂ passivation.     

Novel top‐gate zinc oxide thin‐film transistors (ZnO TFTs) for AMLCDs

Abstract— High‐performance top‐gate thin‐film transistors (TFTs) with a transparent zinc oxide (ZnO) channel have been developed. ZnO thin films used as active channels were deposited by rf magnetron sputtering. The electrical properties and thermal stability of the ZnO films are controlled by the deposition conditions. A gate insulator made of silicon nitride (SiN_x) was deposited on the ZnO films by conventional P‐CVD. A novel ZnO‐TFT process based on photolithography is proposed for AMLCDs. AMLCDs having an aperture ratio and pixel density comparable to those of a‐Si:H TFT‐LCDs are driven by ZnO TFTs using the same driving scheme of conventional AMLCDs.     

Impact of bending on flexible metal oxide TFTs and oscillator circuits

Thin‐film circuits on plastic capable of high‐frequency signal generation have important applications in large‐area, flexible hybrid systems, enabling efficient wireless transmission of power and information. We explore oscillator circuits using zinc‐oxide thin‐film transistors (ZnO TFTs) deposited by the conformal, layer‐by‐layer growth technique of plasma‐enhanced atomic layer deposition. TFTs on three substrates—glass, 50‐µm‐thick freestanding polyimide, and 3.5‐µm‐thick spin‐cast polyimide—are evaluated to identify the best candidate for high‐frequency flexible oscillators. We find that TFTs on ultrathin plastic can endure bending to smaller radii than TFTs on commercial 50‐µm‐thick freestanding polyimide, and their superior dimensional stability furthermore allows for smaller gate resistances and device capacitances. Oscillators on ultrathin plastic with minimized parasitics achieve oscillation frequencies as high as 17 MHz, well above the cutoff frequency f_T. Lastly, we observe a bending radius dependence of oscillation frequency for flexible TFT oscillators and examine how mitigating device parasitics benefits the oscillator frequency versus power consumption tradeoff.     

Circuits and AMOLED display with self‐aligned a‐IGZO TFTs on polyimide foil

A process to make self‐aligned top‐gate amorphous indium‐gallium‐zinc‐oxide (a‐IGZO) thin‐film transistors (TFTs) on polyimide foil is presented. The source/drain (S/D) region's parasitic resistance reduced during the SiN interlayer deposition step. The sheet resistivity of S/D region after exposure to SiN interlayer deposition decreased to 1.5 kΩ/□. TFTs show field‐effect mobility of 12.0 cm²/(V.s), sub‐threshold slope of 0.5 V/decade, and current ratio (I_ON/OFF) of >10⁷. The threshold voltage shifts of the TFTs were 0.5 V in positive (+1.0 MV/cm) bias direction and 1.5 V in negative (?1.0 MV/cm) bias direction after extended stressing time of 10⁴ s. We achieve a stage‐delay of ~19.6 ns at V_DD = 20 V measured in a 41‐stage ring oscillator. A top‐emitting quarter‐quarter‐video‐graphics‐array active‐matrix organic light‐emitting diode display with 85 ppi (pixels per inch) resolution has been realized using only five lithographic mask steps. For operation at 6 V supply voltage (V_DD), the brightness of the display exceeds 150 cd/m².     

Impact of source/drain contacts formation of self‐aligned amorphous‐IGZO TFTs on their negative‐bias‐illumination‐stress stabilities

In this study, we have compared the performance of self‐aligned a‐IGZO thin‐film transistors (TFTs) whereby the source/drain (S/D) region's conductivity enhanced in three different ways, that is, using SiN_x interlayer plasma (hydrogen diffusion), using calcium (Ca as reducing metal) and using argon plasma (changing the atomic ratio). All these TFTs show comparable characteristics such as field‐effect mobility (μ_FE) of over 10.0 cm²/(V.s), sub‐threshold slope (SS^‐1) of 0.5 V/decade, and current ratio (I_ON/I_OFF) over 10⁸. However, under negative‐bias‐illumination‐stress (NBIS), all these TFTs showed strong degradation. We attributed this NBIS stability issue to the exposed S/D regions and changes in the conductivity of S/D contact regions. The hydrogen plasma‐treated TFTs showed the worst NBIS characteristics. This is linked to increased hydrogen diffusion from the S/D contact regions to the channel.     

Novel back‐channel‐etch process flow based a‐IGZO TFTs for circuit and display applications on PEN foil

In this study, we report high‐quality amorphous indium–gallium–zinc‐oxide (a‐IGZO) thin‐film transistors (TFTs) fabricated on a polyethylene naphthalate foil using a new back‐channel‐etch (BCE) process flow. The BCE flow allows a better scalability of TFTs for high‐resolution backplanes and related circuits. The maximum processing temperature was limited to less than 165 °C in order to ensure good overlay accuracy (<1 µm) on foil. The presented process flow differs from the previously reported flow as we define the Mo source and drain contacts by dry etch prior to a‐IGZO patterning. The TFTs show good electrical performance, including field‐effect mobilities in the range of 15.0 cm²/(V·s), subthreshold slopes of 0.3 V/decade, and off‐currents <1.0 pA on foil. The threshold voltage shifts of the TFTs measured were less than 1.0 V after a stressing time of 10⁴ s in both positive (+1.0 MV/cm) and negative (?1.0 MV/cm) bias directions. The applicability of this new BCE process flow is demonstrated in a 19‐stage ring oscillator, demonstrated to operate at a supply voltage of 10 V with a stage delay time of 1.35 µs, and in a TFT backplane driving a 32 × 32 active‐matrix organic light‐emitting diode display.     

Threshold‐voltage drift of amorphous‐silicon TFTs in integrated drivers for active‐matrix LCDs

Abstract— The threshold‐voltage drift of a‐Si TFTs for AMLCD integrated drivers was studied. Analysis of the drift shows two different kinetics. Both charges trapped in the insulator and defect generation in the a‐Si layer occur simultaneously. However, after a period of time charge trapping in the insulator becomes predominant.     

Uniformity and bias‐temperature instability of bottom‐gate zinc oxide thin‐film transistors (ZnO TFTs)

Abstract— Short‐range uniformity and bias‐temperature (BT) instability of ZnO TFTs with SiO^x/SiN^x stacked gate insulators which have different surface treatments have been investigated. The short‐range uniformity of ZnO TFTs was drastically improved by N²O plasma treatment of the gate insulator. The variation in the gate voltage where a drain current of 1‐nA flows (Vgs at an Ids of 1 nA) was dramatically reduced from ±1.73 V to ±0.07 V by N²O plasma treatment of the gate insulator. It was clarified that the variations in the subthreshold characteristics of the ZnO TFTs could be reduced by N²O plasma treatment of the gate insulator due to a decrease in the variation of trap densities in deep energy levels from 0.9–2.0 × 10¹⁷ to 1.2–1.3×10¹⁷ cm^?3‐eV^?1. From the BT stress tests, a positive shift of Vgs at an Ids of 1 nA could be reduced by N²O plasma treatment of the gate insulator due to a decrease in the charge traps in the gate insulator. When the gate‐bias stress increases, state creation occured in the ZnO TFTs in addition to the charge trapping in the gate insulator. However, N²O plasma treatment of the gate insulator has little effect on the suppression of the state creation in ZnO TFTs under BT stress. The surface treatment of the gate insulator strongly affects the short‐range uniformity and the BT instability of Vth in the ZnO TFTs.     

Thin‐slot formalism for the split‐field FDTD analysis of periodic structure

An expression of the thin‐slot formalism is presented to alleviate the gridding of the split‐field finite‐difference time‐domain (FDTD) solution for periodic structure. The varying auxiliary‐field ( , ) and split‐field ( , ) distributions near the slots are analytically derived from the varying field ( , ). The update equations for the split‐field FDTD are obtained by incorporating those varying field distributions into the split‐field equations in integral form. A frequency selective surface (FSS) structure is applied to verify the proposed method. The results indicate that the computational efficiency is improved.     

A framework for assessing amorphous oxide semiconductor thin‐film transistor passivation

Amorphous oxide semiconductor thin‐film transistors (TFTs) are moving towards commercialization for a variety of display applications. Invariably, display applications require a bottom‐gate TFT configuration in which passivation of the top channel layer surface is required. The objective of this work is to propose a conceptual model framework for assessing TFT passivation schemes, within the context of amorphous oxide semiconductor electronics. This model involves first estimating the energy of the charge neutrality levels (CNLs) for the channel and passivation layers. Then, an energy band diagram is drawn to establish the relative position of these CNLs prior to their establishment of intimate contact. A situation in which the passivation layer CNL is below that of the channel layer CNL is considered undesirable because interface state electronic transfer from the channel to the passivation layer leads to formation of an accumulation layer at this interface. Although the opposite case in which the passivation layer CNL is above that of the channel layer CNL is more desirable, the ideal situation would be when both CNLs align because no interface state electronic transfer would occur. This framework is then employed in a discussion of the passivation of indium gallium zinc oxide and zinc tin oxide bottom‐gate TFTs.     

A wideband circularly polarized slot antenna with antipodal strips for WLAN and C‐band applications

A single‐fed circularly polarized square shaped wide slot antenna with modified ground plane and microstrip feed has been presented. The field in the slot is perturbed by introducing an antipodal strips section attached with a microstrip line to produce circular polarization in a wide band of frequencies. The antipodal strip section consists of a group of four strips of unequal length and separation. The presence of asymmetric perturbations in the slot is mainly responsible for exciting two orthogonal modes in the slot having equal magnitude and 90° phase difference which results in circular polarization. A wide bandwidth of 3.3 GHz (4.4 GHz‐7.7 GHz) has been achieved for an axial ratio value AR < 3 dB with the minimum axial ratio value being 0.3 dB. The impedance bandwidth for |S₁₁| < ?10 dB ranges from 4.3 GHz to 8 GHz, and therefore covers most of the C‐band communication systems. The antenna exhibits stable radiation patterns throughout the circular polarization bandwidth with a gain around 6 dBi in entire operational bandwidth. A prototype of antenna was fabricated and measured. The antenna has a planar size 0.40λ₀ × 0.40λ₀ and thickness of 0.02λ₀ where λ₀ is the wavelength in free space at the lowest frequency. With its compact size and low profile, the antenna is a favorable choice for WLAN (5.15‐5.85 GHz) and a wide variety of C‐band wireless applications.     

Experimental investigation and comparison of super‐wideband antipodal slot antennas

Three novel, super‐wideband antipodal slot antennas with different tuning stubs are studied and compared with each other. Smooth, half‐circular slot profile is used to improve the antennas' polarization purity and impedance bandwidth, and different tuning stubs are used to finely tune the antennas' radiation performance. As will be reported, low crosspolarization level, stable dipole‐like pattern, and flat gain performances can be obtained within an operation bandwidth of 6.3:1 by introducing a smooth antipodal slot structure and a cup‐shape tuning patch. © 2011 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2011.     

Clocked control scheme of separating TFTs for a node‐sharing LTPS TFT shift register with large number of outputs

This paper proposes the node‐sharing low‐temperature poly‐silicon (LTPS) thin‐film transistor (TFT) shift register with the clocked control scheme that completely turns separating TFTs off during the bootstrapping period to compensate for internal resistive and capacitive loads. The fluctuation is also addressed by adding pull‐down TFTs or raising the low level of the control signal.     

Lithium doping and gate dielectric dependence study of solution‐processed zinc‐oxide thin‐film transistors

Abstract— The effects of lithium (Li) doping concentration and gate dielectrics on the performance of solution‐processed zinc‐oxide (ZnO) thin‐film transistors (TFTs) has been investigated. ZnO films with strong c‐axis orientation and lower background conductivity was obtained with 15 at.% of Li. Different crystallization behavior of ZnO was observed in the case of various dielectric surfaces. The 15‐at.% Li‐doped ZnO films (thickness ～20 nm) prepared on SiO² and SiN^x were found to be present in crystalline form, whereas the film prepared on aluminum titanium oxide (ATO) was found to be amorphous. A field‐effect mobility of 1.81 cm²/V‐sec and an Ion/Ioff ratio of 2 × 10⁶ were obtained for the 15‐at.% Li‐doped ZnO TFTs with a bilayer gate dielectric of SiO² and SiN^x. The comparison of dielectric studies showed that the performance of TFTs prepared on SiN^x and ATO are higher than that of the TFTs prepared on SiO².