单一单位增益放大器的Q增强SC滤波器

本文阐述了采用单位增益放大器的SC滤波器的设计方法。基于无源Q增强技术,由Sallew Key有源RC电路导出了一系列Q增强的二阶SC低通、高通和带通滤波器。设计表明,本文提出的Q增强SC电路比文献给出的电路需要小得多的电容分散度。本文考察了这些电路灵敏度和有限GB对SC电路的影响。用分立元件做了实验,实验结果与理论计算相吻合。     

一个新的高Q单放大器开关电容滤波器及其最佳设计

本文提出了一个新的高Q单放大器开关电容(SC)滤波器,给出了该电路最大与最小电容比最小的最优设计。同已有文献相比,本文电路的最大与最小电容比已得到大幅度地减小。     

基于信号流图的开关电流滤波器设计

开关电流（SI）是有望取代开关电容（SC）的一种新型的取样数据技术，鉴于SC技术发展的成熟性及其与SI技术的紧密联系，即SC和SI滤波电路具有互易性，可采用信号流图转置的方法，将SC综合法直接用于SI滤波器设计，而无须提出新的设计方法。本文以二阶巴特沃思开关电容带通滤皮器为例给出了该方法的具体应用。     

开关电容双二次滤波器发展综述

本文综述了开关电容（SC）双二次滤波器的发展，评价了这些电路的性能，比较了它们的优缺点。最后简要介绍了SC滤波器电容面积效益的设计技术。     

一种新的开关电流双二次滤波器

本文阐述了开关电流(SI)和开关电容(SC)电路的相似性原理,由此提出了一个新的SI双二次滤波器电路,该电路是由文献[5]的三运放SC双二次电路为原型导出的。该电路的一个重要特征是:它在单一积木块上能同时获得低通、带通和高通滤波功能。据此,得到了SI电路的一般双二次实现。     

对寄生电容不灵敏的开关电容有源FDNR滤波器的设计

采用单位缓冲器设计对寄生电容不灵敏的开关电容(SC)频率相关负电阻(FDNR)元件，利用该元件对椭园函数式LC低通滤波器进行SC模拟。为了获得电容最佳值，提出了一种简单的最优化方法；并采用寄生电阻预畸变与SC负电阻相结合的办法，设计的SC滤波器对寄生电容不灵敏，且电路简单。在电子工作平台(EWB)上进行五阶椭园低通SC-FDNR滤波器仿真，测量数据最大相对误差为0．948％，仿真结果表明该方法实用可行，效果明显。     

对寄生电容不灵敏的开关电容有源滤波器的设计

采用单位缓冲器设计对寄生电容不灵敏的开关电容(SC)频率相关负电阻(FDNR)元件，利用该元件对椭圆函数式LC低通滤波器进行SC模拟。为了获得电容最佳值，提出了一种简单的最优化方法；并采用寄生电阻预畸变与SC负电阻相结合的办法，设计的SC滤波器对寄生电容不灵敏，且电路简单。在电子工作平台(EWB)上进行五阶椭圆低通SC-FDNR滤波器仿真，测量数据最大相对误差为0．948％，仿真结果表明该方法实用可行，效果明显。     

一个开关电容电路的模拟和优化程序

本文介绍了一个以分析开关电容(SC)电路为目的面向用户的通用程序。该程序可以完成对SC电路的时域、频域和灵敏度模拟,可以对SC电路进行多目标优化,并可以求得SC电路的传输极点,且对电路的输入信号、开关序列、网络拓扑没有限制,文中提出了在改进节点法基础上求出电路传输极点的方法,以贡献的方式建立求传输函数对电容比的灵敏度方程,通过线性变换求得对电容比的灵敏度的方法和SC电路的多目标优化方法。最后给出了用该程序对SC电路进行模拟和优化的两个算例。     

使用单位增益缓冲器构成的抗寄生SC跨导

用单位增益缓冲器构成的开关电容滤波器(SCF),若能消除寄生电容引起的阻性寄生,则可用于高频设计,总寄生灵敏度会因此大大降低。本文在此基础上提出一种新的抗寄生开关电容(SC)跨导元件电路差分跨导元件,并用它构成了适用于高频的SC浮地电感和积分器。最后用它实现了一个三阶椭圆函数低通滤波器,并经计算机模拟和实验验证,证明了该方案的正确性。     

级联开关电流滤波器设计

本文提出了一种新的有源器件开关电流运算放大器(SIOA)。新元件的引入大大减化了电路的作图,十分便于开关电流(SI)电路的分析和综合。以开关电容(SC)电路为原型,导出了若干新的全极点和椭圆(二阶或三阶)SI电路。这些电路既可作为滤波节单独使用,也可用于级联设计以实现高阶转移函数。为了说明设计方法,给出了一个五阶SI低通滤波器设计例子。     

High-Q SC biquad with a minimum capacitor spread

Realising SC biquads with high Q values normally results in a high capacitor spread. This means, for MOS circuits, a correspondingly large increase of the total chip area. In the letter, we describe a circuit that allows the realisation of high-Q filters with a minimum capacitor spread resulting in more accurate capacitor ratios and a small overall chip area.     

减小SCF电容分散比的拓扑变更方法

本文研究了减小开关电容滤波器(SCF)电容分散比的原理,提出了两个变更拓扑方法,并给出了这两类算法实现的例子。     

Novel parasitic insensitive SC large pole selectivity (Q) bandpass fitter with less capacitor spread and low pole ‘Q’ sensitivity

A new parasitic insensitive switched capacitor (SC) bandpass filter scheme is presented. The selectivity of the bandpass filter can be made very high without large capacitor spread, hence the proposed circuit consumes less chip area in monolithic integration and passive sensitivities of the circuit are found to be low.     

Comb Capacitor Structures for On-Chip Physical Uncloneable Function

Planar inter-digitated comb capacitor structures are an excellent tool for on-chip capacitance measurement and evaluation of properties of coating layers with varying composition. These comb structures are easily fabricated in a single step in the last metallization layer of a standard IC process. Capacitive coupling of these structures with a coating layer is modelled based on the electric field distribution to have a detailed understanding of contributing capacitance components. The coating composition is optimized to provide maximum spread in capacitance values of comb capacitor structures. This spread in measured capacitance values can be used to implement a physical uncloneable function (PUF). A PUF is a random function which can be evaluated only with the help of a physical system. We present an on-chip capacitive PUF for chip security and data storage in which the unlock key algorithm is generated from capacitors which are physically linked to the chip in an inseparable way. The strength of this key increases with the spread in capacitance values and measurement accuracy.      

Novel second-order switched-capacitor interpolator

A novel switched-capacitor interpolator circuit is proposed for the realisation of arbitrary second-order interpolating functions employing a reduced number of switching waveforms and yielding low capacitance spread and total capacitor area.<>     

开关电容Q倍增带通结构

高Q值的开关电容带通双二次节需要很高的电容比和较大的芯片面积。本文从理论和设计两方面说明采用Q倍增结构可以使这个问题得到较好的解决。     

Programmable switched-capacitor filter with no additional silicon area

This letter reports a simple and economic method of programming the frequency-response parameters of the switched-capacitor double-integrator biquad. It is shown that along with the programming facility, the scheme yields considerable reduction in the capacitor spread and hence in silicon area.     

A 1-MHz Area-Efficient On-Chip Spectrum Analyzer for Analog Testing

This paper presents a 0.35-μm CMOS on-chip spectrum analyzer based on switched-capacitor (SC) techniques. The prototype device utilizes a 3-V supply and basically includes an SC sine-wave generator, a fourth-order high-selectivity SC filter, and a programmable gain amplifier followed by an 8-b analog-to-digital converter. A non-uniform sampling scheme, which adds one degree of freedom in determining the frequency response parameters of SC circuits, helps to obtain high programmability resolution without modifying any capacitor value. As a result, capacitor spread and total capacitor area are reduced as compared to traditional SC solutions and, hence, test area overhead is minimized. Experimental results demonstrate the effectiveness of the proposed approach to perform frequency response and total harmonic distortion measurements for frequencies up to 1 MHz.     

Stray-free second-order circuit for correction of sample-and-holdamplitude distortion in switched-capacitor filters

A second-order stray-free circuit for the correction of amplitude deviations arising from the sample-and-hold effect in switched capacitor filters is proposed. The new circuit removes many of the shortcomings of a previously published first-order correction circuit, having improved correction accuracy together with reduced capacitance spread and total capacitance     

Switched-capacitor filters using unity-gain amplifiers

Switched-capacitor networks realizing second-order filter characteristics are presented. Realization is achieved with unity-gain amplifiers as buffers. The circuits have small sensitivities, good dynamic range and a reasonable spread of capacitor values. The filters can be used for high-Q realization and a relatively high frequency range.