On the design of RF spiral inductors on silicon

This review of design principles for implementation of a spiral inductor in a silicon integrated circuit fabrication process summarizes prior art in this field. In addition, a fast and physics-based inductor model is exploited to put the results contributed by many different groups in various technologies and achieved over the past eight years into perspective. Inductors are compared not only by their maximum quality factors (Q/sub max/), but also by taking the frequency at Q/sub max/, the inductance value (L), the self-resonance frequency (f/sub SR/), and the coil area into account. It is further explained that the spiral coil structure on a lossy silicon substrate can operate in three different modes, depending at first order on the silicon doping concentration. Ranging from high to low substrate resistivity, inductor-mode, resonator-mode, and eddy-current regimes are defined by characteristic changes of Q/sub max/, L, and f/sub SR/. The advantages and disadvantages of patterned or blanket resistive ground shields between the inductor coil and substrate and the effect of a substrate contact on the inductor are also addressed in this paper. Exploring optimum inductor designs under various constraints leverages the speed of the model. Finally, in view of the continuously increasing operating frequencies in advancing to new generations of RF systems, the range of feasible inductance values for given quality factors are predicted on the basis of optimum technological features.     

Fabrication and performance of novel RF spiral inductors on silicon

This paper presents and discusses the fabrication and the performance of RF circular spiral inductors on silicon. The substrate materials underneath the inductor coil are removed by wet etching process. In the fabrication process, fine polishing of the photoresist is used to simplify the processes and ensure the seed layer and the pillars contact perfectly, and dry etching technique is used to remove the seed layer. The results show that Q-factor of the novel inductor is greatly improved by removing the silicon underneath the inductor coil. The spiral inductor for line width of 50 μm has a peak Q-factor of 17 at frequency of 1 GHz. The inductance is about 3.2 nH in the frequency range of 0.05-3 GHz and the resonance frequency of the inductors is about 6 GHz. If the strip is widened to 80 μm, the peak Q-factor of the inductor reduces to about 10 and the inductance is 1.5 nH in the same frequency range.     

Scalable compact circuit model and synthesis for RF CMOS spiral inductors

A scalable industry-oriented, 24-element "2-/spl pi/" compact circuit model for on-chip RF CMOS spiral inductors is presented. It has a good accuracy up to self-resonant frequency (SRF). Two levels of modeling approaches are provided, which are: 1) the fixed model, which extracts the values of circuit elements directly from the measured S-parameters of a given device, achieving high accuracy, but no scalability and 2) the scalable model, in which circuit elements are related to the geometry (i.e., layout) through a set of formulas with model parameters calibrated upon a few testing devices. The synthesis procedure is also discussed, which includes the scalable model and a SPICE simulator as the evaluation method within the iteration loop.     

Physical modeling of spiral inductors on silicon

This paper presents a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and center-tap, capacitance between the spiral and substrate, substrate ohmic loss, and substrate capacitance. The model has been confirmed with measured results of inductors having a wide range of layout and process parameters. This scalable inductor model enables the prediction and optimization of inductor performance     

硅基平面螺旋电感的等效电路模型和参数提取

针对螺旋电感传统等效电路模型的不足,提出了一种改进形式的集总参数等效电路模型.该等效电路模型能很好地反映出电感参数随频率变化的实际效应,可适用于从低频到自谐振频率的宽频带范围.同时,应用电磁场全波分析方法对CMOS工艺下平面螺旋电感进行仿真分析.从得到的散射参数中提取电感L、Q值及自谐振频率.基于参数优化和曲线拟合技术,给出了等效电路模型中各个元件值的多变量闭合表达式.这些表达式可方便地用于集成电路的设计和优化,从而提高电路设计的性能和效率.     

Thermal effects in suspended RF spiral inductors

Self-heating effects on integrated suspended and bulk spiral inductors are explored. A dc current is fed through the inductors during measurement to emulate dc and radio frequency power loss on the inductor. A considerable drop in Q by /spl sim/18% at 36.5 mW is observed for suspended coils with 3-/spl mu/m aluminum metallization compared to reference inductors on bulk-Si. Simulations in Ansoft's ePhysics indicate that, due to the thermal isolation of the suspended coil, the power loss from resistive self-heating in the metal has to be transferred outwards through the metal turns. This also results in a thermal time constant. This time constant is measured to be /spl sim/10 ms, meaning that it can affect power circuits operating in pulsed mode.     

Analysis, design, and optimization of spiral inductors andtransformers for Si RF ICs

Silicon integrated circuit spiral inductors and transformers are analyzed using electromagnetic analysis. With appropriate approximations, the calculations are reduced to electrostatic and magnetostatic calculations. The important effects of substrate loss are included in the analysis. Classic circuit analysis and network analysis techniques are used to derive two-port parameters from the circuits. From two-port measurements, low-order, frequency-independent lumped circuits are used to model the physical behavior over a broad-frequency range. The analysis is applied to traditional square and polygon inductors and transformer structures as well as to multilayer metal structures and coupled inductors. A custom computer-aided-design tool called ASITIC is described, which is used for the analysis, design, and optimization of these structures. Measurements taken over a frequency range from 100 MHz to 5 GHz show good agreement with theory     

Metallization proximity studies for copper spiral inductors on silicon

The impacts of metallization proximity for copper spiral inductors on silicon have been investigated in this paper. Performance of the spiral inductor versus area consumption tradeoff with respect to its core diameter is evaluated quantitatively for the first time. Effects of the inductor's proximate grounded metallization on its overall inductive performance are also analyzed.     

A unified analytical and scalable lumped model of RF CMOS spiral inductors based on electromagnetic effects and circuit analysis

An enhanced scalable compact model for on-chip RF CMOS spiral inductors is presented. By considering layout and technology parameters, under quasi-static approximation, the model elements are all expressed analytically and based on electromagnetic effects. Frequency dependent behavior of CMOS spiral such as skin and proximity effects, and decrease of equivalent series resistance due to substrate coupling is considered. The model is suitable to be easily implemented in design kits by foundry and provides interesting accuracy to be used by CMOS Radio Frequency Integrated Circuits designers.     

Nonlinear characteristics of on-chip spiral inductors under high RF power

This paper explores silicon CMOS on-chip spiral inductors performance degradation under high RF power. A novel methodology to calibrate and characterize on-chip spiral inductor with large signal inputs (high/medium power) is presented. Experiments showed 12% degradation of quality factor in a particular inductor design when 34 dBm RF power was applied. The degradation of quality factor of inductor can be attributed to a local self heating effect. Thermal imaging of such an inductor under high RF power validates the hypothesis.     

CMOS-compatible surface-micromachined suspended-spiral inductors for multi-GHz silicon RF ICs

Fully CMOS-compatible, highly suspended spiral inductors have been designed and fabricated on standard silicon substrates (1/spl sim/30 /spl Omega//spl middot/cm in resistivity) by surface micromachining technology (no substrate etch involved). The RF characteristics of the fabricated inductors have been measured and their equivalent circuit parameters have been extracted using a conventional lumped-element model. We have achieved a high peak Q-factor of 70 at 6 GHz with inductance of 1.38 nH (at 1 GHz) and a self-resonant frequency of over 20 GHz. To the best of our knowledge, this is the highest Q-factor ever reported on standard silicon substrates. This work has demonstrated that the proposed microelectromechanical systems (MEMS) inductors can be a viable technology option to meet the today's strong demands on high-Q on-chip inductors for multi-GHz silicon RF ICs.     

A lumped scalable model for silicon integrated spiral inductors

A lumped scalable model for spiral inductors in silicon bipolar technology has been developed. The effect of three different cross sections on inductor performance was first investigated by comparing experimental measurements. Using both the results of this analysis and three-dimensional electromagnetic simulation guidelines, several circular inductors were integrated on a radial patterned ground shield for model validation purposes. The model employs a novel equation for series resistance with only one fitting parameter extracted from experimental measurements. All other model elements were related to technological and geometrical data by using rigorous analytical equations. The model was validated using one- and two-port measured performance parameters of 45 integrated inductors, and excellent agreement was found for all considered geometries up to frequencies well above self-resonance.     

Large Q-factor improvement for spiral inductors on silicon using proton implantation

We have improved the Q-factor of a 4.6 nH spiral inductor, fabricated on a standard Si substrate, by more than 60%, by using an optimized proton implantation process. The inductor was fabricated in a 1-poly-6-metal process, and implanted after processing. The implantation increased the substrate impedance by /spl sim/ one order of magnitude without disturbing the inductor value before resonance. The S-parameters were well described by an equivalent circuit model. The significantly improved inductor performance and VLSI-compatible process makes the proton implantation suitable for high performance RF ICs.     

Temperature and substrate-impedance dependence of noise figure of monolithic RF inductors on silicon

In this letter, we analyze the effects of temperature (from -50/spl deg/C to 200/spl deg/C) and substrate impedance on the noise figure (NF) and quality factor (Q-factor) performances of monolithic RF inductors on silicon. The results show a 0.75 dB (from 0.98 to 0.23 dB) reduction in minimum NF (NF/sub min/) at 8 GHz, an 86.1% (from 15.1 to 28.1) increase in maximum Q-factor (Q/sub max/), and a 4.8% (from 16.5 to 17.3 GHz) improvement in self-resonant frequency (f/sub SR/) were obtained if post-process of proton implantation had been done. This means the post-process of proton implantation is effective in improving the NF and Q-factor performances of inductors on silicon mainly due to the reduction of eddy current loss in the silicon substrate. In addition, it was found that NF increases with increasing temperature but show a reverse behavior within a higher frequency range. This phenomenon can be explained by the positive temperature coefficients of the series metal resistance (R/sub s/), the parallel substrate resistances (R/sub sub1/ and R/sub sub2/), and the resistance R/sub s1/ of the substrate transformer loop. The present analyzes are helpful for RF designers to design less temperature-sensitive high-performance fully on-chip low-noise-amplifiers (LNAs) and voltage-controlled-oscillators (VCOs) for single-chip receiver front-end applications.     

Efficient modeling of RF CMOS spiral inductors using generalized knowledge-based neural network

Efficient modeling of RF CMOS spiral inductors by virtue of a novel generalized knowledge-based neural network (GKBNN) is presented. Prior knowledge of on-chip inductors is used for constructing the GKBNN. This new modeling approach also exploits merits of the iterative multi stage algorithm. This GKBNN has much enhanced learning and generalization capabilities. Comparing with the conventional neural network or the knowledge-based neural network, this new GKBNN model can map the input–output relationships with fewer hidden neurons and has higher reliability for generalization. As a consequence, this GKBNN model can run as fast as an approximate equivalent circuit model yet generate results as accurate as detailed electromagnetic simulations. Experiments are included to demonstrate merits and efficiency of this new approach.     

Characterization and modeling of silicon integrated spiral inductors for high-frequency applications

This paper presents the characterization and modeling of 0.3- to 0.8-nH radial patterned ground shield circular inductors fabricated in a silicon bipolar technology for RF applications. An extensive validation of measurement accuracy is first addressed taking into account both calibration and de-embedding issues. A novel five-step de-embedding technique is also proposed to improve the accuracy of small inductor measurements. The accuracy of de-embedded experimental data in the range 0.3-0.8 nH is demonstrated by comparing the measured low-frequency inductance with electromagnetic simulations of a large set of inductors. Based on both electromagnetic simulations and experimental measurements, the well-known current sheet expression for circular spirals is revised and modified to improve its accuracy at lower inductance values. The proposed expression is also extended to inductors with polygonal geometries showing significant improvements with respect to the state-of-the-art. Finally, the original and modified expressions are employed in a lumped scalable model for silicon spiral inductors. Comparisons with measured data revealed that the modified expression allows error reductions as large as 20% with respect to the original one, on both inductance and quality factor simulations.     

RF inductors and capacitors integrated on silicon chip by CMOS compatible Cu interconnect technology

High-Q inductors and high-density capacitors have been designed and fabricated with a post-process of additional metal layers on the top of interconnect layers. The fabrication was carried out with advanced Cu interconnect technology, which was compatible with nowadays CMOS backend of line. The Q_max of inductors with inductance from 0.4 to 11 nH was over 11 on low-resistivity silicon substrates. Two kinds of structures of on-chip capacitors, MIM and MIMIM, have been studied. A capacitance of 1.75 fF/μm² has been achieved with MIMIM structure using Si₃N₄ as dielectric.     

Equivalent circuit for broadband modelling of on-chip spiral inductors up to millimetre-wave frequencies

A single-stage expandable equivalent circuit is proposed to model an on-chip spiral inductor up to several times its first self-resonant frequency. The equivalent circuit adopts a modified T-section network configuration to achieve an extremely large bandwidth. The modelled results for a series of round spiral inductors fabricated with different turn numbers on InGaAs substrate demonstrate good agreement with measured results over a measurement frequency range up to 50 GHz.     

Characteristic-function approach to parameter extraction for asymmetric equivalent circuit of on-chip spiral inductors

A novel approach to parameter extraction for an asymmetric equivalent circuit of silicon-on-chip spiral inductors based on measured S-parameter is proposed. The current methodology is based on the linear dependence of a set of characteristic functions on other functions or variables such as /spl omega//sup 2/ in a certain frequency range, and the model parameters can be derived from the corresponding linear coefficients. As applied to an asymmetric single-/spl pi/ equivalent circuit, the extracted parameters can simulate the inductor with a high precision up to 10 GHz.     

Parasitic-aware RF circuit design and optimization

RF circuit synthesis techniques based on particle swarm optimization and adaptive simulated annealing with tunneling are described, and comparisons of parasitic-aware designs of an RF distributed amplifier and a nonlinear power amplifier are presented. Synthesized in 0.35-/spl mu/m digital CMOS using a single 3.3-V power supply, the designs provide an 8-dB gain and 8-GHz bandwidth for a four-stage distributed amplifier, and 1.2-W output power with 55% drain efficiency at 900 MHz for a three-stage power amplifier. A standard circuit simulator, HSPICE or SPECTRE, embedded in an optimization loop is used to evaluate cost functions. The proposed design and optimization methodology is computationally efficient and robust in searching complex multidimensional design spaces.