共查询到20条相似文献,搜索用时 78 毫秒
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首先提出了数论中的原根成对存在定理,并进行了详细的数学证明。然后根据原根可使数环重新排序的性质,利用一对原根对DFT运算的输入和输出序列重新排序,推导出DFT的循环卷积算法,进一步给出了此算法的结构图。最后给出了用VHDL语言实现该算法的完整程序、仿真结果及分析,并总结了用FPGA实现DFT运算的意义。 相似文献
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本文提出了一种新型的全相位DFT数字滤波器频率响应的求取方法—循环移位图法,它是基于全相位滤波器和原有FIR滤波器的相互关系而构造的,充分体现了Fourier变换的循环移位性质和卷积窗的关系。该方法直观,深刻反映了全相位滤波器的内在机理。文中以N=3为例,说明了全相位滤波器的衍生过程。并以N=7阶全相位滤波器为例,分别在无窗、单窗和双窗条件下,推导出了全相位滤波器频率响应的数学表达式,并且用该表达式结合实验结果解释了全相位滤波器的优良特性。然后分别用所有数字角频率的正弦信号对全相位数字滤波器进行仿真实验测试,该仿真实验证明:测试出的频率响应曲线和理论推导完全一致。本文最后还推导出任意阶、任意种加窗方式下的全相位数字滤波器的频率响应公式。 相似文献
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在现代数字信号处理领域中,CORDIC算法是一种重要的数学计算方法。该算法采用一种迭代的方式,运算简便,被广泛应用于乘除法、开方以及一些三角函数运算当中。但CORDIC算法需要较高的迭代级数以保证运算精度,在进行FPGA实现时仍然会消耗较多的硬件逻辑资源。为进一步减少CORDIC算法实现时的资源消耗,设计并实现了一种基于折叠变换的CORDIC算法。相比传统的流水结构CORDIC算法,该折叠结构的CORDIC算法消耗的硬件资源大大减少。文中给出了这一方法的实现结构,并给出了仿真结果。 相似文献
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该文由多项式信号的并行表达得到一种FIR滤波器并行结构。通过对FIR滤波器并行结构的分析,提出了几种自适应FIR滤波器的并行处理算法.同时给出了相应的脉动实现结构。 相似文献
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讨论了已有的几种A/D转换器结构原理及其特点,介绍了一种新研制的CMOS折叠-插值A/D芯片结构的设计原理和性能特点。 相似文献
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基于折叠结构的半带滤波器的设计 总被引:1,自引:1,他引:0
半带滤波器是一种高效的数字滤波器,目前流行的半带滤波器设计方法一般能够满足参数要求,但其存在着功耗高、面积大、资源耗费代价高等不足之处。为了弥补上述的不足,文中提出了一种基于折叠技术的新的半带滤波器设计方法。首先根据设计要求用MATLAB产生相应的滤波器系数,用CSD码对系数进行优化,然后采用折叠结构,通过代码实现。设计过程当中还用到分时复用和重定时技术。相比其它半带滤波器的设计,本设计具有耗费的资源少,整个抽取、滤波过程包括系数产生始终没有用到乘法器,而且延迟小、功耗低、面积小、单一时钟控制有很高的稳定性。 相似文献
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For estimating the states of moving targets in the nonlinear system with non-Gaussian noise, the combination of Gaussian Sum Filter (GSF) and other nonlinear filters has been chosen as the filtering algorithm conventionally. The Smooth Variable Structure Filter (SVSF) is a new predictor-corrector method used for state and parameter estimation, which has good stability and robustness. In this paper we propose a new strategy called the modified GS-EKF-SVSF, which inherits good robustness of Gaussian Sum and Smooth Variable Structure Filter (GS-SVSF) and high accuracy of Gaussian Sum and Extended Kalman Filter (GS-EKF). A nonlinear system with non-Gaussian noise for target tracking is used to test the proposed new strategy. The simulation results demonstrate that our proposed strategy has higher accuracy and better robustness when there are modelling uncertainties existing in the system. 相似文献
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A new semi-insulation structure in which one isolated island is connected to the substrate was proposed. Based on this semi-insulation structure, an advanced BCD technology which can integrate a vertical device without extra internal interconnection structure was presented. The manufacturing of the new semi-insulation structure employed multi-epitaxy and selectively multi-doping. Isolated islands are insulated with the substrate by reverse-biased PN junctions. Adjacent isolated islands are insulated by isolation wall or deep dielectric trenches. The proposed semi-insulation structure and devices fixed in it were simulated through two-dimensional numerical computer simulators. Based on the new BCD technology, a smart power integrated circuit was designed and fabricated. The simulated and tested results of Vertical DMOS, MOSFETs, BJTs, resistors and diodes indicated that the proposed semi-insulation structure is reasonable and the advanced BCD technology is validated. 相似文献
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首先提出了一种小型平面超宽带天线的设计。天线采用FR4印刷电路板制作,由共面
的叉形辐射单元和多边形缝隙构成,整体尺寸为30 mm×28 mm×0.8 mm。采用
HFSS软件对天线进行了优化设计和参数分析。然后,通过在叉形辐射单元增加微带开路枝节
并且在地板开一对倒L形细裂缝的办法,设计了组合陷波结构的超宽带天线。实验表明:组
合陷波结构天线在51~5.9 GHz阻带内,回波损耗的最大值达-1.5 dB,与常规的
单陷波结构超宽带平面天线相比较,其回波损耗频率曲线更为陡峭,从而能更有效地提高
超宽带通信系统抑制无线局域网设备所带来干扰的能力。 相似文献
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Serkan Şimşek 《AEUE-International Journal of Electronics and Communications》2013,67(10):827-832
A novel method is presented for determining the dimensional parameters of one-dimensional (1-D) photonic crystals (PCs) with specified bandgap characteristics. Conventionally, the bandgaps are determined by solving an eigenvalue equation on a fine frequency mesh. This approach requires considerable computation time and is therefore not suited for use in the optimization cycles needed in dimensional design. 相似文献
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Crosstalk noise and delay uncertainty are two major problems in modern very large scale integration (VLSI) design. To overcome these difficulties, a new dielectric structure is proposed for integrated circuits, which is in contrast to the conventional Cu/low-K technology. Both structures are simulated employing a field solver and a time domain simulator. Using the new dielectric structure, near- and far-end crosstalk noises are reduced 45.2% and 15% in the test dimensions, respectively. The proposed structure, called gradually low-K, exhibits negligible side-effects in terms of delay and power consumption. Therefore, it is shown that the gradually low-K structure is a relevant choice to overcome the crosstalk and delay uncertainty problems, especially in the global interconnects tier. 相似文献