Surfactant-mediated growth of InAs-GaAs superlattices and quantum dot structures grown at different temperatures

The structural and optical qualities of superlattice InAs-GaAs structures and quantum dots (QDs), grown by molecular beam epitaxy (MBE) at low (250 °C) and normal (∼450 °C) growth temperatures, have been investigated. The InAs layers (3 monolayers) were grown under conditions where only the indium beam impinged upon the growth surface (surfactant growth mode). This growth mode still resulted in the formation of QDs at normal growth temperatures, but with dot sizes that were much smaller than those for “normal” growth of 3 ML InAs-GaAs QD structures. In addition, at low temperature under such “arsenic-free” conditions a very high quality InAs-GaAs superlattice structure with 3 ML of InAs was formed, as demonstrated by transmission electron microscopy (TEM). This is a direct confirmation that the critical thickness of InAs can be extended well beyond the 1.7 ML limit seen at higher growth temperatures.     

Increased lateral oxidation rates of AllnAs on InP using short-period superlattices

We present greatly increased lateral oxidation rates for AlInAs grown as a short-period superlattice of InAs and AlAs compared to the analog alloy. The tensile strain in the AlAs layers is balanced by the compressive strain in the InAs layers, creating a strain-compensated alloy lattice-matched to InP. Oxidation layers with superlattice periods up to 40 Å and cladded by lattice-matched InGaAs layers were grown on InP substrates and laterally oxidized at temperatures ranging from 450°C to 525°C. The oxidation depth for a given time and temperature was seen to increase with superlattice period, allowing increased oxidation depths or reduced oxidation temperatures compared to the analog alloy. Oxidized layers were examined with transmission electron microscopy and were found to retain some of the superlattice structure.     

High quality relaxed Ge layers grown directly on a Si(0 0 1) substrate

After a long period of developing integrated circuit technology through simple scaling of silicon devices, the semiconductor industry is now embracing technology boosters such as strain for higher mobility channel material. Germanium is the logical supplement to enhance existing technologies, as its material behaviour is very close to silicon, and to create new functional devices that cannot be fabricated from silicon alone (Hartmann et al. (2004) [1]). Germanium wafers are, however, both expensive and less durable than their silicon counterparts. Hence it is highly desirable to create a relaxed high quality Ge layer on a Si substrate, with the provision that this does not unduly compromise the planarity of the system. The two temperature method, proposed by Colace et al. (1997) [2], can give smooth (RMS surface roughness below 1 nm) and low threading dislocation density (TDD <10⁸ cm⁻²) Ge layers directly on a Si(0 0 1) wafer (Halbwax et al. (2005) [3]), but these are currently of the order of 1-2 μm thick (Hartmann et al. (2009) [4]).We present an in depth study of two temperature Ge layers, grown by reduced pressure chemical vapour deposition (RP-CVD), in an effort to reduce the thickness. We report the effect of changing the thickness, of both the low temperature (LT) and the high temperature (HT) layers, emphasising the variation of TDD, surface morphology and relaxation.Within this study, the LT Ge layer is deposited directly on a Si(0 0 1) substrate at a low temperature of 400 °C. This low temperature is known to generate monolayer islands (Park et al. (2006) [5]), but is sufficiently high to maintain crystallinity whilst keeping the epitaxial surface as smooth as possible by suppressing further island growth and proceeding in a Frank-van der Merwe growth mode. This LT growth also generates a vast number of dislocations, of the order of 10⁸-10⁹ cm⁻², that enable the next HT step to relax the maximum amount of strain possible. The effect of varying the HT layer thickness is studied by depositing on a LT layer of fixed thickness (100 nm) at a higher growth temperature of 670 °C. We find that the HT layer allows Ge-on-Ge adatom transport to minimise the surface energy and smooth the layer. The final step to the technique is annealing at a high temperature that allows the dislocations generated to glide, increasing the degree of relaxation, and annihilate. We find that annealing can reduce the TDD to the order of 10⁷ cm⁻², but at a cost of a significantly roughened surface.     

Heteroepitaxy of In0.53Ga0.47As on GaAs substrate by low pressure metalorganic chemical vapor deposition for the OEIC applications

InP/In_0.53Ga_0.47As/InP sandwich structure grown by low pressure metalorganic chemical vapor deposition has been investigated, in order to assess the different heteroepitaxy schemes which are based on low temperature (LT) InP metamorphic buffer layer. Photoluminescence (PL) and high resolution X-ray diffraction (HRXRD) and scan probe microscope (SPM) have been carried out to characterize the heteroepitaxy samples. For the best optimum growth condition of 15 nm-thick LT InP buffer at the growth temperature of 450 °C, the full width at half maximum (FWHM) values of the HRXRD, the room-temperature PL were 512 arcsec and 51.7 meV, respectively and the root mean square of SPM is only 0.915 nm.     

Cu contact on NiSi/Si with thin Ru/TaN barrier

Thin Ru(5 nm)/TaN(15 nm) bi-layer was sputtered on the NiSi/Si substrate as a diffusion barrier in the copper contact structure. The barrier properties were investigated through X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), transmission electron microscopy (TEM), energy dispersive X-ray (EDX) and electrical measurement. The whole Cu/Ru/TaN/NiSi/Si structure has a good thermal stability until after annealing at 450 °C. The Schottky barrier measurement shows that the leakage current increases after 450 °C annealing and after 500 °C annealing the barrier fails. Failure mechanism of the barrier stack is discussed.     

Characteristics of thin lanthanum lutetium oxide high-k dielectrics

In this work, we evaluate the thermal stability of thin film lanthanum lutetium oxide (LLO) on silicon deposited using molecular beam epitaxy (MBE). Thin LLO films are capped with TaN and annealed at 700 °C or 900 °C in nitrogen or oxygen ambients. SIMS analysis indicates no La and Lu up diffusion into TaN after annealing. However, after a 900 °C anneal Si is detected in the LLO. SIMS data also suggested growth of interfacial oxide upon anneal. Cross sectional TEM of as deposited films show a sharp high-k/Si-substrate interface with very thin interfacial layer. An increase in the LLO layer thickness, and the interfacial layer thickness between the LLO and the Si-substrate is observed after annealing. Capacitors with LLO dielectrics were also formed using TiN electrode and low leakage is demonstrated for samples annealed at 700 °C. However, a large positive flatband voltage shift and an increase in leakage is observed in LLO capacitors after undergoing 900 °C anneal with a TiN metal gate.     

Investigation of the effect of growth interruption on the formation of InAs/GaAs quantum dot superlattice near the InAs critical thickness

Two kinds of superlattices (i) with and (ii) without growth interrupt (GI) after deposition of 1.77 monolayers (ML) of InAs on GaAs (0 0 1) were grown by solid-source molecular beam epitaxy (MBE) and assessed by transmission electron microscopy (TEM) techniques, double crystal X-ray diffraction (DCXRD) and photoluminescence (PL) measurements in order to gain an understanding of the structural and compositional properties. In case (i) formation of coherent dislocation free self-organized quantum dots (SOQDs) with 2.8-3.2 nm height and 13-16 nm lateral size was observed, whereas in case (ii) no quantum dots had formed. In order to better understand the implication of growth interruption for the formation mechanism, highly localised assessment of the composition of the QD was carried out via atomic resolution Z-contrast imaging and electron energy loss spectroscopy (EELS).     

Electron microscopy of GaAs Structures with InAs and as quantum dots

An electron-microscopy study of GaAs structures, grown by molecular-beam epitaxy, containing two coupled layers of InAs semiconductor quantum dots (QDs) overgrown with a thin buffer GaAs layer and a layer of low-temperature-grown gallium arsenide has been performed. In subsequent annealing, an array of As nanoinclusions (metallic QDs) was formed in the low-temperature-grown GaAs layer. The variation in the microstructure of the samples during temperature and annealing conditions was examined. It was found that, at comparatively low annealing temperatures (400–500°C), the formation of the As metallic QDs array weakly depends on whether InAs semiconductor QDs are present in the preceding layers or not. In this case, the As metallic QDs have a characteristic size of about 2–3 nm upon annealing at 400°C and 4–5 nm upon annealing at 500°C for 15 min. Annealing at 600°C for 15 min in the growth setup leads to a coarsening of the As metallic QDs to 8–9 nm and to the formation of groups of such QDs in the area of the low-temperature-grown GaAs which is directly adjacent to the buffer layer separating the InAs semiconductor QDs. A more prolonged annealing at an elevated temperature (760°C) in an atmosphere of hydrogen causes a further increase in the As metallic QDs’ size to 20–25 nm and their spatial displacement into the region between the coupled InAs semiconductor QDs.     

Optical anisotropy and photoluminescence temperature dependence for self-assembled InAs quantum islands grown on vicinal (001) InP substrates

In this paper, we report on a detailed investigation of the effect of misorientated InP(001) substrates on the optical properties of InAs quantum islands grown by molecular beam epitaxy in the Stranski-Krastanow regime. Temperature-dependent photoluminescence and polarization of photoluminescence (PPL) are studied. PPL shows a high degree of linear polarization, near 40%, for the sample grown on the substrate with 2° off miscut angle towards [110] direction (2°F) and only 16% for the sample grown on the substrate with 2° off miscut angle towards [010] direction (2°B). This result pointing out the growth of InAs quantum wires (QWr) on 2°F substrate and of quasi-isotropic InAs quantum dots (QD) on 2°B substrate. The luminescence remains strong at 300 K as much as 36% of that at 8 K, indicating a strong spatial localization of the carriers in the InAs QIs grown on InP(001).     

Solid phase epitaxial growth of Dy-germanide films on Ge(0 0 1) substrates

Dy thin films are grown on Ge(0 0 1) substrates by molecular beam deposition at room temperature. Subsequently, the Dy film is annealed at different temperatures for the growth of a Dy-germanide film. Structural, morphological and electrical properties of the Dy-germanide film are investigated by in situ reflection high-energy electron diffraction, and ex situ X-ray diffraction, atomic force microscopy and resistivity measurements. Reflection high-energy electron diffraction patterns and X-ray diffraction spectra show that the room temperature growth of the Dy film is disordered and there is a transition at a temperature of 300-330 °C from a disordered to an epitaxial growth of a Dy-germanide film by solid phase epitaxy. The high quality Dy₃Ge₅ film crystalline structure is formed and identified as an orthorhombic phase with smooth surface in the annealing temperature range of 330-550 °C. But at a temperature of 600 °C, the smooth surface of the Dy₃Ge₅ film changes to a rough surface with a lot of pits due to the reactions further.     

Fabrication and characterisation of high quality ZnO thin films by reactive electron beam evaporation technique

High quality zinc oxide thin films have been deposited on silicon substrates by reactive e-beam evaporation in an oxygen environment. The effect of the growth temperature and air annealing on the structural, optical and electrical properties has been investigated. X-ray diffraction measurements have shown that ZnO films are highly c-axis-oriented and that the linewidth of the (002) peak is sensitive to the variation of substrate temperature. The optimum growth temperature has been observed at 300 °C. Raman spectroscopy has been found to be an efficient tool to evaluate the residual stress in the as-grown ZnO films from the position of the E₂ (high) mode. On the other hand, the vanishing of the 574 cm⁻¹. Raman feature after annealing has been explained as due to an increase of grain size and the reduction of O-vacancy and Zn interstitial. The SEM images have shown that the surfaces of the electron beam evaporated ZnO became smoother for the growth temperatures higher than 300 °C. The optical transmittance is the highest at 300 °C and has been increased after annealing in air showing an improvement of the optical quality. Finally, the maximum electrical resistivity has been found at 300 °C, which explains its relation with the crystal quality and increased from 5.8×10⁻² Ω cm to reach an approximate value of 10⁹ Ω cm after annealing at 750 °C.     

Hf-O-N and HfO2 barrier layers for Hf-Ti-O gate dielectric thin films

Hf-O-N and HfO₂ thin films were evaluated as barrier layers for Hf-Ti-O metal oxide semiconductor capacitor structures. The films were processed by sequential pulsed laser deposition at 300 °C and ultra-violet ozone oxidation process at 500 °C. The as-deposited Hf-Ti-O films were polycrystalline in nature after oxidation at 500 °C and a fully crystallized (o)-HfTiO₄ phase was formed upon high temperature annealing at 900 °C. The Hf-Ti-O films deposited on Hf-O-N barrier layer exhibited a higher dielectric constant than the films deposited on the HfO₂ barrier layer. Leakage current densities lower than 5 × 10 A/cm² were achieved with both barrier layers at a sub 20 Å equivalent oxide thickness.     

Characterisation of titanium disilicide thin films

Properties of TiN/TiSi₂ thin films prepared on phosphorus-doped Si (1 0 0) substrates by sputtering of Ti film followed by a rapid thermal annealing in NH₃ atmosphere at different conditions were studied. Thickness of as-deposited Ti layers was 40 and 60 nm and the annealing duration was set to 10 s at temperatures from 750 to 900 °C. Formation of a compact TiN/TiSi₂/Si structure by rapid thermal annealing has been analysed by Auger electron spectroscopy and time-of-flight secondary ion mass spectroscopy depth profiling. Different amounts of oxygen in TiN layers and phosphorus redistribution in both TiN and TiSi₂ layers have also been detected. Both C54 and C49 TiSi₂ phases were identified by micro-Raman spectroscopy in samples annealed at 750 °C, whereas single C54 phase has been observed in samples annealed at higher temperatures. Creation of TiSi₂ grains of sub-micrometer size at the TiSi₂/Si substrate, explaining the depth dependence of the sheet resistance of silicide layers has been revealed by the scanning electron microscopy.     

Texture of atomic layer deposited ruthenium

Ruthenium films were grown by plasma enhanced atomic layer deposition (ALD) on Si(1 0 0) and ALD TiN. X-ray diffraction (XRD) showed that the as-deposited films on Si(1 0 0) were polycrystalline, on TiN they were (0 0 2) oriented. After annealing at 800 °C for 60 s, all Ru films were strongly (0 0 2) textured and very smooth. Electron backscatter diffraction (EBSD) and transmission electron microscopy (TEM) demonstrated that the lateral grain size of the annealed films was several 100 nm, which was large compared to the 10 nm thickness of the films. No ruthenium silicide was formed by annealing the ALD Ru films on Si(1 0 0). Comparison with sputter deposited films learned that this occurred because the ammonia plasma created a SiO_xN_y reaction barrier layer prior to film growth.     

Study of Ni-Si thin-film interfacial reactions by coupling differential scanning calorimetry measurements and transmission electron microscopy analyses

In this paper, the solid-state interactions between a 500 nm thick Ni layer and a Si wafer are studied for temperatures up to 500 °C by coupling Differential Scanning Calorimetry (DSC) and Transmission Electron Microscopy (TEM). The phase transformation temperatures determined by DSC are about 250, 300, 350 and 410 °C. Dedicated samples were prepared to identify phase transformations occurring during heating up to these temperatures. TEM analyses show that the reaction product always consists of a continuous layer so that the nature of phase(s) formed at the interface can be determined. The reaction layer thickness is about 25, 50 and 150 nm for samples heated to 250, 300 and 350 °C, respectively. Moreover, from TEM diffraction patterns, it is shown that, for such a thick layer of Ni deposited on Si substrate, the first phase forming at the Ni/Si interface is the metastable Ni₃Si compound.     

Effects of annealing of MgO buffer layer on structural quality of ZnO layers grown by P-MBE on c-sapphire

We have investigated effects of annealing of MgO buffer layer on structural quality of ZnO layers grown by plasma assisted molecular beam epitaxy on c-sapphire. ZnO layers were characterized by atomic force microscopy, high resolution X-ray diffraction (HRXRD) and cross sectional transmission electron microscopy (TEM). AFM images show that annealing of a low temperature (LT)-MgO buffer at high temperatures enhanced the surface migration of adatoms, leading to the formation of larger terraces and smoother surface morphology, as indicated by the reduction of rms values of roughness from 0.6 to 0.3 nm. HRXRD and TEM experiments reveal that the dislocation density of ZnO layers is reduced from 5.3×10⁹ to 1.9×10⁹ cm⁻² by annealing a LT-MgO buffer. All of those features indicate the structural quality of ZnO layers was improved by annealing a LT-MgO buffer layer.     

Arsenic cluster superlattice in gallium arsenide grown by low-temperature molecular-beam epitaxy

Molecular-beam epitaxy at 200 °C is used to grow an InAs/GaAs superlattice containing 30 InAs delta-layers with a nominal thickness of 1 monolayer, separated by GaAs layers of thickness 30 nm. It is found that the excess arsenic concentration in such a superlattice is 0.9×10²⁰ cm⁻³. Annealing the samples at 500 and 600 °C for 15 min leads to precipitation of the excess arsenic mainly into the InAs delta-layers. As a result, a superlattice of two-dimensional sheets of nanoscale arsenic clusters, which coincides with the superlattice of the InAs delta-layers in the GaAs matrix, is obtained. Fiz. Tekh. Poluprovodn. 32, 1161–1164 (October 1998)     

Multi-technique characterisation of MOVPE-grown GaAs on Si

The heterogeneous integration of III-V materials on a Si CMOS platform offers tremendous prospects for future high-speed and low-power logic applications. That said this integration generates immense scientific and technological challenges. In this work multi-technique characterisation is used to investigate properties of GaAs layers grown by Metal-Organic Vapour Phase Epitaxy (MOVPE) on Si substrates - (100) with 4° offset towards <1 1 0> - under various growth conditions. This being a crucial first step towards the production of III-V template layers with a relatively lower density of defects for selective epitaxial overgrowth of device quality material. The optical and structural properties of heteroepitaxial GaAs are first investigated by micro-Raman spectroscopy and photoluminescence and reflectance measurements. High-resolution X-ray diffraction (HR-XRD) is used to investigate structural properties. Advanced XRD techniques, including double-axis diffraction and X-ray crystallographic mapping are used to evaluate degrees of relaxation and distribution of the grain orientations in the epilayers, respectively. Results obtained from the different methodologies are compared in an attempt to understand growth kinetics of the materials system. The GaAs overlayer grown with annealing at 735 °C following As pre-deposition at 500 °C shows the best crystallinity. Close inspection confirms the growth of epitaxial GaAs preferentially oriented along (100) embedded in a highly textured polycrystalline structure.     

Finite element method investigation into nanoimprinting of aluminum/polyimide bi-layer substrates

Finite element method (FEM) simulations are performed to investigate the nanoimprinting of aluminum/polyimide bi-layer substrates at temperatures ranging from 25 to 200 °C. In constructing the FE analysis model, the mechanical properties of the aluminum and polyimide layers are obtained from thermo-mechanical micro-force tensile tests. The validity of the FE model is confirmed by comparing the results obtained for the formation height ratio in single-layer aluminum substrates with the experimental results. Thereafter, simulations are performed to investigate the effects of the aluminum-to-polyimide thickness ratio and the substrate temperature on the imprint pressure required to obtain a complete filling of the mold cavities. The simulation results show that under low temperature conditions (i.e. <100 °C), the imprint pressure reduces as the aluminum-to-polyimide thickness ratio decreases. In addition, for temperatures lower than 100 °C, the use of a polyimide layer reduces the imprinting force by around 38% compared to that required to imprint a single-layer aluminum substrate of an equivalent total thickness. However, for temperatures higher than 150 °C and a polyimide-to-substrate thickness ratio of more than 40%, the imprint force reversely enlarged due to the strain-hardening of the polyimide film at elevated temperatures. The simulation results obtained for the variation of the imprint pressure with the aluminum thickness ratio, the polyimide thickness ratio, and the substrate temperature are compiled in the form of a contour chart. The chart provides a convenient means of establishing suitable processing conditions for a variety of nanoimprinting applications.     

New precursors for CVD copper metallization

A novel CVD copper process is described using two new copper CVD precursors, KI3 and KI5, for the fabrication of IC or TSV (Through Silicon Via) copper interconnects. The highly conformal CVD copper can provide seed layers for subsequent copper electroplating or can be used to directly fabricate the interconnect in one step. These new precursors are thermally stable yet chemically reactive under CVD conditions, growing copper films of exceptionally high purity at high growth rates. Their thermal stability can allow for elevated evaporation temperatures to generate the high precursor vapor pressures needed for deep penetration into high aspect ratio TSV vias. Using formic acid vapor as a reducing gas with KI5, copper films of >99.99 atomic % purity were grown at 250 °C on titanium nitride at a growth rate of > 1500 Å/min. Using tantalum nitride coated TSV type wafers, ∼ 1700 Å of highly conformal copper was grown at 225 °C into 32 μm × 5 μm trenches with good adhesion. With ruthenium barriers we were able to grow copper at 125 °C at a rate of 20 Å/min to give a continuous ∼ 300 Å copper film. In this respect, rapid low temperature CVD copper growth offers an alternative to the long cycle times associated with copper ALD which can contribute to copper agglomeration occurring.