Fe3Si nanodots epitaxially grown on Si(111) substrates using ultrathin SiO2 film technique

Ultrahigh density (> 10¹² cm⁻²) Fe₃Si nanodots (NDs) are epitaxially grown on Si(111) substrates by codeposition of Fe and Si on the ultrathin SiO₂ films with ultrahigh density nanovoids. We used two kinds of methods for epitaxial growth: molecular beam epitaxy (MBE) and solid phase epitaxy. For MBE, low temperature (< 300 °C) growth of the Fe₃Si NDs is needed to suppress the interdiffusion between Fe atoms deposited on the surfaces and Si atoms in the substrate. These epitaxial NDs exhibited the ferromagnetism at low temperatures, which were expected in terms of the application to the magnetic memory device materials.     

Further work function and interface quality improvement on Al2O3 capped high-k/metal gate p-type metal-oxide-semiconductor field-effect-transistors by incorporation of fluorine

The impact of fluorine (F) incorporation into TiN/HfO₂/SiO₂ on work function has been investigated. By process scheme optimization, F implanted through sacrificial oxide layer reveals sufficient the flat-band voltage (V_FB) shift ~ 170 mV without an equivalent oxide thickness (EOT) penalty. On the contrary, apparent EOT increasing was observed if F implanted directly through Si. Moreover, F incorporation into TiN/Al₂O₃/HfO₂/SiO₂, the V_FB shift can be up to about 250 mV or 410 mV at 10 keV with a dose of 2 × 10¹⁵ cm^− 2 or 5 × 10¹⁵ cm^− 2, respectively. Effective work function has been boosted to 4.95 eV closer to the valence band edge. Besides, interface defect density also can be improved ~ 20% by F incorporation from charge pumping result.     

Simulations of Si and SiO2 etching in SF6 + O2 plasma

Chemical etching of Si and SiO₂ in SF₆ + O₂ plasma is considered. The concentrations of plasma components are calculated using values extrapolated from experimental data. Resulting calculations of plasma components are used for the calculation of Si and SiO₂ etching rates. It is found that the reaction constants for reactions of F atoms with Si atoms and SiO₂ molecules are equal to (3.5 ± 0.1) × 10⁻² and (3.0 ± 0.1) × 10⁻⁴, respectively. The influence of O₂ addition to SF₆ plasma on the etching rate of Si is quantified.     

Correlation between surface damage and micro-defects in Si covered with insulating layer by implantation of He and H ions

Cz n-type Si (100) wafers covered with a 220 nm SiO₂ layer or a 170 nm Si₃N₄ layer were singly implanted with 160 keV He ions at a dose of 5 × 10¹⁶/cm² or successively implanted with 160 keV He ions at a dose of 5 × 10¹⁶/cm² and 110 keV H ions at a dose of 1 × 10¹⁶/cm². Surface morphologies together with defect microstructures have been studied by means of several techniques, including optical microscopy, atomic force microscopy, and cross-sectional transmission electron microscopy (XTEM). Only surface blistering has been observed for He and H sequentially implanted SiO₂/Si samples after annealing in temperature range up to 1000 °C. However, as for the He and H implanted Si₃N₄/Si samples, surface features including blistering and the localized exfoliation of both the top Si₃N₄ layer and the implanted Si layer have been well demonstrated during subsequent annealing. XTEM observations reveal quite different defect morphologies in two kinds of materials under the same implantation and annealing conditions. The possible mechanisms of surface damage in two kinds of materials have been discussed and presented based on the XTEM results.     

Effect of N2O/SiH4 flow ratios on properties of amorphous silicon oxide thin films deposited by inductively-coupled plasma chemical vapor deposition with application to silicon surface passivation

Silicon oxide (SiO_x) thin films have been deposited at a substrate temperature of 300 °C by inductively-coupled plasma chemical vapor deposition (ICP-CVD) using N₂O/SiH₄ plasma. The effect of N₂O/SiH₄ flow ratios on SiO_x film properties and silicon surface passivation were investigated. Initially, the deposition rate increased up to the N₂O/SiH₄ flow ratio of 2/1, and then decreased with the further increase in N₂O/SiH₄ flow ratio. Silicon oxide films with refractive indices of 1.47-2.64 and high optical band-gap values (>3.3 eV) were obtained by varying the nitrous oxide to silane gas ratios. The measured density of the interface states for films was found to have minimum value of 4.3 × 10¹¹ eV⁻¹ cm⁻². The simultaneous highest τ_eff and lowest density of interface states indicated that the formation of hydrogen bonds at the SiO_x/c-Si interface played an important role in surface passivation of p-type silicon.     

Optimized deposition and characterization of nanocrystalline magnesium indium oxide thin films for opto-electronic applications

Transparent conducting magnesium indium oxide films (MgIn₂O₄) were deposited on to quartz substrates without a buffer layer at an optimized deposition temperature of 450 °C to achieve high transmittance in the visible spectral range and electrical conductivity in the low temperature region. Magnesium ions are distributed over the tetrahedral and octahedral sites of the inverted spinel structure with preferential orientation along (3 1 1) Miller plane. The possible mechanism that promotes conductivity in this system is the charge transfer between the resident divalent (Mg²⁺) and trivalent (In³⁺) cations in addition to the available oxygen vacancies in the lattice. A room temperature electrical conductivity of 1.5 × 10⁻⁵ S cm⁻¹ and an average transmittance >75% have been achieved. Hall measurements showed n-type conductivity with electron mobility value 0.95 × 10⁻² cm² V⁻¹ s⁻¹ and carrier concentration 2.7 × 10¹⁹ cm⁻³. Smoothness of the film surface observed through atomic force microscope measurements favors this material for gas sensing and opto-electronic device development.     

An investigation of the electrical transport properties of graphene-oxide thin films

The electrical transport properties of graphene-oxide (GO) thin films were investigated. The GO was synthesized by a modified Hummers method and was characterized by X-ray diffraction and UV-visible spectroscopy. The thin film of GO was made on a Si/SiO₂ substrate by drop-casting. The surface morphology of the GO film was analyzed by using scanning electron microscopy and atomic force microscopy techniques. Temperature dependent resistance and current-voltage measurements were studied using four-terminal method at various temperatures (120, 150, 175, 200, 250 and 300 K) and their charge transport followed the 3D variable range hopping mechanism which was well supported by Raman spectra analysis. The presence of various functional groups in GO were identified by using high resolution X-ray photo electron (XPS) and Fourier transform infra red (FT-IR) spectroscopic techniques. Graphene-oxide thin film field effect transistor devices show p-type semiconducting behavior with a hole mobility of 0.25 cm² V⁻¹ s⁻¹ and 0.59 cm² V⁻¹ s⁻¹ when measured in air and vacuum respectively.     

Single crystalline β-FeSi2 grown using high-purity FeSi2 source

We have investigated the effect of FeSi₂ source purity on the electrical property of β-FeSi₂ grown from solution. A high-purity FeSi₂ source avoided a contamination of Cu and W metals was synthesized by melting a high-purity Fe (5N) and Si (5N-up) in a quartz ampoule. Glow discharge mass spectrometry revealed that the purity of the FeSi₂ source synthesized using 5N-Fe and a quartz-ampoule-melting process is one order of magnitude higher than that of the conventional arc-melted FeSi₂ source using 4N-Fe. The β-FeSi₂ crystals grown using the high-purity FeSi₂ and Zn solvent showed n-type conduction, whereas those grown using the arc-melted FeSi₂ showed p-type. The carrier concentration of the n-type crystals was (4.9-6.3) × 10¹⁸ cm^− 3, which was more than 10 times higher than that of the p-type crystals (5.2 × 10¹⁷ cm^− 3). From the ICP-MS and SIMS analysis of the grown crystals, we found that dominant impurity concentrations (Cr, Mn, Co, Ni, Cu, Zn and W) in the p-type crystals were higher than those in the n-type ones. Therefore, the p-type conductivity of undoped crystals grown using Zn solvent results from unintentional doping by the high impurity level of the used FeSi₂ source.     

Characterization of fluorine-doped silicon dioxide films by Raman spectroscopy and Electron-spin resonance

We have measured Raman and Electron-spin resonance (ESR) spectra of fluorine-doped SiO₂ films deposited by two different methods. In high-density plasma (HDP) films, the Raman band at about 490 cm^− 1 becomes drastically stronger as the F/Si ratio increases, whereas the Raman band from threefold ring defect is independent of the F/Si ratio. The unusual increase of the intensity of the 490 cm^− 1 band in HDP films has been interpreted in terms of the existence of Si-Si clusters. From a comparison between Raman spectra of HDP film and plasma chemical vapor deposition using tetraethoxysilane (p-TEOS) film with the same F/Si ratios it has been found that HDP film has more Si-Si bonds and threefold ring defects than p-TEOS film. Furthermore, the polarized Raman spectra in the 810 cm^− 1 bands indicate that inhomogeneous SiO₂ clusters of various sizes should exist in the network structure of HDP film. The result of the ESR measurement shows that HDP films have fewer dangling bonds than p-TEOS films. It is considered that many Si-Si clusters, threefold ring defects, and inhomogeneous SiO₂ cluster sizes, and the few dangling bonds in HDP films give rise to the film properties of low stress, good adhesion with Si substrate, and low water permeation.     

Electrical properties of Sm-doped bismuth titanate thin films prepared on Si (100) by metalorganic decomposition

Samarium-doped bismuth titanate [Bi_4−xSm_xTi₃O₁₂ (BSmT)] thin films have been grown on n-type Si (100) substrates using metalorganic decomposition and subsequent annealing at 700 °C for 1 h. X-ray diffraction analysis showed layered perovskite structures with a single phase in the films. The current-voltage characteristics displayed ohmic conductivity in the lower voltage range and space-charge-limited conductivity in the higher voltage range. The capacitance-voltage characteristics of Au/BSmT/Si (100) exhibited hysteresis loops due to the ferroelectricity and did not show large carrier injections. The fixed charge density and the surface state density of BSmT films on Si substrate were calculated to be in the range of 10¹¹ cm⁻² and 10¹² cm⁻² eV⁻¹, respectively.     

Removal of stacking faults in Ge grown on Si through nanoscale openings in chemical SiO2

Nucleation and eventual coalescence of Ge islands, grown out of 5 to 7 nm diameter openings in chemical SiO₂ template and epitaxially registered to the underlying Si substrate, have been shown to generate a low density of threading dislocations (?10⁶ cm^− 2). This result compares favorably to a threading dislocation density exceeding 10⁸ cm^− 2 in Ge films grown directly on Si. However, the coalesced Ge film contains a relatively high density of stacking faults (5 × 10⁷ cm^− 2), and subsequent growth of GaAs leads to an adverse root-mean-square roughness of 36 nm and a reduced photoluminescence intensity at 20% compared to GaAs grown on Ge or GaAs substrates. Herein, we find that annealing the Ge islands at 1073 K for 30 min before their coalescence into a contiguous film completely removes the stacking faults. However, the anneal step undesirably desorbs any SiO₂ not covered by existing Ge islands. Further Ge growth results in a threading dislocation density of 5 × 10⁷ cm^− 2, but without any stacking faults. Threading dislocations are believed to result from the later Ge growth on the newly exposed Si where the SiO₂ has desorbed from areas uncovered by Ge islands. The morphology and photoluminescence intensity of GaAs grown on the annealed Ge is comparable to films grown on GaAs or Ge substrates. Despite this improvement, the GaAs films grown on the annealed Ge/Si exhibit a threading dislocation density of 2 × 10⁷ cm^− 2 and a minority carrier lifetime of 67 ps compared to 4 to 5 ns for GaAs on Ge or GaAs substrates. A second oxidation step after the high temperature anneal of the Ge islands is proposed to reconstitute the SiO₂ template and subsequently improve the quality of Ge film.     

Silicon oxide synthesized using an atmospheric pressure microplasma jet from a tetraethoxysilane and oxygen mixture

Local deposition of SiO_x was studied using an atmospheric pressure very-high-frequency (VHF) inductive coupling microplasma jet (AP-MPJ) from a tetraethoxysilane ((Si(OC₂H₅)₄), TEOS) and oxygen mixture. The SiO_x obtained showed the dielectric constant of 3.8 with a low leakage current of the order of ∼ 10^− 6 A ·cm^− 2 up to 8 MV ·cm^− 1. Bottom-gated sputtered-ZnO thin-film transistors with a AP-MPJ SiO_x as a gated dielectric layer exhibited a relatively high field-effect mobility of 24 cm² V^− 1 s^− 1, a threshold voltage of 14 V and an on/off current ratio of ∼ 10⁴, a performance comparable to that of thermal silicon dioxide. The TFT performance was also obtained for the top-gated ZnO-TFTs with a field-effect mobility of 1.4 cm² ·V^− 1 s^− 1, a threshold voltage of − 1.9 V, and an on/off current ratio of ∼ 10³.     

Investigation of brittle failure in transparent conductive oxide and permeation barrier oxide multilayers on flexible polymers

An oxide multilayer structure—consisting of an indium zinc oxide (IZO) conductive layer, a silicon oxide (SiO_x, x = 1.8) water vapor permeation barrier, and an aluminum oxide (Al₂O₃) interlayer—coated on polyethylene terephthalate (PET) is proposed as a transparent flexible substrate for display and photovoltaic applications. Vital properties of the multilayer, such as the low water vapor impermeability of the SiO_x barrier and the high conductance of the IZO film, degraded considerably because of the crack formation in bend geometries, attributed to the large difference between elastic properties of the oxide films and polymers. In order to suppress the crack formation, a 10-nm-thick Al₂O₃ interlayer was sputtered on Ar ion-beam treated PET surfaces prior to a SiO_x plasma-enhanced chemical vapor deposition (PECVD) process. Changes in the conductance and water vapor impermeability were investigated at different bending radii and bending cycles. It was found that the increases in resistance and water vapor transmission rate (WVTR) were significantly suppressed by the ion-beam PET pretreatment and by the sputtered Al₂O₃ interlayer. The resistance and WVTR of IZO/SiO_x/Al₂O₃/PET systems could be kept low and invariable even in severely bent states by choosing the SiO_x thickness properly. The IZO (135 nm)/SiO_x (90 nm)/Al₂O₃ (10 nm)/PET system maintained a resistance of 3.2 × 10^− 4 Ω cm and a WVTR of < 5 × 10^− 3 g m² d^− 1 after 1000 bending cycles at a bending radius of 35 mm.     

Comparative study of surface morphology of copper phthalocyanine ultra thin films deposited on Si (111) native and RCA-cleaned substrates

Comparative study of substrate doping influence on surface morphology of 16-nm CuPc ultra-thin layers deposited on RCA-cleaned Si (111)/SiO₂ substrates was carried out. The structure and the morphology of thin films were investigated by X-ray photoelectron spectroscopy and atomic force microscopy. The investigations were aimed to provide information whether substrate doping type can be used as one of the parameters for engineering of the sensing layers structure. Atomic force microscopy images and results of photoemission experiments did not reveal any significant differences in morphology and surface chemistry between used substrates. Observed differences in surface morphology of organic overlayer could be caused by different substrate doping. The CuPc film grown on p-type RCA-Si (111) shows a compact network of densely packed crystallites, while the CuPc film deposited on n-type RCA-Si (111) reveals a slightly more open network of larger crystallites. These observations are confirmed by values of roughness, which is 0.97 nm and 1.47 nm for CuPc film on RCA-cleaned p- and n-type substrates, respectively. Results were compared with data obtained for similar 16-nm-thick CuPc layers deposited on n- and p-type Si (111) covered with native oxide. Good agreement between results of both studies was found out.     

Composition, structural and electrical properties of thin films prepared by laser ablation of neodymium-doped potassium gadolinium tungstate

Thin films were grown on (001) SiO₂, SiO₂/(100) Si or (100) MgO substrates by laser ablation of neodymium-doped potassium gadolinium tungstate (Nd:KGW) single crystal target. The films were deposited at temperatures between room temperature and 750 °C and pressures between 1 × 10^− 4 Pa and 50 Pa of oxygen ambient. The influence of the deposition conditions on the composition, structure, morphology and electrical properties of the films was investigated. Special attention was paid to the films deposited in vacuum (1 × 10^− 4 Pa) or at very low oxygen pressures. Under such conditions, the potassium (K), gadolinium (Gd) and oxygen (O) content decreased strongly as the temperature was increased. At room temperature, the films were K and O stoichiometric, in contrast with Gd, which showed a concentration twice higher. The films were polycrystalline, with the exception of those deposited at temperatures below 500 °C, which were amorphous. However, all were smooth and dense. The films grown in vacuum and at temperatures between 500 and 700 °C consist mainly of “â-tungsten” - tungsten oxide (W₃O) phase. The films grown on SiO₂/Si possessed the best surface quality with nano-size relief. The resistivity measurements as a function of the temperature showed that the films produced in vacuum and at temperatures below 500 °C were highly insulating, whereas at 600 °C they exhibited semiconducting behavior or a metallic one at 700 °C. This behavior can be attributed to the existence of various valence states for tungsten below W⁶⁺ in the films and to their crystal structure.     

Ohmic contacts and n-type doping on TixCr2 − xO3 films and the temperature dependence of their transport properties

A procedure to dope n-type Cr_2 − xTi_xO₃ thin films is proposed. Besides doping the material, at the same time the method forms ohmic contacts on Ti_xCr_2 − xO₃ films. It consists on the deposition of 10 nm Ti and 50 nm Au, followed by thermal annealing at 1000 °C for 20 min in N₂ atmosphere. Ohmic contacts were formed on three samples with different composition: x = 0.17, 0.41 and 1.07 in a van der Pauw geometry for Hall effect measurements. These measurements are done between 35 K and 373 K. All samples showed n-type nature, with a charge carrier density (n) on the order of 10²⁰ cm^− 3, decreasing as x increased. As a function of temperature, n shows a minimum around 150 K, while the mobilities have an almost constant value of 11, 28 and 7 cm²V^− 1 s^− 1 for x = 0.17, 0.41 and 1.07, respectively.     

Room temperature ferromagnetic multilayer thin film based on indium oxide and iron oxide for transparent spintronic applications

Pulsed laser deposition technique is used for fabrication of multilayer thin film of indium oxide (In₂O₃) and iron oxide (Fe₃O₄). X-ray diffraction study shows that In₂O₃ film is highly oriented along (222) direction. The optical band gap of the multilayer is observed to be 3.65 eV. The film shows n-type behavior with resistivity, carrier concentration, and mobility of 5.59 × 10⁻⁴ Ω.cm, 2.33 × 10²⁰ cm⁻³, and 48 cm ²v⁻¹ s⁻¹ respectively. Magnetic measurement shows that the film is ferromagnetic at room temperature. Hysteresis measurements at 5 K after field cooling show a shift and broadening of the hysteresis loop, which is due to exchange bias coupling.     

Localization effect of a current-path in amorphous In-Ga-Zn-O thin film transistors with a highly doped buried-layer

The highly-doped buried layer (carrier concentration of ~ 10¹⁹ cm^− 3) in an amorphous indium-gallium-zinc oxide (a-IGZO) channel layer of thin film transistor (TFT) led to dramatic improvements in the performance and prolonged bias-stability without any high temperature treatment. These improvements are associated with the enhancement in density-of-states and carrier transport. The channel layer is composed of Ga-doped ZnO (GZO) and a-IGZO layers. Measurements performed on GZO-buried a-IGZO (GB-IGZO) TFTs indicate enhanced n-channel active layer characteristics, such as V_th, μ_FE, I_off, I_on/off ratio and S.S, which were enhanced to 1.2 V, 10.04 cm²/V·s, ~ 10⁻¹³A, ~ 10⁷ and 0.93 V/decade, respectively. From the result of simulation, a current path was well defined through the surface of oxide active layer especially in GB-IGZO TFT case because the highly-doped buried layer plays the critical role of supplying sufficient negative charge density to compensate the amount of positive charge induced by the increasing gate voltage. The mechanism underlying the high performance and good stability is found to be the localization effect of a current path due to a highly-doped buried layer, which also effectively screens the oxide bulk and/or back interface trap-induced bias temperature instability.     

Demonstration of logic AND device using a split-gate pentacene field effect transistor

We report on the fabrication and performance of pentacene-based split-gate field effect transistors (FETs) on doped Si/SiO₂ substrates. Several transistors with split gate structures were fabricated and demonstrated AND logic functionality. The transistor’s functionality was controlled by applying either 0 or − 10 V to each of the gate electrodes. When − 10 V was simultaneously applied to both gates, the transistor was conductive (ON), while any other combination of gate voltages rendered the transistor highly resistive (OFF). A significant advantage of this device is that AND logic devices with multiple inputs can be built using a single pentacene channel with multiple gates. The p-type carrier mobility of charge within the pentacene active layer of these transistors was about 10^− 5 cm²/V-s. We attribute the low value of mobility primarily to the sharp contours of the pentacene film between the drain and the source contacts and to defects in the pentacene film. The average charge density was 1.4 × 10¹² holes/cm². Despite low mobility, the devices operated at lower drain-source (V_DS) and gate-source (V_GS) voltages as compared with previously reported pentacene based FETs.