一种带频率抖动功能的振荡器电路的设计

介绍了一种带频率抖动功能的振荡器,该振荡器结构简单、频率抖动效果明显,通过周期性改变振荡器内部比较器的比较阈值达到频率抖动的效果,可有效降低芯片电磁干扰.使用0.5 μm BCD工艺对电路进行仿真,在25℃,TT工艺角下,振荡器中心频率为66.87 kHz,频率抖动差值为±5.02 kHz,频率抖动重复频率约为1.046 kHz.电路适用于对电磁兼容性要求较高的开关电源芯片,具有很强的工程实用性.     

应用于LED照明驱动的频率抖动振荡器

针对LED照明驱动方案,提出一种带频率抖动功能的振荡器,包括一个主振荡器和一个辅助振荡器,通过线性改变主振荡器的充放电电流,使主振荡器频率线性变化,实现频率抖动.基于700V BCD工艺,对电路的应用芯片进行仿真和流片.测试结果表明,设计的电路成功实现在中心频率55kHz上下2.5kHz范围内以250Hz的速率抖动,可以减小电磁干扰对电源转换器系统的影响.     

一款2.5A电流模式Buck型DC-DC的研究与设计

基于提高模拟控制电流模式Buck型DC-DC芯片效率的目的,通过对一款2.5 A电流模式Buck型DC-DC的功率管损耗模型进行分析,提出了一种根据负载电流不同而产生不同控制信号来控制振荡器充电电流大小的方法,从而实现振荡器频率切换进而提升效率。该电路主要由误差放大器、比较器和梯形波产生电路等构成,在CSMC 0.25BCD高压工艺库下,使用spectre完成电路设计与仿真验证,结果表明,在小于500 mA负载电流时,效率提升最高达10%;在500 mA至1.5 A负载电流时,效率提升最高达2%;在1.5 A至2.5 A负载电流时,效率提升最高达0.5%。     

一种具有省电模式CMOS振荡器电路

提出了一种适用于电源转换芯片的具有省电模式的CMOS振荡器电路,其特有的变频模式和间歇模式可以有效降低整个电源系统在轻载与空载时的功率损失,使得整个系统能随负载的变轻而线性降低开关频率,并在空载状态下进入间歇模式。基于SinoMOS1μm40V CMOS工艺,仿真和流片结果证明了该振荡器电路能够为电源转换系统芯片降低功耗提供所需要的功能,即根据负载情况自动调整PWM开关频率。     

一种无需振荡器的数字频率抖动电路及其应用

为了解决滞环控制模式开关电源中无振荡器电路,从而无法使用现有频率抖动方式降低EMI和现有频率抖动电路调制方式单一、移植性差的问题,本文提出了一种新型的数字频率抖动电路,该电路结构简单,调制方式多样,可移植性好。本设计采用1μm 40V CMOS工艺进行仿真验证,Hspice仿真结果表明该数字频率抖动电路有效地降低了系统的EMI。     

宽电源范围的高精度振荡器设计技术研究

为解决CMOS振荡器频率稳定性差的问题,提出一种基于阈值电压的高精度宽电源范围振荡器电路结构。利用与电源无关的恒流源和MOS管开通关断对电容进行充放电,产生占空比50%的时钟信号,设计熔丝电阻控制可修调电流镜电路实现工艺修调。基于0.25μm BCD工艺,对提出的方法进行了具体电路设计与物理实现验证,结果表明：在电源电压3 V典型情况下,时钟信号中心频率为36.5 kHz,工艺修调范围为54.14%～219.18%,修调精度为-0.82%～+2.53%。电源电压2～4 V变化范围内,频率变化系数为0.97%/V;电源电压1.8～5.8 V变化范围内,频率变化系数为2.47%/V;电源电压在1.8～12 V范围内,频率变化系数为1%/V,具有较宽的电源适应特性。     

一种用于TCOCXO的数据修调电路

采用VIS 0.15 pm BCD工艺设计了一款应用于温度补偿恒温晶体振荡器(TCOCXO)专用集成电路(ASIC)的数据修调电路.该数据修调电路由逻辑控制电路和一种电可擦可编程只读存储器(EEPROM)构成,主要功能是完成TCOCXO ASIC中温度补偿的控制及实现芯片的多模式工作.与通过模拟函数发生器实现的补偿方式相比,使用该数据修调电路实现的温度补偿方法可以实现更高的补偿精度和更小的芯片面积.通过该电路对TCOCXO ASIC进行调试与配置,搭载该ASIC的晶体振荡器在温度为-40～85℃时频率-温度稳定度可达±5×10-9.TCOCXO ASIC的测试结果表明,这种修调方法在减小芯片面积的同时可以实现更高精度的频率-温度补偿.     

一种具有频率抖动功能RC振荡器的设计

开关电源在其开关频率及倍频处,会辐射较大的电磁干扰能量,采用频率抖动技术可以将集中的干扰能量分散到较宽的频带上,从而降低干扰幅值.在对常见的RC振荡器分析的基础上,设计了一种带有频率抖动功能的振荡器.该振荡器中心频率为64.2 kHz,可以在一个周期8 ms内实现频率上下各抖动1.6 kHz幅值.在simoMOS 1 μm 40 V BiCMOS工艺条件下经过Hspice仿真,满足设计要求.     

一种线性RC压控振荡器的设计

基于LLC串联谐振芯片的应用,提出了一种线性RC压控振荡器.在传统RC振荡器的电容上叠加一个压控电流源,实现了频率受电压线性控制.仿真结果表明,该电路在典型参数下振荡器频率范围为140～280 kHz,在-40℃～125℃温度范围内可保持正常工作,且可通过外部电阻电容进行设置.该振荡器已被应用于脉冲频率调制模式下工作的LLC串联谐振芯片.     

采用频率抖动技术降低开关电源芯片的EMI设计

介绍了一种能有效抑制开关电源芯片应用中,功率开关管电磁辐射干扰的频率抖动技术原理及其电路实现。采用调频技术,让调制信号去控制开关电源的工作频率,使其原有的频率发生偏移。这样,原先集中在狭窄频谱上的电磁辐射能量得以分布在较宽频谱范围,实现了对EM I的有效抑制。基于3μm的高压BCD工艺模型,在Cadence设计环境下,采用差分电路控制开关电源中振荡电容的充放电;用镜像电流选通电路调控电容充放电电流的大小,完成了带频率抖动振荡器的电路设计,给出了实验仿真的结果和电路拓扑结构。并使用MATLAB工具对功率开关管驱动信号中有/无频率抖动功能的输出波形进行了频谱特性的对比分析,得到了采用频率抖动技术大致可以减小EM I辐射幅值近一倍的结论。     

A 12-bit sigma-delta analog-to-digital converter with a 15-MHz clock rate

A sigma-delta analog-to-digital converter that achieves 12-bit integral and differential linearity and nearly 13-bit resolution without trimming is described. The baseband width is 120 kHz with a first filter pole at 60 kHz, the clock frequency is 15 MHz, and only one 5-V power supply is needed. The circuit was realized in a p-well CMOS technology with 3-/spl mu/m minimum feature size. Compared with previous sigma-delta modulators, the input signal frequency and clock rate limit have been increased by one order of magnitude. To achieve this increase, a novel integrator concept was developed using bidirectional current sources. The circuit is fully self-contained, requiring only a 15-MHz crystal and one blocking capacitor as external elements. This converter was developed as the analog front end of a digital echo cancellation circuit for an integrated services digital network.     

Polygon-Connected Autotransformer-Based 24-Pulse AC–DC Converter for Vector-Controlled Induction-Motor Drives

This paper presents a novel autotransformer-based 24-pulse AC-DC converter feeding vector-controlled induction motor drives (VCIMDs) for improving power quality at the point of common coupling. The DC-ripple-reinjection technique is used in achieving the pulse multiplication in a 12-pulse AC-DC converter. The design of the proposed autotransformer is given, and necessary modifications are made in it to provide the same output DC voltage as a 6-pulse diode-bridge AC-DC converter to make it suitable for retrofit applications. The proposed 24-pulse AC-DC converter is found capable of suppressing up to the 21st harmonics in the supply current along with the power-factor improvement close to unity in the wide operating range of the drive. A set of power-quality indexes at input AC mains and on DC bus for a VCIMD fed from various AC-DC converters are also given to compare their performance. A prototype of the proposed autotransformer-based 24-pulse AC-DC converter is developed, and test results are presented to validate the developed design procedure and the simulation models of this AC-DC converter under varying loads.     

移相全桥ZVS变换器的优化及参数设计

针对移相全桥ZVS变换器实际电路参数选取困难问题,简要介绍了其工作原理并以工程计算方法详细设计了谐振电感、隔直电容、高频变压器、滤波电感电容等主电路关键元件参数。以此参数研制了一台48V/1KW,50kHz的样机,经测试表明该变换器能在30%及以上负载范围内实现零电压开关,纹波小于2%,30%负载时效率达到74%,60%及以上负载时效率达到85%以上,证明了参数设计的合理性。     

一种带频率识别功能的抗辐照高压电源设计

设计了一种具有频率识别功能的抗辐射高压电源.该电路鉴频范围15～25 kHz,输出电压7 800 V,输出电压建立时间小于1 s.通过对电路结构的优化,减少了输出高压建立时间,减小了鉴频电路对输出电压的延时;通过采用数字鉴频,提高了鉴频电路的抗辐射能力,提升了整体电路的综合抗辐射能力.研制的具有鉴频功能的高压电源可同时满足抗中子注量、抗总计量、抗γ剂量率等要求.仿真结果和最终测试波形表明,电路设计满足要求.     

New method of power control for series-parallel load-resonantconverters maintaining zero-current switching and unity power factoroperation

A power supply incorporating a series-parallel load-resonant converter capable of efficient operation over a wide range of output power is presented. The series-parallel resonant converter is shown to have three resonant frequencies. Operation of the circuit at each of these resonant frequencies maintains zero-current switching and high-frequency operation. The resonant circuit is designed to have different circuit resistances at each resonant frequency. The power delivered to the circuit, and hence the load, will therefore vary depending on which resonant frequency the circuit is excited at. This is the basis of a new method of power control for load-resonant converters disclosed in this paper. A welding power supply is designed and constructed which delivers pulsed output currents of 150 A while operating at 100 kHz and 60 A at 65 kHz. The power supply contains an active rectifier and draws near unity power factor     

一种双有源桥谐振变换器的研究与设计

以能量双向流动双有源桥(DAB)串联谐振变换器为研究对象,在考虑隔离变压器激磁电感和泄漏电感影响的基础上,建立双有源桥串联谐振变换器的准确等效模型,推导出其稳态工作特性。分析了DAB串联谐振变换器软开关条件和激磁电感最优值选择方法。设计了一种工作在谐振频率处的DAB串联谐振DC/DC变换器,当电压增益M=1时,所有开关在全负载范围内都工作,均能实现ZVS。还分析了负载变化时谐振电压和电流的变化规律。最后给出设计实例,并用SABER仿真软件搭建了实验电路,仿真结果验证了理论分析的有效性。     

Adaptive off-time control for variable-frequency, soft-switchedflyback converter at light loads

The soft switching of a flyback converter can be achieved by operating the circuit in the critical conduction mode. However, the critical-mode operation at light loads cannot be maintained due to a very high switching frequency and the loss of the output voltage regulation. A control which regulates the output down to the zero load and maintains soft switching at light loads is proposed. The proposed control scheme was implemented in the 380 V/19 V, 65 W flyback DC/DC converter     

A triple-mode continuous-time /spl Sigma//spl Delta/ modulator with switched-capacitor feedback DAC for a GSM-EDGE/CDMA2000/UMTS receiver

Time jitter in continuous-time /spl Sigma//spl Delta/ modulators is a known limitation on the maximum achievable signal-to-noise-ratio (SNR). Analysis of time jitter in this type of converter shows that a switched-capacitor (SC) feedback digital-to-analog converter (DAC) reduces the sensitivity to time jitter significantly. In this paper, an I and Q continuous-time fifth-order /spl Sigma//spl Delta/ modulator with 1-bit quantizer and SC feedback DAC is presented, which demonstrates the improvement in maximum achievable SNR when using an SC instead of a switched-current (SI) feedback circuit. The modulator is designed for a GSM/CDMA2000/UMTS receiver and achieves a dynamic range of 92/83/72 dB in 200/1228/3840 kHz, respectively. The intermodulation distance IM2, 3 is better than 87 dB in all modes. Both the I and Q modulator consumes a power of 3.8/4.1/4.5 mW at 1.8 V. Processed in 0.18-/spl mu/m CMOS, the 0.55-mm/sup 2/ integrated circuit includes a phase-locked loop, two oscillators, and a bandgap.     

Transformerless DC-to-DC converters with large conversion ratios

A novel switching DC-to-DC converter is introduced in which large voltage step-down ratios can be achieved without a very small duty ratio and without a transformer. The circuit is an extension of the Cuk converter to incorporate a multistage capacitor divider. A particularly suitable application would be a 50 V to 5 V converter in which DC isolation is not required. The absence of a transformer and a larger duty ratio permits operation at a high switching frequency and makes the circuit amenable to partial integration and hybrid construction techniques. An experimental 50 W three-stage voltage divider Cuk converter converts 50 V to 5 V at 500 kHz, with an efficiency higher than that for a basic Cuk converter operated at the same conditions. A corresponding voltage-multiplier Cuk converter is described, as well as dual buck-boost-derived step-down and step-up converters     

High Voltage High Frequency Class-E Converter Suitable for Miniaturization

A 120 V mains-driven class-E converter used as an electronic ballast for a 15 W fluorescent lamp is presented. The key element of the circuit is a cascoded bipolar metal-oxide semiconductor (BiMOS) switch which ensures high-voltage and high-frequency capability. In spite of the high switching frequency of 450 kHz an excellent efficiency of 91 percent could be achieved. Thus miniaturization becomes feasible.