一种新的变压器色谱峰辨识和峰定性的优化方法

针对传统的电力变压器色谱算法所造成的峰辨识缺陷、基线漂移等问题,提出了一种基于BP神经网络的峰辨识和峰定性算法。该算法首先建立了结构为2-8-2型、学习算法为GDX的BP神经网络、然后利用该网络得到的预测值,结合峰辨识的回溯前推法和峰定性窗口区间阈值法,实现油中溶解气体在线色谱谱峰的准确辨识和定性,从而掌握变压器的工作情况。所提出的方法成功应用于某色谱工作站在线色谱实时监测过程,运行结果表明:该算法抗基线漂移性能良好,可以有效提高油色谱中小峰的识别率,取得了明显的应用成效。     

基于小波和模式匹配的变压器色谱倾斜峰辨识方法

把小波和模式匹配技术引入了电力变压器色谱倾斜峰辨识领域;该方法为:先用小波技术提取色谱曲线大致的基线,然后扣除基线,消除由于基线漂移引起的色谱峰倾斜,再用基于模式匹配的色谱峰辨识方法查找色谱峰位;对该方法进行了实验研究,结果表明:该方法能辨识由于色谱基线漂移引起的倾斜峰的峰位。     

心电信号去噪的数学形态学滤波器

为探索验证一种基于数学形态滤波器的去除心电基线漂移和工频干扰的高性能滤波器设计方法,借鉴数学形态学一维信号滤波原理,提出自适应阈值ECG去噪算法的思路,讨论了3σ统计准则在ECG自适应阈值滤波中的作用,利用改进的算法对心电图中常见的工频干扰和基线漂移进行校正。通过对MIT-BIH心率变异数据库中多组数据的仿真验证研究,验证了该算法能有效实现心电信号的噪声预处理;数学形态学理论在心电信号处理中具有良好性能,是实时处理一维生物医学信号有潜力的工具。     

面向智能服装健康监护系统的心电信号基线漂移处理

面向智能服装的健康监护系统心电信号存在严重的基线漂移,针对基漂去除的需要,提出了基于基线漂移阈值的分级处理方法。首先采用滑动窗口中值滤波算法对心电信号进行滤波,并计算出基线漂移的程度大小,当其大于给定的阈值时,采用小波变换得到QRS波群的位置信息和信号的特点来变动滑动窗口大小。中值滤波和小波算法可以在两个处理平台上并行运行,提高了运算速度;最后,运用该算法分别对模拟和实际的基线漂移进行处理,并与其他算法的处理结果进行了比较,结果表明该算法具有较好的实时性和处理效果。     

基于多分辨率分析的ECG基线漂移矫正算法

基线漂移对ECG采样信号的ST段特征信息准确提取带来很大困难.利用小波变换的良好分辨率分析特性,提出基于多分辨率分析的ECG基线漂移矫正算法.根据ECG多尺度分解后的高尺度细节信息特点,采用二次样条小波对采样ECG信号进行多尺度分解,然后选择高尺度下的细节信息进行自适应滤波,最后进行多尺度重构,实现消噪目的.多次实验结果表明,该算法能有效矫正ECG的基线漂移,且保持信号低频部分特征信息,这为准确提取EcG信号的ST段特征信息奠定了基础.     

改进的经验模态分解法去除脉搏波基线漂移

脉搏波信号中含有丰富的人体生理病理信息,然而基线漂移的存在严重影响人体生理参数的准确提取,需要予以去除。针对传统经验模态分解（EMD）方法在去除基线漂移时,通过经验来确定基线漂移信号所在的固有模态函数阶数,导致去噪性能下降。根据EMD分解过程中固有模态函数的特性,提出基于过零率检测的方法进行算法改进,通过计算每阶固有模态函数的总过零率,设定阈值来确定基线漂移阶数。仿真实验结果表明：该改进算法科学严谨,能够有效地去除脉搏波基线漂移,提高了信噪比,有利于提高基于光电容积脉搏波提取血压、血氧等人体生理参数的精度。     

心电信号噪声的数字滤波研究

心血管疾病的正确诊断依赖于心电信号的准确获取,提出了一种消除工频干扰和基线漂移的数字滤波方法,该方法运算量小、设计简单、易于实现.实验表明该方法能有效滤除工频干扰和抑制基线漂移,获得真实的心电信号.     

脉搏波信号预处理方法研究

为克服脉搏波信号采集时受到的高频噪声干扰和低频噪声干扰,脉搏波信号的预处理成为心脉信号处理中的关键环节。使用零相位滤波法处理脉搏波信号,改善传统数字滤波器直接滤波的输出失真问题;通过建立评价参数,对去除高频噪声的数字滤波器和小波阈值滤波器的滤波效果进行评价,获得最佳滤波方法;对比常用去基线漂移方法在处理脉搏波信号时的特点,获得最佳去基线漂移算法。使用新研发的脉搏波采集手环采集多名受试者的脉搏波原始信息,将采集到的信号按上述方法去噪和去基线漂移后,实现脉搏波信号的预处理过程。实验结果表明,采用sym4小波基、固定阈值、软阈值函数等小波阈值去噪方法去除高频噪声并使用三次样条插值拟合曲线去除基线漂移后,所获得的脉搏波信号平滑无毛刺,每个周期起始点和终点都在同一水平基线上,满足后续脉搏波信号的医学分析和疾病诊断需要。     

色谱信号分析的算法与实现

由于色谱信号比较复杂而且频带较宽，不便于用频域分析算法进行处理．本文结合色谱数据信号的特性，提出了一套完整的基于时域分析的色谱信号数据处理的算法。该算法通过分析谱信号的斜率在正、负以及零斜率区之间的变化，确定峰曲线各转折点的位置和类型，从而判别峰的类型，对峰进行分割，以及计算面积和浓度．实践表明，该算法简单实用，能可靠地实现色谱信号中各类峰的检测与判定。     

基于离散点与小波重构SnO_2信号的新方法

提出了基于离散漂移点识别色谱基线校正的新方法,并结合小波变换去噪声技术,实现了色谱信号基线重构和噪声滤除。该方法不仅适合于色谱信号的离线处理,也适合于在线实时处理。并在以SnO2半导体金属氧化物气体传感器为检测器的便携式气相色谱仪上得到了应用,实现了总挥发性有机化合物(TVOC)检测分析中谱图的基线实时校正和噪声抑制,获得了满意的结果。     

Spice model for detection of dynamic threshold voltage shift during failure analysis of oxide TFT‐based AMD gate drivers

We present an accelerated SmartSpice model that can detect dynamic threshold voltage shift (ΔV_th)‐related failure of an oxide thin‐film transistor (TFT)‐based gate driver. During gate driver operation, the alternating HIGH and LOW input signals repeatedly stress and relax the TFT components of the gate driver. Because oxide TFTs do not recover completely during the LOW input level, ΔV_th cumulated during the HIGH input levels may result in failure of gate drivers. For correct failure analysis, a TFT model that can detect dynamic ΔV_th is, therefore, needed to replace current TFT models, as they cannot account for dynamic ΔV_th. The model presented herein works correctly with varying temperature and input signals of any shape.     

基于FPGA的TFT LCD快检信号源的设计

目前TFT模块的生产过程中常伴有模块的线缺陷和点缺陷,依据TFF模块的驱动和测试原理,设计了一种由FPGA和模拟开关组成的集成测试信号源,该信号源可提供源极信号、栅极信号、栅极控制信号和公共地信号四路测试信号,此四路信号无论是在频率、占空比、延时,还是幅值上都满足对一般中小尺寸TFT液晶模块的线缺陷和点缺陷的测试要求,可以灵活方便地移植到其他模块测试中,具有通用性.     

A 15‐in. XGA thresholdless antiferroelectric LCD addressed by TFTs and using the quasi‐dc driving method

Abstract— A 15‐in. TFT‐LCD with XGA resolution using thresholdless antiferroelectric liquid crystal (TLAF) has been developed. TLAF materials show V‐shaped switching and enable display of analog gray scale, wide viewing angle, and fast response. However, in the case that high‐resolution TFT‐LCDs using materials with large spontaneous polarization such as TLAF were driven by the conventional method, alternating current (ac) driving, the obtained contrast ratio was limited because of a sharp decline of holding voltage due to the growth of a depolarization field. In order to enhance the contrast ratio, a novel driving method referred to as quasi‐dc driving was proposed. In the quasi‐dc driving, the polarity of the applied voltage to liquid crystals inverts at certain intervals of several seconds. Moreover, the applied voltage and the charging time at the time of polarity inversion are increased more than the intended signals. By this method, the 15‐in. TFT‐LCD using TLAF with high contrast ratio (more than 100:1) and wide viewing angle was realized.     

Critical point defect detection for small‐pixel thin‐film transistor array applied to medical display

Thin‐film transistor (TFT) array testing technique has been used, which provides defect detection capability to control the yield of the TFT process. In the past, several defect inspection technologies have been developed and applied for the TFT array testing. When the TFT array pixel size is getting smaller and the resolution is higher, they also encounter the performance limitation on detecting the critical defect in this small‐pixel TFT array and facing a limited testing requirement. For medical display applications, the display pixels on an array panel are getting smaller and smaller; therefore, defect detection is getting more important and critical for managing yield with quality. In this study, a novel approach for defect detection was proposed. Here, the proposed voltage imaging technique is used for the TFT array test, and it provides better small‐pixel TFT array defect detection capability. The experimental results show that by using the voltage imaging technique, detecting critical point defect of TFT array can be effectively improved. And the detected small‐pixel size of TFT array panels can be smaller than 55 µm of an advanced medical display.     

Design of dual‐outputs‐single‐stage a‐Si:H TFT gate driver for high resolution TFT‐LCD application

A new gate driver has been designed and fabricated by amorphous silicon technology. With utilizing the concept of sharing the noise free block in a single stage for gate driver, dual‐outputs signals could be generated in sequence. By increasing the number of output circuit block in proposed gate driver, number of outputs per stage could also be adding that improves the efficiency for area reduction. Besides, using single driving thin‐film‐transistor (TFT) for charging and discharging, the area of circuit is also decreased by diminishing the size of pulling down TFT. Moreover, the proposed gate driver has been successfully demonstrated in a 5.5‐inch Full HD (1080xRGBx1920) TFT‐liquid‐crystal display panel and passed reliability tests of the supporting foundry.     

晶振与继电器多通道高精度可程控自动测试仪

为提高晶振与时间继电器的测试效率,实现仪器的便携性与可程控特性,设计了一种基于FPGA和LM3S8962的高精度智能化测试仪。该仪器可以同时接收八路输入信号,自动测试完毕后,在TFT液晶屏上实时显示测量结果、绝对误差和相对误差。实验表明,测试仪具有较小的测量不确定度和较高的工作效率。     

Robust integrated shift register circuit over clock noises for in‐cell touch applications

This paper proposes an integrated shift register circuit for an in‐cell touch panel that is robust over clock noises. It is composed of 10 thin film transistors and 1 capacitor, and the time division driving method is adopted to prevent the negative effect of display signals on the touch sensing. Two pre‐charging nodes are employed for reducing the uniformity degradation of gate pulses over time. In particular, the proposed circuit connects a drain of the first pre‐charging node's pull‐up thin film transistor (TFT) to the positive supply voltage instead of clock signals. This facilitates to lower coupling noises as well as to clock power consumption. The simulation program with an integrated circuit emphasis is conducted for the proposed circuit with low temperature poly‐silicon TFTs. The positive threshold voltage that shifts up to 12 V at the first pre‐charging pull‐up TFT can be compensated for without the uniformity degradation of gate pulses. For a 60‐Hz full‐HD display with a 120‐Hz reporting rate of touches, the clock power consumption of the proposed gate driver circuit is estimated as 7.13 mW with 160 stages of shift registers. In addition, the noise level at the first pre‐charging node is lowered to ?28.95 dB compared with 2.37 dB of the previous circuit.     

Development of rollable silicon thin‐film‐transistor backplanes utilizing a roll‐to‐roll continuous lamination process

Abstract— Rollable silicon thin‐film‐transistor (TFT) backplanes utilizing a roll‐to‐roll process have been developed. The roll‐to‐roll TFT‐backplane technology is characterized by a glass‐etching TFT transfer process and a roll‐to‐roll continuous lamination process. The transfer process includes high‐rate, uniform glass‐etching to transfer TFT arrays fabricated on a glass substrate to a flexible plastic film. In the roll‐to‐roll process, thinned TFT‐glass sheets (0.1 mm) and a base‐film roll are continuously laminated using a permanent adhesive. Choosing both an appropriate elastic modulus for the adhesive and an appropriate tension strength to be used in the process is the key to suppressing deformation of the TFT‐backplane rolls caused by thermal stress. TFT backplanes that can be wound, without any major physical damage such as cracking, on a roll whose core diameter is approximately 300 mm have been sucessfully obtained. Incorporating the TFT‐backplane rolls into other roll components, such as color‐filter rolls, will make it possible to produce TFT‐LCDs in a fully roll‐to‐roll manufacturing process.     

IGZO‐TFT technology for large‐screen 8K display

We succeeded in G8 factory for mass production of Indium–Gallium–Zink–Oxide thin‐film transistor (IGZO‐TFT) for the first time in the world. The initial TFT process was an etching stop‐type TFT, but now, we are mass producing channel etching‐type TFTs. And, its application range is smartphones, tablets, PCs, monitors, TV, and so on. In particular, because of recent demands for high‐resolution and narrow frame, our IGZO display has been advanced in technology development with gate driver in panel. In this paper, we report development combining low resistance technology and the latest IGZO‐TFT (IGZO5) for large‐screen 8K display.     

Low‐temperature poly‐Si TFT‐LCD with an integrated analog circuit

We have developed a 6‐bit D/A converter and amplifier integrated low‐temperature poly‐Si TFT‐LCD in which an integrated signal‐line driver is driven by a 5‐V power supply. We have employed a D/A converter including a new capacitor array and an original amplifier comprised of serially connected comparators to achieve high accuracy. The D/A converter performs gamma correction using upper significant bits of input data. Control signals for these circuits were generated by the integrated timing circuit. These advances in integration have been achieved for the first time using 3‐μm design rule and improved LTPS TFT technologies and provide an advanced display system with lower power consumption, smaller module size, and higher durability.