可对信号再处理的拼接红外探测器封装电学设计

随着线列型红外探测器技术的发展,对超大视场扫描的需求是线列型红外测器应用的重要方向,超大视场扫描通常需要由多片线列型红外探测器拼接完成,而拼接设计的核心主要是封装结构设计。如何将探测器信号完整的引出到封装体外,就是封装结构设计中电学设计需要做的工作。文章介绍了一种线列型红外探测器拼接结构的封装电学设计,首先介绍该拼接结构的拼接方式,然后介绍为满足该种结构的电学结构设计方案,尤其是对信号二次处理部分的电学结构设计方案,最后介绍针对该种电学结构方案进行的电学布线设计方案。     

太赫兹QCL的电子结构计算和设计

通过电子结构和波函数的设计实现电子选择性注入及粒子数反转是制备太赫兹量子级联激光器(QCL)的基础。本文介绍了求解外场下超晶格QCL电子结构的分区级数解法及非正交基对角化方法,并将计算结果与国际上啁啾超晶格及共振声子模式QCL的相关实验结果进行了对比,二者的精确吻合证明了计算方法的准确性。在此基础上给出了一种共振声子模式QCL超晶格的有源区设计方案,并讨论了外场偏离设计值对QCL特性的影响。     

Calculation of coherent attenuation at millimetre-wave frequencies

A formula is presented which enables the coherent attenuation due to rain to be calculated at any millimetre-wave frequency for any drop-size distribution. A method of scaling amplitudes for spherical drops to obtain amplitudes for horizontal polarisation incident on spheroidal drops is also presented.     

Thermal analysis of a multi-chip package design

Two-dimensional finite difference computer simulations were used for thermal analysis of an advanced multi-chip package design. In order to model high performance VLSI and ULSI applications, power dissipations ranging from 10 to 40 W/cm² on each chip and zero to 5 W/cm² on the substrate were simulated. It was found that heating due to resistive losses in the thin film interconnections between chips can impact package thermal performance. The calculated device-to-water thermal resistance was 0.4° C/W and the worst case chip-to-chip temperature variation was less than 22° C. This excellent thermal performance illustrates the effectiveness of the package’s water cooled heat sink with direct backside contact to each die. Methods to improve thermal performance are discussed.     

光电耦合器的结构设计及封装特点

对光电耦合器的结构设计进行了研究,分析了光耦器件的两种不同光传输结构,讨论了各自对应的支架结构和封装形式.同时研究了电流传输比(CTR)和绝缘电压(BV)随绝缘距离的影响关系,以及BV与封装尺寸的影响关系.     

基于FPGA的空调显示设定器数据记录方案设计

针对CRH2型动车组空调故障数据记录改进要求,设计了空调显示设定器记录48小时空调运行数据整体方案,详细介绍了FPGA软件实现方法,对空调系统进行长时试验,其结果表明数据记录正确,满足设计要求.     

QFN封装的PCB焊盘和网板设计

近几年来,由于QFN封装（Quad Flat No-lead package,方形扁平无引脚封装）具有良好的电和热性能、体积小、重量轻,其应用正在快速增长.采用微型引线框架的QFN封装称为MLF（Micro Lead Frame,微引线框架）封装.QFN封装和CSP（Chip Size Package,芯片尺寸封装）有些相似,但元件底部没有焊球,与PCB的电气和机械连接是通过PCB焊盘上印刷焊膏经过回流焊形成的焊点来实现的.QFN封装对工艺提出了新的要求,本文将对PCB焊盘和印刷网板设计进行探讨.     

Calculation of distributed resistive structures

A new method for calculation of distributed resistive structures is presented. This method is based on the conformal mapping of the distributed domain on the complex half-plane and the determination of the complex potential function as a solution of a Dirichlet problem. The method can be used in all cases when the distributed structure can be approximated with domains having conducting terminals separated by insulating points. The utility of the method is exemplified in the last part of the correspondence.     

Calculation of open resonators with the help of a modified method of extended boundary conditions

The problem on the eigenmodes of a 2D open resonator is solved with the help of the method of extended boundary conditions. A modification of this method that makes it possible to substantially enhance the accuracy of computation is proposed. The results obtained by means of approximate techniques are compared to the solution obtained with the use of the singular integral equation method.     

Procedure for design optimization of a T-cap flip chip package

In this study, a 1/4 three-dimensional finite element model of a T-cap flip chip package containing the substrate, underfill, solder bump, silicon die, metal cap and cap attachment was established to conduct thermo-mechanical reliability study during the flip chip fabrication processes. The applied thermal load was cooled from 183 °C to ambience 25 °C to determine the thermal stress and warpage during the curing period of solder ball mounting process. Under fixed geometry, two levels of underfill, metal caps and cap attachments were used to conduct the 2³ factorial design for determining reliable material combinations. The statistical tests revealed that the significant effects affecting the thermal stress were the underfill, metal cap, cap attachment and the interaction between the underfill and cap attachment. The metal cap, cap attachment and their interaction significantly affected the warpage. The proposed regression models were used to perform the surface response simulations and were useful in selecting suitable materials for constructing the package. This study provides a powerful strategy to help the designer to easily determine reliable packaging structures under various reliability considerations.     

A package design technique for size reduction of implantablebioelectronic systems

This paper presents several substrate and package design techniques to minimize the overall size of bioelectronic systems, especially those that will be implanted for in vivo studies. The emphasis is on a new capacitor attachment and a new double-substrate design that have been successfully applied to the packaging of an implantable auditory prosthesis. The entire procedure for this case is described and compared with standard techniques to illustrate the advantages of this new approach in packaging.     

三维铝封装结构设计及互连可靠性研究

针对三维封装热应力失配引发的互连可靠性问题,提出了基于铝基板侧边互连的三维封装方法。应用ANSYS软件建立了COB(Chip on Board,板上芯片)堆叠灌封模型,分析了单层COB及多层COB的应力分布并进行优化,并通过实验进行验证。结果表明,在COB层间增设围坝结构可有效抑制翘曲,经过25~125℃温循,加设围坝的四层COB灌封结构最大变形量为0.081 mm,最大等效应力为175 MPa,低于硅芯片的断裂强度,层间无开裂,经温循实验后固存读写功能正常。     

大尺寸LTCC器件在铝合金封装模块中的可靠性设计

在军用铝合金微波模块中焊接尺寸较大的LTCC器件时,由于热失配的存在,易出现应力过大甚至开裂。当采用陶瓷基板时问题更为突出。在此采用有限元分析方法研究了这类结构在温度循环过程中应力变化和分布的特点。研究结果表明,当采用陶瓷基板时,封装盒底厚度与其上各层结构(包括过渡层垫板,陶瓷基板和陶瓷元件)厚度的不合理匹配会导致陶瓷器件产生过高应力,可靠性降低。合理的设计应是减小过渡层垫板和陶瓷基板厚度,同时增加封装盒底厚度。     

Test structures for dielectric spectroscopy of thin films at microwave frequencies

This work describes the application of two different test structures to execute broadband microwave measurements of the dielectric constant of ceramic thin films. Coplanar waveguide probes and vector network analyzer were used to measure the dielectric constant versus frequency of thin films of lead zirconate titanate and zirconium titanate, fabricated by sol gel methods. One-step lithography was used to produce planar metal-insulator-metal and interdigitated capacitor test patterns. The two test structures are compared for zirconium titanate films. The metal-insulator-metal method has been applied also to a lead zirconate titanate film and to show the capability of computing the dielectric tunability.     

Analysis and optimal design of semi-insulator passivatedhigh-voltage field plate structures and comparison with dielectricpassivated structures

The influences of the field oxide thickness and the junction depth on the breakdown voltage of semi-insulator passivated planar junctions with the field plate are investigated using a 2D simulator. This is done by analyzing the two extreme situations: the planar junction with an infinitely long field plate, and the deep-depleted MOS structure having a finite size. This rather unconventional approach has offered a new physical insight into the role of the metal field plate and has revealed that the severe field crowding associated with a shallow planar junction can be greatly suppressed by using a thin field oxide. The breakdown voltage and the optimal field oxide thickness of the semi-insulator passivated field plate structures remain nearly constant over a wide variation in the junction depth, and therefore such structures are attractive for realizing high-voltages in vertical devices fabricated by low-voltage IC technology. The influences of the field plate width and the inter-electrode spacing are studied by the conventional approach, and a simple and widely applicable design guideline is given for both the nonpunchthrough and the punchthrough type structures. The influence of the surface charge in the range 0 to 10¹² cm^-2 is found to be negligible. The semi-insulator passivated and the dielectric passivated field plate structures are compared under optimal conditions. This suggests that the semi-insulator passivated structures are attractive when thin field oxide and a shallow planar junction are needed and that the dielectric passivated structures are better when compactness is desired     

程序设计基础课程教学模式研究与设计

程序设计基础课程是一门实践性很强的课程,其内容繁多,既有深度,又有广度,它的知识体系较难把握。针时初学者特点,通过对高校程序设计的教学现状进行调查,探讨了算法与语法规则在程序设计课程中的关系,采用“程序设计基础”课程的知识选取上采取“瘦身”措施,提出了采用程序设计语言语法子集进行教学的方案,通过试验,该方案能培养学生分析问题、解决问题的能力,更好地提高程序设计课程的教学效率。     

Evaluation of off-normal release frequencies for a PCB incineratorunder design

The likelihood of off-normal atmospheric releases from a municipal incinerator burning a combination of municipal solid waste and PCB-contaminated landfill material is evaluated. Fault-tree analysis identifies potential system failures in the combustion and air-pollution control systems     

利用RS232串口实现数字量的输入输出设计

在开发微机控制系统中,要实现PC机与单片机中的串行通信,经常用到的是RS232接口。普通PC机后面的COM端口也就是RS232接口。VB 6.0提供了MSCOMM通信控件,只需编写少量的程序代码,即可在Windows环境下轻松实现串口的数据交换。本文设计了AT89C52单片机与PC机进行短距离串行通信的软件与硬件电路,并在LCD液晶显示屏上显示PC上发送的信息,成功实现了基于单片机的液晶显示模块接口的开发及字符的显示。     

以面向对象程序设计的教务管理系统的设计和实现

随着高校规模的不断扩大,以及高等教育制度改革的深化,实行学分制、本科导师制等给高等院校带来大量信息量的增加,这些都给教务系统的管理带来了巨大的挑战,因此,开发适应新形势下的教务管理系统成为当前教学改革的热点。本文结合当前高校教务管理的特点,利用面向对象技术,设计出教务管理系统,以此对当前的教务系统进行改进。     

单片机的数值运算程序设计方法

本文从实际应用出发,结合计量移动标准的开发讨论了单片机数值运算程序设计的4个方面.其中,参数传递决定了采用怎样的程序结构,容错设计是为了使程序在各种条件下正常工作,算法的时间复杂性分析关系到程序的先天素质,文档编写与程序测试则说明了怎样维护程序.本文从这4个方面,概括和阐述单片机数值运算程序设计的思路和方法.