Optical Phase Add–Drop for Format Conversion Between DQPSK and DPSK and its Application in Optical Label Switching Systems

We propose and experimentally demonstrate an optical phase “add–drop” scheme to enable the format conversion between a 20-Gb/s differential quadrature phase-shift keying (DQPSK) and 10-Gb/s differential phase-shift keying. Meanwhile, the incoming DQPSK could be directly forwarded to another wavelength through the proposed optical phase “drop” scheme, which is implemented by four-wave-mixing effect in highly nonlinear fiber. By orthogonally encoding the label and payload of the optical packet on the in-phase ( $I$) and quadrature ( $ Q $) components of DQPSK, the proposed scheme could be applied in the optical label switching networks. The label erasing and rewriting of optical packets can be achieved through the proposed optical phase “drop” and “add” schemes, respectively.      

40-Gb/s Polarization-Insensitive All-Optical Clock Recovery Using a Quantum-Dot Fabry–PÉrot Laser Assisted by an SOA and Bandpass Filtering

We experimentally demonstrate polarization- insensitive all-optical clock recovery using a passively mode-locked quantum-dot Fabry–PÉrot (QD-FP) semiconductor laser at 40 Gb/s. Polarization insensitivity is achieved by using a wavelength conversion stage based on cross-phase modulation in a semiconductor optical amplifier and optical bandpass filtering. A clock signal with a root-mean-square timing jitter of 300 fs is recovered for an input data signal with a scrambled state-of- polarization (SOP). This is comparable to that from the QD-FP laser alone for an input signal with a fixed SOP. Moreover, an improvement in the tolerance to a degradation in the optical signal-to-noise ratio of the input signal is achieved by the use of the wavelength conversion stage.      

A 2.5 Gb/s Run-Length-Tolerant Burst-Mode CDR Based on a 1/8th-Rate Dual Pulse Ring Oscillator

A 2.5 Gb/s burst-mode clock and data recovery (CDR) circuit is presented that uses a 1/8th-rate ring oscillator with two pulses running simultaneously that are phase independent. One “tune” pulse sets the delay of the ring by phase locking it to a reference. The other “clock” pulse tracks the phase of the incoming data by a process of pulse removal and reinsertion. Because both pulses share the same ring, there is no frequency mismatch between the incoming data stream and the recovered clock in frequency synchronous systems, allowing for large data run lengths. A 1:8 data-demux clock is naturally generated by tapping the clock pulse along the ring. Phase acquisition is instantaneous from a single data edge. Run length tolerance is larger than 72 bits. The 0.6 mm$^{2}$ 0.13 $mu$m CMOS chip includes a CML-to-CMOS input buffer, PLL with on-chip loop filter, PRBS checker, 1:8 data demux, and eight output buffers. It has 2.7 ${rm UI}_{rm pp}$ measured jitter tolerance at 100 kHz and consumes 42 mW from a single 1.2 V supply.      

Optical Noise Tolerance in a Polarization-, Wavelength-, and Filter-Free All-Optical Clock Recovery System Based on a Monolithic Mode-Locked Laser

We experimentally investigated optical noise tolerance of a polarization-, wavelength-, and filter-free all-optical clock recovery system based on a monolithic mode-locked laser diode. The results showed that for input signal degradation, the jitter of the recovered clock did not degrade to approximately 8 dB/nm of the optical SNR. We also compared the clock recovery performance as functions of the wavelength and the modulation format (on-off keying and phase-shift keying) of the input data signals. We revealed that no significant changes were measured in the clock recovery performance despite such changes in the parameters of the input data signals, indicating that noise-tolerable clock recovery is expected, retaining the polarization- and the filter-free operations, regardless of the wavelength and the modulation format of the input data signals, by using our new scheme.     

恶化非归零码信号的全光时钟恢复

全光时钟提取结构应对输入信号的恶化程度有一定的容忍度.在一种半导体光放大器(SOA) 啁啾光纤布拉格光栅(CFBG) 受激布里渊散射(SBS)的方式实现非归零(NRZ)码信号的全光时钟提取结构中,半导体光放大器和啁啾光纤布拉格光栅共同作用实现了非归零码信号的时钟分量增强,基于受激布里渊散射的全光时钟提取结构提取出非归零码的光时钟信号.实验通过对不同恶化程度的非归零码信号的时钟提取比较发现,恶化信号的信噪比是影响光时钟提取的关键.输入非归零码信号的信噪比越差,光时钟信号光谱的噪声水平越高,提取出的光时钟信号的幅度越低.当时钟增强非归零码信号的时钟数据抑制比低于-10 dB时,无法实现非归零码信号的时钟提取.     

All-Optical Clock Recovery Using Erbium-Doped Fiber Laser Incorporating an Electroabsorption Modulator and a Linear Optical Amplifier

We demonstrated a 10-GHz all-optical clock recovery system using an erbium-doped fiber laser that incorporates an electroabsorption modulator and a linear optical amplifier. Stable pulses with peak power of 200 mW and pulsewidth of 6 ps are obtained. The output power and the pulsewidth of the recovered clock pulses are independent of the input data pattern. Stable optical clock can still be observed when the input data rate varies by more than 60% of the fundamental frequency without any optical tunable delay line inside the laser cavity. The scheme is essentially wavelength transparent for the whole C-band which recovers clock pulses from input data wavelength between 1525 and 1565 nm     

SSMCB: Low-Power Variation-Tolerant Source-Synchronous Multicycle Bus

In this paper, a variation-tolerant low-power source-synchronous multicycle bus (SSMCB) interconnect scheme is proposed. This scheme is scalable and suitable for transferring data across different clock domains such as those in “many-core” SoCs and in 3-D ICs. SSMCB replaces intermediate flip-flops by a source-synchronous synchronization scheme. Removing the intermediate flip-flops in the SSMCB scheme enables better averaging of delay variations across the whole interconnect, which reduces bit-rate degradation due to within-die process variations. Monte Carlo circuit simulations show that SSMCB eliminates 90% of the variation-induced performance degradation in a six-cycle 9-mm-long 16-bit conventional bus.      

High-Speed Optical Time-Division Multiple-Access (OTDMA) Networks Using Optical Signal Processing

In this paper, we design high-speed optical fiber networks based on the time-division multiple-access (TDMA) technique. To achieve an ultrahigh throughput, optical signal processing should be used in the network. We present a feasible scheme to implement optical TDMA networks, with the emphasis on optical clock distribution, synchronization, and optical time demultiplexing. Since the proposed network uses two wavelengths to carry optical TDMA and clock signals respectively, at each TDMA receiver slot synchronization is feasibly achieved by using simple optical delay lines to process the separated optical clock and TDMA signals. This in turn allows us to build a large-scale distribution network which is attractive for future HDTV broadcasting applications. Using the proposed scheme also allows to implement a high-capacity broadcast and select optical TDMA network for real-time data communications.     

Optical Clock Recovery Using a Polarization-Modulator-Based Frequency-Doubling Optoelectronic Oscillator

We propose and demonstrate a flexible optical clock recovery scheme using a polarization-modulator-based frequency-doubling optoelectronic oscillator (OEO). The proposed system can extract both prescaled clock and line-rate clock from a degraded high-speed digital signal using only low-frequency devices. A simple theory is developed to study the physical basis of the optical clock recovery. The OEO operation from a free-running mode to an injection-locking mode is investigated. The locking range is quantitatively predicted. An experiment is then implemented to verify the proposed scheme. A prescaled clock at 10 GHz and a line-rate clock at 20 GHz are successfully extracted from a degraded 20 Gb/s optical time-division-multiplexed (OTDM) signal. The locking range and the phase noise performance are also experimentally investigated. Clock recovery from data signals that have no explicit subharmonic tone is also achieved. The proposed system can be modified to extract prescaled clock and line-rate clock from 160 Gb/s data signal using all 40-GHz devices.      

Burst-Mode Clock Recovery Utilizing Relaxation Oscillation in Directly Modulated Lasers

A novel clock recovery scheme utilizing the relaxation oscillation in a directly modulated laser (DML) for burst-mode transmission is proposed for the first time. In this scheme, the DML generates the clock tone along with the transmitted non-return-to-zero data in the optical signal. An injection-locked oscillator (ILO) is employed in the receiver to extract the clock tone and restore the clock. The proposed scheme is investigated systematically and verified by simulations with different laser modulation currents as well as some nonideal characteristics of the system. The simulation results show that the low cost clock recovery method using an ILO in an optical link using a regular DML is highly efficient for burst-mode transmission at 10 Gbps.     

40 Gbps All‐Optical 3R Regeneration and Format Conversion with Related InP‐Based Semiconductor Devices

We report an experimental demonstration of 40 Gbps all‐optical 3R regeneration with all‐optical clock recovery based on InP semiconductor devices. We also obtain all optical non‐return‐to‐zero to return‐to‐zero (NRZ‐to‐RZ) format conversion using the recovered clock signal at 10 Gbps and 40 Gbps. It leads to a good performance using a Mach‐Zehnder interferometric wavelength converter and a self‐pulsating laser diode (LD). The self‐pulsating LD serves a recovered clock, which has an rms timing jitter as low as sub‐picosecond. In the case of 3R regeneration of RZ data, we achieve a 1.0 dB power penalty at 10^?9 BER after demultiplexing 40 Gbps to 10 Gbps with an eletro‐absorption modulator. The regenerated 3R data shows stable error‐free operation with no BER floor for all channels. The combination of these functional devices provides all‐optical 3R regeneration with NRZ‐to‐RZ conversion.     

Enhancement of clock component in a nonreturn-to-zero signal through beating process

For optical clock recovery of nonreturn-to-zero (NRZ) signals of more than 40 Gb/s, we propose and experimentally demonstrate a simple clock recovery scheme through beating process between the carrier frequency component and one of the clock frequency components in modulated NRZ signals. The proposed scheme consists of a circulator, a variable optical attenuator (VOA), and two fiber Bragg grating (FBG) filters. With FBG filters and a VOA, the proposed scheme can equalize the amplitudes of two extracted frequency components for a maximum clock-to-noise ratio (CNR). Through this scheme, we have squared the adjustment range of the VOA and achieved an enhanced CNR of more than 15 dB before the receiver in experiment. Bit error rate (BER) curves for back-to-back and 80 km transmissions showed that BERs of less than 10⁻¹¹ can be obtained without error floors for both cases. We expect that the proposed scheme can operate as an efficient clock extraction system for high-speed optical communications.     

Timing Randomly Spaced Events Using the Threshold-Voltage Shift in Disordered Semiconductors

This paper discusses the concept of using the threshold-voltage shift in disordered-semiconductor-based thin-film transistors to measure the time of occurrence of randomly spaced events of interest. We call the experimental circuit an “analog clock.” The analog clock is shown to be accurate while, at the same time, being simple in design using just one transistor.      

A 1.7 Gbps DLL‐Based Clock Data Recovery for a Serial Display Interface in 0.35‐μm CMOS

This paper presents a delay‐locked‐loop–based clock and data recovery (CDR) circuit design with a nB(n+2)B data formatting scheme for a high‐speed serial display interface. The nB(n+2)B data is formatted by inserting a ‘01’ clock information pattern in every piece of N‐bit data. The proposed CDR recovers clock and data in 1:10 demultiplexed form without an external reference clock. To validate the feasibility of the scheme, a 1.7‐Gbps CDR based on the proposed scheme is designed, simulated, and fabricated. Input data patterns were formatted as 10B12B for a high‐performance display interface. The proposed CDR consumes approximately 8 mA under a 3.3‐V power supply using a 0.35‐μm CMOS process and the measured peak‐to‐peak jitter of the recovered clock is 44 ps.     

On the Attenuation of DAC Aliases Through Multiphase Clocking

“L-fold” interpolation can be used to lower aliases of digital-to-analog converters (DACs). L-fold interpolation uses multiple DACs, each clocked with different phases of a single clock frequency with each DAC using the same signal data. The literature on this topic indicates that lowering the aliases can only be done by increasing the number of DACs and clock phases. This brief shows that by proper selection of clock phases, precise cancelling of certain aliases for a two-phase clock with two DACs is already possible. The cancellation of aliases helps reduce unwanted spurious emissions when DACs are used as amplitude modulators in polar transmitters.      

Experimental Study of the Lasing Modes of 1.3-$mu$m Highly Strained InGaAs–GaAs Quantum-Well Oxide-Confined VCSELs

We present an experimental study of the main modes involved in the emission properties of InGaAs–GaAs quantum-well oxide-confined long wavelength vertical-cavity surface-emitting lasers. Lasing properties are dominated by the so-called “oxide modes” and by aperture modes, respectively, for small and large driving currents. We present complementary investigations of the laser emission including far-field angular distribution and spectroscopic near-field optical microscopy to a better understanding of the nature of the “oxide modes.”      

An Erbium Fiber Fabricated by the “Core-Suction” Technique

An erbium doped fiber preform having a lead germanate erbium glass core with silica cladding was fabricated by a newly developed technique named “Core-Suction”. This preform was then drawn into fiber and fiber cross-section, loss spectrum and refractive index profile measured. A 30 cm piece of the manufactured fiber was spliced to a standard silica fiber using a commercial available splicer. This spliced fiber was then used to setup an erbium doped fiber amplifier (EDFA) and gain spectrum of the amplifier measured. Distributed gain of the manufactured erbium fiber was measured using an optical frequency domain reflectometry (OFDR) based optical backscatter reflectometer (OBR). It is demonstrated that the “Core-Suction” technique can be used to make a high-gain amplifier that is compatible with conventional silica fibers.      

采用两个级联外部调制器产生四倍频光载毫米波的光纤无线通信系统

研究了一种采用两个级联外部调制器基于光载波抑制原理产生四倍频毫米波的光纤无线通信(ROF)系统.在中心站利用电混频器产生副载波复用信号,通过第一个外部调制器产生两倍射频(RF)信号的光载毫米波信号,再通过第二个外部调制器产生四倍射频信号的光载毫米波.实验显示采用频率为10 GHz的射频信号源和2.5 Gbit/s的数据基带信号混频通过两个级联外部凋制器后产生毫米波的频率为40 GHz,并且在单模光纤中传输距离达20 km,功率代价小于2 dB.     

Bit rate and wavelength transparent all-optical clock recovery scheme for NRZ-coded PRBS signals

All-optical clock recovery from 40-Gb/s nonreturn-to-zero (NRZ) pseudorandom binary sequence data streams based on self-pulsating lasers is presented. A compact preprocessing circuit is utilized to convert an NRZ signal to a pseudoreturn-to-zero sequence before injecting into the optical clock. It comprises a semiconductor optical amplifier followed by a periodical wavelength-division-multiplexing demultiplexer filter. A stable sinusoidal clock signal with a root-mean-square jitter below 700 fs is detected at the output of the self-pulsating laser within data dynamic range of more than 8 dB. The performance of the all-optical clock recovery scheme is investigated by varying the bit rates between 39.81 and 43.02 Gb/s as well as for various wavelengths in the C-band.     

All-Optical Asynchronous Detection for a Compact Integrable Incoherent Optical CDMA System

In this paper, we investigate all-optical truly asynchronous detection without global clocking in an incoherent optical code-division multiple-access (CDMA) system. The implemented system is designed with an integrable optical source consisting of an electro-absorption modulator for pulse carving, compact coders consisting of fiber Bragg grating arrays for encoding and decoding, and receiver consisting of an all-optical thresholder for data and clock recovery. We compare three detection schemes: (1) synchronous detection with data from a photodetector and clock from an external source; (2) asynchronous detection with data and clock from the all-optically thresholded signal received by a clock and data recovery (CDR) unit; and (3) asynchronous detection with data from a photodetector and clock extracted from the all-optically thresholded signal using CDR. Error-free transmission is obtained for detection schemes (1) and (3). A combination of all-optical thresholding and CDR technology is demonstrated in an optical CDMA system for the first time.