Si-diffused GaN for enhancement-mode GaN mosfet on si applications

Si diffusion into GaN was studied as a function of encapsulant type (SiO₂ or SiN_x) and diffusion temperature. Using a SiO₂ encapsulant, the Si diffusion exhibited an activation energy of 0.57 eV with a prefactor of 2.07×10⁻⁴ cm² sec⁻¹ in the temperature range 800–1,000°C. An enhancement-mode MgO/GaN-on-Si metal-oxide semiconductor field-effect transistor (MOSFET) was fabricated utilizing Si-diffused regions under the source and drain to provide an accumulated channel. The gate leakage through the undoped GaN was low enough for us to achieve good saturation behavior in the drain-current-voltage characteristics. The devices showed improved transconductance and drain current relative to previous devices with Si-implanted source/drain regions.     

Circular and linear enhancement-mode 6H-SiC MOSFETs for high temperature applications

Direct current measurements are performed up to 673K at circular and linear (shown in parenthesis) enhancement-mode metal oxide semiconductor field effect transistors (MOSFETs). These devices are fabricated on a p-type 6H-SiC epitaxial layer with a doping concentration N_A ≈ 1 × 10¹⁶ cm⁻¹. The n⁺ source/drain regions and the p⁺ regions for the channel stops are achieved by ion implantation of nitrogen and aluminum, respectively. Both MOSFET geometries show excellent output characteristics with a good saturation behavior even at elevated temperatures. The inversion layer mobility μ_n extracted in the linear region is 38 cm²·V⁻¹·s⁻¹ (35 cm²·V⁻¹·s⁻¹) and reveals a weak dependence on temperature with a maximum of 46 cm²·V⁻¹·s⁻¹ (42 cm²·V⁻¹·s⁻¹) at about 473K. Regarding the transfer characteristics, the drain current I_D can be well modulated by the gate-source voltage V_GS resulting in an I_on/L_off-ratio of 10⁸ (10⁸) at 303K and 10⁵ (10⁶) at 673K. In the subthreshold regime, I_D can be pinched off well below 10 pA with a subthreshold swing of 150 mV/decade (155 mV/decade) at room temperature. The threshold voltage V_T as a function of temperature shows two linear sections with negative temperature coefficients of −6.8 mV·K⁻¹ (−6.8 mV·K⁻¹) from 303 to 423K and −2.5 mV·K⁻¹ (−2.0 mV·K⁻¹) from 423 to 673K. By measuring V_T as a function of bulk-source voltage V_BS at different temperatures, N_A can be directly estimated at a transistor and gives 9.6 × 10¹⁵ cm⁻³ (9.8 × 10¹⁵ cm⁻³). The measured bulk Fermi potential Φ_f of the p-type epitaxial layer deviates less than 10% from the calculated value at a given temperature.     

High-speed sensing techniques for ultrahigh-speed SRAMs

Two high-speed sensing techniques suitable for ultrahigh-speed SRAMs are proposed. These techniques can reduce a 64-kb SRAM access time to 71~89% of that of conventional high-speed bipolar SRAMs. The techniques use a small CMOS memory cell instead of the bipolar memory cell that has often been used in conventional bipolar SRAMs for cache and control memories of mainframe computers. Therefore, the memory cell size can also be reduced to 26~43% of that of conventional cells. A 64-kb SRAM fabricated with one of the sensing techniques using 0.5-μm BiCMOS technology achieved a 1.5-ns access time with a 78-μm² memory cell size. The techniques are especially useful in the development of both ultrahigh-speed and high-density SRAMs, which have been used as cache and control memories of mainframe computers     

20-nm enhancement-mode metamorphic GaAs HEMT with highly doped InGaAs source/drain regions for high-frequency applications

In this article, the DC and RF performance of a SiN passivated 20-nm gate length metamorphic high electron mobility transistor (MHEMT) on GaAs substrate with highly doped InGaAs source/drain (S/D) regions have investigated using the Synopsys TCAD tool. The 20-nm enhancement-mode (E-mode) MHEMT device also features δ-doped sheets on either side of the In_0.53Ga_0.47As/InAs/In_0.53Ga_0.47As channel which exhibits a transconductance of 3100 mS/mm, cut-off frequency (f_T) of 740 GHz and a maximum oscillation frequency (f_max) of 1040 GHz. The threshold voltage of the device is found to be 0.07 V. The room temperature Hall mobilities of the 2-dimensional sheet charge density are measured to be over 12,600 cm²/Vs with a sheet charge density larger than 3.6 × 10¹² cm^?2. These high-performance E-mode MHEMTs are attractive candidates for sub-millimetre wave applications such as high-resolution radars for space research, remote atmospheric sensing, imaging systems and also for low noise wide bandwidth amplifier for future communication systems.     

OLED技术及应用

当OLED显示器件成为主流时,设计工程师也面临着显示技术进步的压力 有机发光二极管（Organic LightEmitting Diode,OLED）器件正逐渐进入主流显示市场,它具有厚度薄、功耗低、能够显示亮度高和色彩鲜艳的图像等优点,并具有对任何物体进行全彩色显示的能力。     

High-efficiency enhancement-mode power heterojunction FET with buried p/sup +/-GaAs gate structure for low-voltage-operated mobile applications

This letter describes a successfully developed enhancement-mode double-doped AlGaAs/InGaAs/AlGaAs heterojunction FET with a buried p/sup +/-n junction gate structure for low-voltage-operated mobile applications. The buried p/sup +/-GaAs gate structure effectively reduced on-resistance (R/sub on/) and suppressed drain-current frequency dispersion for the device with high positive threshold voltage, resulting in high-efficiency characteristics under low-voltage operation. The fabricated p/sup +/-gate HJFET exhibited a low R/sub on/ of 1.4 /spl Omega//spl middot/mm with a threshold voltage of +0.4 V. Negligible frequency dispersion characteristics were obtained through pulsed current-voltage measurements for the device. Under a single 2.7-V operation, a 19.8-mm gate width device exhibited a power added efficiency of 51.9% with 26.8-dBm output power and a -40.1-dBc adjacent channel power ratio using a 1.95-GHz wideband code-division multiple-access signal.     

High-performance 0.1-μm gate enhancement-mode InAlAs/InGaAsHEMT's using two-step recessed gate technology

Novel approach for making high-performance enhancement-mode InAlAs/InGaAs HEMT's (E-HEMT's) is described for the first time. Most important issue for the fabrication of E-HEMT's is the suppression of the parasitic resistance due to side-etching around the gate periphery during gate recess etching. Two-step recessed gate technology is utilized for this purpose. The first step of the gate recess etching removes cap layers wet-chemically down to an InP recess-stopping layer and the second step removes only the recess-stopping layer by Ar plasma etching. The parasitic component for source resistance is successfully reduced to less than 0.35 Ω·mm. Etching selectivities for both steps are sufficient not to degrade uniformity of devices on the wafer. The resulting structure achieves a positive threshold voltage of 49.0 mV with high transconductance. Due to the etching selectivity, the standard deviation of the threshold voltage is as small as 13.3 mV on a 3-in wafer. A cutoff frequency of 208 GHz is obtained for the 0.1-μm gate E-HEMT's. This is therefore one of the promising devices for ultra-high-speed applications     

Wafer bonding technology for silicon-on-lnsulator applications: A review

School of Engineering, Duke University, Durham, North Carolina, 27706. The status of wafer bonding technology especially for silicon-on-insulator (SOI) materials is reviewed. General advantages of wafer bonding as well as specific problems of wafer bonding, such as interface bubble formation, and solutions for these problems are discussed. The specific requirements for SOI materials in terms of SOI layer thickness and the appropriate thinning procedures are dealt with. Interface properties such as bonding strength and electrical properties are also reviewed. Various device results are mentioned.     

A new model for modulation-doped FET's

A new study showing that Lehovec and Zuleeg analysis for silicon FET's can be extended to the GaAs FET's is presented. An analytical model that effectively predicts the characteristics of the MODFET is introduced. The agreement between the model and the experimental data appears to be very good.     

TDM over Ethernet技术及应用

长期以来，电信业务和数据业务在两种不同网络上实现传输。近年，随着用户需求的多样化、网络管理的复杂化以及市场竞争所带来的巨大成本压力，在同一传输平台上融合实时业务和数据业务已成为大势所趋。而IP网络凭借其技术成本优势，将成为未来网络主体架构的首选。目前，在SDH、PDH等传统的时分复用系统（TDM）上提供数据通道，例如传输以太网信号等，已经有了许多成熟的技术。但在以太网上传送实时业务方面，较多的努力都集中在终端方面，产生了各种将语音、图像等信息直接装入以太网（或IP）数据包中的特殊终端设备，例如VoIP技术…     

FeRAM technology for high density applications

Ferroelectric random access memories (FeRAMs) are new types of memories especially suitable for mobile applications due to their unique properties like nonvolatility, small DRAM-like cell size, fast read and write as well as low voltage/low power behavior. Although standard CMOS processes can be used for frontend and backend/metallization processes, FeRAM technology development has to overcome major challenges due to new materials used for capacitor formation. In this paper, advantages and disadvantages of different ferroelectric materials and major development issues for high density applications are discussed. Results of a 0.5 μm ferroelectric process using SrBi₂Ta₂O₉ as ferroelectric layer, Pt as electrode material as well as two-layer tungsten/aluminum metallization are given as an example. Integration and reliability issues are reviewed.     

MEMS technology for optical networking applications

The explosion of the Internet has brought about an acute need for broadband communications, which can only be filled with optical networking. This in turn has resulted in an unprecedented interest in optical micro-electromechanical systems. Since the early days of fiber optics, it has been recognized that micro-optics was a fertile ground for the applications of MEMS. MEMS-based products offer substantial cost and performance advantages for optical networking applications in the area of switching fabrics, variable attenuators, tunable lasers, and other devices. This article provides a review of various types of MEMS technologies for optical networking applications     

Standardizing speech-coding technology for network applications

The different approaches to the standardization of speech coding technology applications are reviewed. The activities of the International Telephone and Telegraph Consultative Committee (CCITT) are highlighted, although other standards setting bodies often follow a similar process. Standardization of speech coding involves the interaction of various experts, who define performance requirements, design speech coding algorithms to meet these requirements, design test plans to evaluate compliance to the requirements, evaluate implementation aspects, select algorithm implementation formats, and develop verification procedures to guarantee compliance to the speech coding specification     

Deploying GPON technology for backhaul applications

Gigabit passive optical network (GPON) technology offers the reach and bandwidth capabilities that make it suitable for more than just residential and business access deployments. Other potential applications include the backhaul of traffic from local exchanges or wireless masts to a central node for switching and routing. Such applications share a common theme in that they could be served by direct fibre as the distances are modest (between 5 and 30 km), their bandwidth requirements are volatile but in total amount to several Gbit/s, and all traffic needs to be transported back to a central core node as opposed to requiring intermediate switching. This paper compares GPON with a number of competing technologies in metropolitan areas, and shows that GPON can rival these approaches both in terms of capability, equipment costs and fibre usage.     

Commercial satellite applications for heterojunctionmicroelectronics technology

Future commercial satellite-based communication systems will be supporting a variety of high data-rate consumer and business applications, including universal telephony access, computer networking, teleimaging, telecommuting, videoconferencing, and high-speed Internet. In response to the anticipated system-performance requirements, heterojunction technology for ultra-low noise amplifiers (LNAs), high-efficiency power amplifiers, and high-speed analog/digital circuits capable of operating at multigigabit per second rates are being developed. An overview of the status and issues related to this development effort is presented     

SOI technology for radio-frequency integrated-circuit applications

This paper presents a silicon-on-insulator (SOI) integration technology, including structures and processes of OFF-gate power nMOSFETs, conventional lightly doped drain (LDD) nMOSFETs, and spiral inductors for radio frequency integrated circuit (RFIC) applications. In order to improve the performance of these integrated devices, body contact under the source (to suppress floating-body effects) and salicide (to reduce series resistance) techniques were developed for transistors; additionally, locally thickened oxide (to suppress substrate coupling) and ultra-thick aluminum up to 6 /spl mu/m (to reduce spiral resistance) were also implemented for spiral inductors on high-resistivity SOI substrate. All these approaches are fully compatible with the conventional CMOS processes, demonstrating devices with excellent performance in this paper: 0.25-/spl mu/m gate-length offset-gate power nMOSFET with breakdown voltage (BV/sub DS/) /spl sim/ 22.0 V, cutoff frequency (f/sub T/)/spl sim/15.2 GHz, and maximal oscillation frequency (f/sub max/)/spl sim/8.7 GHz; 0.25-/spl mu/m gate-length LDD nMOSFET with saturation current (I/sub DS/)/spl sim/390 /spl mu/A//spl mu/m, saturation transconductance (g/sub m/)/spl sim/197 /spl mu/S//spl mu/m, cutoff frequency /spl sim/ 25.6 GHz, and maximal oscillation frequency /spl sim/ 31.4 GHz; 2/5/9/10-nH inductors with maximal quality factors (Q/sub max/) 16.3/13.1/8.95/8.59 and self-resonance frequencies (f/sub sr/) 17.2/17.7/6.5/5.8 GHz, respectively. These devices are potentially feasible for RFIC applications.     

PITIA: an FPGA for throughput-intensive applications

In this paper, we present a novel, high throughput field-programmable gate array (FPGA) architecture, PITIA, which combines the high-performance of application specific integrated circuits (ASICs) and the flexibility afforded by the reconfigurability of FPGAs. The new architecture, which targets datapath circuits, uses the concepts of wave steering and pipelined interconnects. We discuss the FPGA architecture and show results for performance, power consumption, clock network performance, and routability. Results for some commonly used datapath designs are encouraging with throughputs in the neighborhood of 625MHz in 0.25-/spl mu/m 2.5-V CMOS technology. Results for random benchmark circuits are also shown. We characterize designs according to their Rent's exponents and argue that designs with predominantly local interconnects are the best fit in PITIA. We also show that as technology scales down toward deep submicron, PITIA shows an increasing throughput performance.     

Video on phone lines: technology and applications

This paper reviews the telephone loop plant characteristics, current DSL (digital subscriber line) technologies, recent efforts in video coding standards, and the interrelationship between DSL technologies and visual communications over subscriber lines. In overview of the loop plant characteristics we examine its physical makeup and transmission properties, where for the latter we discuss frequency and time responses of wire-pair lines and the impairments of echo, crosstalk, impulse noise, and radio frequency interference. We trace the historical development of various DSL technologies and comment on possible future evolution. Transmission technologies used in the ISDN basic-access DSL, the high bit-rate DSL, and the asymmetric DSL are portrayed. And the issue of spectrum compatibility among different transmission systems is explained. Several important video coding standards are briefly described, including ITU-T's H.261 and ISO's JPEG and MPEG series, which are either completed or emerging. The synergistic relationship between these standards and the DSL technologies is elucidated. As a result, DSL technologies provide the potential of delivering certain broadband services well in advance of direct fiber access for telephone subscribers     

Telepresence technology in medicine: principles and applications

Telepresence systems can improve surgeons' performance in minimally invasive surgery (MIS) and microsurgery and also enable them to operate on patients remotely over great distances. In MIS, telepresence technology allows surgeons to experiment surgery as if their hands and eyes were effectively inside the patient's closed abdomen, enabling them to work with improved skill and dexterity. In microsurgery, the technology can scale down the surgeons' motions, forces, and field of view, allowing them to skillfully operate on microscopic anatomy with relative ease. The systems also enable surgeons to treat patients remotely in inaccessible or hazardous locations with great effectiveness, allowing them to operate as if they were present at the remote site. The means for conveying human presence in such systems is through force-reflecting manipulators with digital servo controllers, stereo viewing systems, and communication links. Depending on the application, the surgeon at the telepresence workstation may be across the room from the patient or across the state, connected by a microwave link or communication network