一种定时脉冲低抖动传输方案设计

针对时统系统中脉冲传输问题,提出了一种定时脉冲低抖动传输方案。介绍了定时脉冲低抖动传输系统的方案设计,对数字内插、锁相环、调制解调方案和相位模糊检测等关键技术进行了阐述,最后给出了定时脉冲低抖动传输系统设计实现方案及性能测试结果分析,利用示波器观察时统系统中脉冲传输抖动控制在4 ns以内,通过实际工程证明了其有效性。     

16QAM symbol timing recovery in the upstream transmission of DOCSIS standard

This paper investigates the performance of the digital symbol timing recovery schemes for 16QAM upstream transmission of the DOCSIS standard. Two forms of nonlinearity are considered: the magnitude square operation and the delay multiplication operation, both of which generate the output signal that contains the symbol timing information. The detailed analysis for the magnitude square timing recovery is given in the digital domain, and consequently the symbol timing estimate can be directly obtained by the discrete Fourier transform. The simulation results show that the magnitude square timing recovery and delay multiplication timing recovery algorithms suffer from the same problem that the estimation error is reduced slowly at high signal-to-noise ratios due to the effect of self-noise. To this end, the third scheme, which is the magnitude square timing recovery with prefilter, is examined. This scheme shows a superior performance and a comparison with the results of the other two schemes is made.     

EACLE : Energy-Aware Clustering Scheme with Transmission Power Control for Sensor Networks

In this paper, we propose a new energy efficient clustering scheme with transmission power control named “EACLE” (Energy-Aware CLustering scheme with transmission power control for sEnsor networks) for wireless sensor networks, which are composed of the following three components; “EACLE clustering” is a distributed clustering method by means of transmission power control, “EACLE routing” builds a tree rooted at a sink node and sets the paths from sensor nodes taking energy saving into consideration, and “EACLE transmission timing control” changes the transmission timing with different levels of transmission power to avoid packet collisions and facilitates packet binding. With an indoor wireless channel model which we obtained from channel measurement campaigns in rooms and corridors and an energy consumption model which we obtained from a measurement of a chipset, we performed computer simulations to investigate the performance of EACLE in a realistic environment. Our simulation results indicate that EACLE outperforms a conventional scheme such as EAD (Energy-Aware Data-centric routing) in terms of communication success rate and energy consumption. Furthermore, we fully discuss the impact of transmission power and timing control on the performance of EACLE.     

Non-Data-Aided Timing Acquisition for Asynchronous IDMA Systems

Sample-timing error can cause significant performance degradation for the interleave-division multiple-access systems (Wang et al. 2009). In this paper, we propose a non-data-aided timing acquisition scheme to mitigate sample-timing error due to the asynchronous transmission of random allocated user ends (UEs) on the uplink. A closed-loop timing control scheme is constructed for the asynchronous IDMA system in this paper. We use the extrinsic information generated during the iterative detection algorithm with signal noise ratio evolution to estimate the timing offset for the asynchronous uplink in the base station (BS) receiver. The BS receiver returns the timing control bits, which is generated with estimated timing offsets, to the corresponding UE. And the UE uses the timing control bits to adjust local transmission time to guarantee the sampling performance at the BS receiver. The simulation results show that the proposed acquisition scheme based on feedback loop can provide high acquisition probability and low false alarm probability. The proposed scheme can overcome the bit-error-rate performance bottleneck, which is caused by the sample-timing error in BS receiver due to the asynchronous signals in the uplink.     

Two Step Timing Synchronization Scheme for OFDM Signal in General Purpose Processor Based Software Defined Radio Receiver

Software defined radio (SDR) is a technology that allows a single terminal to support various kinds of wireless systems by changing its software to reconfigure itself. A general purpose processor (GPP) based SDR receiver platform named Sora has been recently developed by Microsoft. In the GPP based SDR receiver, timing synchronization of an OFDM signal consumes a significant amount of computational resources in the GPP. In this paper, a timing synchronization scheme which uses delayed correlation and matched filtering for the GPP based SDR platform is evaluated. The two stage timing synchronization scheme reduces the computational complexity by limiting the timing range of matched filtering. The proposed scheme reduces the amount of data transmission between the memory and the GPP of the SDR platform. It is shown through an experiment that the proposed scheme reduces the number of cycles for timing synchronization by up to 30 %.     

Baud rate timing recovery scheme for filter bank-based multicarrier transmission

This paper is devoted to the design and the steady-state performance analysis of a data-aided or decision-directed timing recovery scheme for filter bank-based multicarrier transmission with equalization. The symbol synchronizer is obtained from a Mueller and Muller approach extended to multiband transmission. A simple synchronizer is first proposed which can be derived from an approximate likelihood function. Then, possible improvements are discussed. Timing jitter variances are computed and discussed for high bit-rate transmission over copper wires.     

On the synchronization techniques for wireless OFDM systems

The latest research works on the synchronization scheme for either continuous transmission mode or burst packet transmission mode for the wireless OFDM communications are overviewed in this paper. The typical algorithms dealing with the symbol timing synchronization, the carrier frequency synchronization as well as the sampling clock synchronization are briefly introduced and analyzed. Three improved methods for the fine symbol timing synchronization in frequency domain are also proposed, with several key issues on the synchronization for the OFDM systems discussed.     

Asynchronous diversity receiving scheme and analysis on cooperative relay networks简

The transmission antennas of cooperative systems are spatially distributed on multiple nodes, so the received signal can be asynchronous due to propagation delays. A receiving scheme for cooperative relay networks is proposed, multiple asynchronous signals are reconstructed at the receiver by forward and backward interference cancellation, which can obtain gains of cooperative transmission diversity with obvious delay and with no requiring timing synchronization or orthogonal channelization between relays. Analysis and simulation show that the bit error rate（BER） of the proposed scheme is similar to Alamouti code, and the scheme has the diversity order of orthogonal transmission scheme accompanied by minimal BER losses. It is demonstrated that the performance can be further improved by adding an error correcting code（ECC）.     

A digital chip timing recovery loop for band-limiteddirect-sequence spread-spectrum signals

Migration towards a full-digital implementation of modems is currently one of the main trends in transmission systems design. The authors describe a noncoherent all-digital delay lock loop (DDLL) suited for chip timing synchronization in band-limited direct sequence spread spectrum (DS/SS) systems, and they thoroughly analyze its performance. The key features of this novel scheme are represented by its low-complexity processing section together with its good tracking capability. Analytical expressions for the DDLL S-curve and steady-state timing jitter are derived and confirmed by a time-domain computer simulation. Furthermore, the Mean Time to Lose Lock (MTLL) of the loop is evaluated and some numerical results are reported. The proposed chip timing synchronization scheme reveals also an improved tracking performance when compared to the traditional analog DLL for rectangular chip DS/SS signals     

Mathematical modeling and performance analysis for a two-stageacquisition scheme for direct-sequence spread-spectrum CDMA

Acquisition of synchronism is considered for DS/SS CDMA systems. For large systems with large timing uncertainties, it has been shown previously that acquisition in the presence of multiple-access interference may impose a significant limitation on capacity. This leads the authors to consider a system in which timing uncertainties are relatively small and to propose an acquisition scheme which exploits this to reduce complexity and acquisition overhead. The proposal may be appropriate for a microcellular environment for personal communications in which CDMA packet transmission is employed for both voice and data. Packetized transmission would imply that the overhead available for acquisition is small, and the large number of microcells would restrict the cost of the acquisition scheme used in the receiver in each microcell. The acquisition time required for a simple serial search scheme may therefore be unacceptably large. On the other hand, while acquisition using a passive matched filter is fast, the filter length required for reliable acquisition is liable to be excessive in terms of cost and complexity. Motivated by these considerations, the authors propose a two-stage acquisition scheme which employs a short programmable matched filter for initial detection, followed by a correlator for verification. Numerical results based on an approximate analysis of acquisition performance in the presence of multiple access interference are employed to compare the scheme with conventional acquisition schemes     

A filtering approach for reducing timing jitter due to the acousticeffect

We introduce a signal processing approach to compensate for the timing jitter produced by the acoustic effect in soliton communications. The other main sources of timing jitter, the Gordon-Haus effect and the polarization effect, are inherently stochastic. By contrast, the acoustic effect is deterministic and becomes the dominant source of bit error rates in standard soliton systems when the bit rates are more than 10 Gb/s and the transmission distance is more than several thousand kilometers. We exploit the deterministic nature of the acoustic effect to introduce a scheme that predicts the amount of timing jitter as a function of the previous transmitted bits and uses the information to adjust the sampling period of the received soliton pulses. We demonstrate successful application of the scheme by simulations and discuss implementation issues     

Near optimum timing recovery for digitally implemented datareceivers

A timing recovery scheme based on the maximization of the spectrum of the sampled received signal at the frequency of f-=1/2T is proposed. The quadrature amplitude modulated data signals are considered. Algorithms for both initial adjustment of the timing phase and its tracking during transmission of actual data bits are developed. The algorithms are tested by computer simulations for a typical telephone line channel. It is shown that the proposed scheme is quite robust with respect to channel impairments such as noise and phase jitter and also with respect to the correlation to the transmitted data symbols     

Blind adaptive interference suppression for the near-far resistantacquisition and demodulation of direct-sequence CDMA signals

Two key operations required of a receiver in a direct-sequence (DS) code division multiple access (CDMA) system are the timing acquisition of transmissions that are starting up or have lost synchronization, and the demodulation of transmissions that have been acquired. The reliability of both these operations is limited by multiple-access interference, especially for conventional matched filter-based methods, whose performance displays an interference floor and is vulnerable to the near-far problem. Recent work has shown that, provided timing information is available for a given transmission, it can be demodulated reliably using blind or training-sequence-based adaptive interference suppression techniques. These techniques are near-far resistant, unlike the matched filter demodulator, and do not require explicit knowledge of the interference parameters, unlike nonadaptive multiuser detectors. In this paper, we present a blind adaptive interference suppression technique for joint acquisition and demodulation, which has the unique feature that the output of the acquisition process is not simply the timing of the desired transmission, but a near-far resistant demodulator that implicitly accounts for knowledge of the timing and amplitudes of all transmissions to suppress the multiple-access interference. The only knowledge required by the scheme is that of the desired transmission's signature sequence, so that it is amenable to a decentralized implementation. On the other hand, it can be efficiently implemented as a centralized scheme in which the bulk of the computations for the adaptation are common to all transmissions that need to be acquired or demodulated     

A 312-MHz 16-Mb random-cycle embedded DRAM macro with a power-down data retention mode for mobile applications

An embedded DRAM macro with a self-adjustable timing control (STC) scheme, a negative edge transmission scheme (NET), and a power-down data retention (PDDR) mode is developed. A 13.98-mm/sup 2/ 16-Mb embedded DRAM macro is fabricated in 0.13 /spl mu/m logic-based embedded DRAM process. Co-salicide word lines and MIM capacitors are used for high-speed array operation. The delay timing variation of 36 % for an RC delay can be reduced to 3.8% by using the STC scheme. The NET scheme transfers array control signals to local array blocks with high accuracy. Thereby, the test chip achieves 1.2-V 312-MHz random cycle operation even in the low-power process. 73-/spl mu/W data retention power is realized by using the PDDR mode, which is 5% of conventional schemes.     

具有滑频滤波器的光孤子通信系统时间抖动的研究

本文通过微扰理论，对采用滑频滤波器控制的孤子系统的时间抖动进行了研究。结果表明，滑频滤波器的引入，导致幅度和频率、幅度和滑频滤波器三阶项间的耦合，使得孤子传输系统的时间抖动增大，影响系统的传输极限。研究了滑频滤波器三阶项对滑频速率的影响，讨论和比较了具有滑频滤波器、固定频率滤波器和不加任何控制时的系统对由放大器的ＡＳＥ噪声产生的时间抖动的抑制结果。采用滑频滤波器是一种较好地抑制时间抖动的方法。     

Maximum Likelihood (ML) Symbol Timing Recovery (STR) Techniques for Reconfigurable PAM and QAM Modems

A fast symbol timing recovery (STR) scheme suitable for flexible-symbol-rate, burst-mode M-ary QAM (M-QAM) and PAM (M-PAM) demodulators used in broadband communications is proposed. The maximum- likelihood (ML) estimation is used to derive a feed-forward STR strategy to achieve fast and accurate derivation of the optimum timing instant with a very short training preamble for applications requiring short packet transmission. In addition, the signal sample at the optimum timing instant is reproduced by interpolation. Analysis to derive the ML-based timing estimation algorithm and STR structure is presented. Analytical models are developed to evaluate the effects of imperfect interpolation and channel additive white Gaussian noise (AWGN) on the timing estimation performance. The derived expressions can be used for optimum interpolation filter design and selection of key parameters to achieve the required mean squared timing error. Simulation results are in good agreement with the analytical prediction.     

Timing recovery for OFDM transmission

Orthogonal frequency division multiplexing (OFDM) is an effective modulation technique for high-rate and high-speed transmission over frequency selective fading channels. However, OFDM systems can be extremely sensitive and vulnerable to synchronization errors. In this paper, we present a scheme for performing timing recovery that includes symbol synchronization and sampling clock synchronization in OFDM systems. The scheme is based on pilot subcarriers. In the scheme, we use a path time delay estimation method to improve the accuracy of the correlation-based symbol synchronization methods, and use a delay-locked loop (DLL) to do the sampling clock synchronization. It is shown that by using this scheme, the mean square values of the symbol timing estimation error can be decreased by several orders of magnitude compared to the common correlation methods in both the AWGN and multipath fading channels. In addition, the scheme can track the symbol timing drift caused by the sampling clock frequency offsets     

高速突发解调器的快速同步技术研究

突发通信中需重点考虑同步时间,提出了一种突发解调器方案,具有同步时间快、传输速率高的优点。重点介绍了符号定时和载波相位恢复,分析了定时估计算法和内插定时恢复中的关键点;分析了载波相位估计算法并结合工程实现提出了简化算法,分析了剩余载波频偏和相位估计时间的关系。Matlab定点仿真结果表明了该方案的可行性和有效性,最后根据提出的方案实现了90Mbps QPSK突发调制解调器。     

A robust asynchronous multiuser STBC-OFDM transmission scheme for frequency-selective channels

In this paper, we propose a robust STBC transmission scheme to combat timing synchronization errors over frequency-selective multiple-access channels. We start by deriving the equivalent channel model in the presence of timing synchronization errors. Based on this correlated equivalent channel model, the statistical channel power gain profile is analyzed and shown to exhibit unequal channel power gains on different subcarriers. Furthermore, a robust statistical bit loading algorithm is proposed to optimize the BER performance in scenarios where link adaptation based on instantaneous channel information is infeasible or undesirable. Simulation results show that our proposed scheme is robust to timing synchronization errors, providing around 7.5dB SNR advantage at the BER of 10_-4 over the conventional scheme in various channel environments.     

用并行内插算法恢复宽带信号的定时信息

提出了一种卫星高速数传的定时恢复方法,以解决实现复杂、硬件依赖性强的问题.以固定采样钟为基础,利用误差信号对多路数据排序筛选,并行内插实现定时信息的恢复,支持GHz宽带变速率信号的同步.硬件仿真结果表明,该方法的解调损失不超过1 dB.采用该方法的高速接收机可工作在统一平台上,使卫星测控通信地面资源配置更加灵活.