Formulation of equations in terms of scalar functions for lumped non-linear networks

A general method is presented of formulating the Lagrangian and anti-Lagrangian equations for networks consisting of non-linear RLCM (M = memristor) multiports with hybrid representation. The formulation is obtained with no restriction on the network topology. An explicit procedure is given to construct the scalar functions needed. This procedure is based on the concept of L and H functions introduced. The Brayton-Moser equations in a generalized form can be directly obtained from the anti-Lagrangian equations. From these equations, new equations of Brayton-Moser type can also be derived. The invariance property of Lagrangian and anti-Lagrangian equations under a transformation of variables is also discussed.     

State‐space equations of regular and strictly topologically degenerate linear lumped time‐invariant networks: the multiport method

A new complete approach to the multiport formulation of the state‐space equations of uniquely solvable regular or strictly topologically degenerate linear lumped time‐invariant networks is presented. It is based on a Gedankenexperiment during which the topological structure of the original network is manipulated in various ways. The final method requires one to calculate the describing matrices of three homogeneous multiports (i.e. a capacitive, an inductive and a resistive one), which are obtained from the network of interest in a very simple manner. As a by‐product, the equivalent partitioned network is also derived. As an example of application, the state‐space equations of a fourth‐order strictly topologically degenerate network are provided. Copyright © 2001 John Wiley & Sons. Ltd.     

A theory of Q-reciprocal and quasi-reciprocal multiports

Two notions: quasi-reciprocity and Q-reciprocity as generalizations of classical reciprocity are introduced and examined for the multiport case. A number of theorems and properties characterizing a class of Q-reciprocal multiports are stated. A way of extending to quasi-reciprocal networks some results proved under the assumption of reciprocity is presented as an example of application.     

Dissipativity as a unified approach to sandberg-willson-type properties of non-linear transistor networks

A class of circuits is considered consisting of semiconductor devices (non-linearly modelled bipolar transistors and junction diodes), non-linear capacitors and inductors, all connected to a non-linear resistive multiport. This multiport is described by a global piecewise continuously differentiable operator, while the other non-linearities are of piecewise linear type. Sufficient conditions for the existence, uniqueness, stability, boundedness and source-related continuity of the solutions are derived for both direct current and dynamic regimes. All these results are obtained by using the dissipativity property exhibited by the functions appearing in the circuit equations and are extensions of well known results of Sandberg and Willson.     

Energy-related concepts for non-linear time-varying n-ports: Passivity and losslessness

Definitions of passivity and losslessness are presented that apply to n-port networks which are not necessarily linear, time-invariant, or lumped; in fact, these definitions apply to any n-port that has an abstract dynamical system representation. For lumped, non-linear n-port networks that can be mathematically represented by a finite-order dynamical system, conditions for passivity and losslessness are formulated in terms of properties of the state equation function, the output function, etc. These conditions can be verified without solving the state equation, and can be viewed as non-linear generalizations of the well-known time-domain and frequency-domain passivity and losslessness conditions for linear time-invariant lumped n-port networks.     

Determination of volterra transfer functions of non-linear multiport networks

A method is presented to determine frequency domain Volterra transfer functions of non-linear multiport networks containing non-linear multiport subsystems (elements). the method is based on an extension of the probing method to allow arbitrary (also commensurate) frequencies. A recursively based algorithm for the determination of Volterra transfer functions of non-linear multiport networks is derived. A computer implementation of the method in a symbolic programming language is presented. This makes it possible to determine algebraic expressions of the Volterra transfer functions. Three examples are considered.     

Harmonic balance method applied to the numerical electrical physical modelling of two-terminal,non-linear microwave circuits in the frequency domain

A numerical frequence-domain modelling of two-terminal, non-linear microwave circuits is presented. It basically relies on a process allowing the solution of the frequency-domain curcuit harmonic balance equations while accounting for the semiconductor device by means of an accurate numerical macroscopic physical model. In its present state of development, the model allows the study of a single two-terminal device circuit operating in harmonic mode. Its capabilites are illustrated by means of the results of a study devoted to the optimization of the load curcuit configuration of a millimetre-wave avalanche diode frequency multiplier. The influence of the output load impedance level on the circuit output RF performance has been investigated for different input power levels in direct frequency multiplication mode and in the presence of additional circuit tunings at low harmonic rank idler frequencies.     

A transformation method for the solution of power switching circuits based on network topological concepts

In this paper, a general and systematic method for the analysis of varying topology power semiconductor circuits is presented. the changes of the conduction state of the semiconductor switching devices are handled by successive modifications of the tree of the circuit graph. These tree modifications are systematically reflected on a square transformation tensor. On the basis of well known network topological concepts, this generalized transformation tensor can be constructed in a relatively simple way. This tensor constitutes a flexible and powerful tool to assemble automatically the necessary on-switch current and off-switch voltage equations required for any conduction pattern. These manipulations are accomplished with a step-by-step modification procedure of the equations describing the circuit in the most previous conduction state. the basic steps of an algorithm suitable for the practical implementation of the analysis of any power switching network on a digital computer are described, and an example is used to demonstrate the effectiveness of the proposed method.     

The averaging perturbation method for the dominant behaviour analysis of adiabatic single-controlled oscillators

Electrical oscillators are called single-controlled when their non-linear elements depend on a unique variable, while they are termed adiabatic when their transient operation signal can be represented as a narrowband-modulated Fourier series with only a finite number of dominant components, including the DC one. the novel method presented here allows one to analyse the dominant dynamics, steady state and dynamical stability of such oscillators. the approach devised is perturbative and is termed averaging, since it moves from the differential equation in the oscillator signal to provide a set of simultaneous differential equations in the complex envelopes of the dominant components of that variable. Owing to the treatment generality, investigable circuit topologies comprise a linear lumped time-invariant network of any order with bias sources, and any number of non-linear elements, with or without memory, with a common control variable. to illustrate the use of the method, formulae concerning a seventh-order oscillator are derived.     

Non-linear optimization with constraints: A cook-book approach

Based on the stationary co-content theorem in non-linear circuit theory and the penalty function approach in non-linear programming theory, a canonical circuit for simulating general non-linear programming problems with equality and/or inequality constraints has been developed. the task of solving a non-linear optimization problem with constraints reduces to that of finding the solution of the associated canonical circuit using a circuit simulation program, such as SPICE. A catalogue of canonical circuits is given for each class of non-linear programming problem. Using this catalogue, an engineer can solve non-linear optimization problems by a cook-book approach without learning any theory on non-linear programming. Several examples are given which demonstrate how SPICE can be used, without modification, for solving linear programming problems, quadratic programming problems, and polynomial programming problems.     

Handling three-winding transformers and loads in short circuit analysis by the admittance summation method

The admittance summation method is efficient in short circuit analysis of radial and weakly meshed networks. It is especially powerful if all node loads can be represented as any combination of constant impedance and constant current load component. However, in the existing literature one cannot find any explanation how to handle power transformer in that approach. For that reason, the corresponding equations have been developed in this paper along with a procedure for development of a three-winding transformer admittance matrix. In addition, a procedure for handling an arbitrary load was proposed. A large number of tests were performed and results were compared with that obtained by the previously published method. As an illustration, some of the results for single fault currents are presented. It can be concluded that the proposed approach makes the admittance summation method capable to take into account all network elements in a proper way.     

Design of generalized class E2 dc/dc converter

This paper presents a novel design procedure for class E² dc/dc converter. The design procedure requires only circuit equations and design specifications. When the circuit equations are got, the other procedures for the computation of the design values are carried out with aid of computer. Therefore, we can design class E² dc/dc converters with any conditions by using the proposed design procedure. Moreover, we give the design and the performance curves of class E² dc/dc converter and discuss about them. By carrying out the circuit experiments, we show the validity of the proposed design procedure. Copyright © 2003 John Wiley & Sons, Ltd.     

A discrete-time approach to the steady state analysis and optimization of non-linear autonomous circuits

In this paper a method for the steady state analysis and optimization of non-linear autonomous circuits is described. After discretizing the linear part of the circuit, a system of non-linear algebraic equations is obtained. the final formulation is written entirely in the discrete-time domain, making it unnecessary to repeatedly take direct and inverse DFTs during the solution process. Furthermore, it is shown that the resulting formulation may be viewed as a generalization of the harmonic balance equations. an analytic method for computing the exact partial derivatives of the resulting equations with respect to the samples of the variables, the oscillation period and the circuit element values is described, making the proposed approach efficient for both analysis and optimization. Different globally convergent techniques for solving the non-linear system of equations are described, with emphasis on an algorithm based on fast simulated diffusion. Selected application examples are provided to validate the proposed approach.     

Analysis of noise in cascaded non-linear stages

This paper presents a method to analyse noise in cascaded non-linear stages based on Volterra series for multiport systems. the cascaded stages are partitioned such that internal noise sources from different stages are uncorrelated and linear loading between all stages can be assumed. This partitioning scheme implies that the ensemble average of the magnitude-squared output response from the last stage in the cascade can be determined as a sum of noise contributions from the individual stages. the method allows both unmodulated (independent) and modulated (dependent) noise sources. A special case of the theory and two related examples are presented to illustrate the method.     

A new general method to model signal timing of E/D NMOS logic

A new general modelling method for E/D NMOS logic is proposed and applied to the case of inverters. In this model, non-linear device currents in the large-signal equivalent circuit are reformulated by the curve-fitting technique. Then output voltage wave-forms are analytically solved region by region from the equivalent circuit. From the derived formulae, the rise/fall time and delay time can be calculated. Wide-range comparisons with SPICE simulation results were performed to verify the accuracy and the general applicability of the developed model. Two examples are given to demonstrate the applications of the developed timing model to timing analysis. It is shown that the model has a good accuracy for E/D inverters with a wide range of beta ratios, gate sizes, capacitive loads, input voltage wave-forms and device parameters. Moreover, the required CPU time and memory are small. These make the proposed modelling method an interesting approach to model E/D NMOS gates for CAD applications.     

Multiport VNA measurement

This article presents some of the most recent multiport VNA measurement methodologies used to characterize these high-speed digital networks for signal integrity. There will be a discussion of the trends and measurement challenges of high-speed digital systems, followed by a presentation of the multiport VNA measurement system details, calibration, and measurement techniques, as well as some examples of interconnect device measurements. The intent here is to present some general concepts and trends for multiport VNA measurements as applied to computer system board-level interconnect structures, and not to promote any particular brand or product.