An integrated-circuit comparator macromodel

A macromodel for integrated-circuit comparators, suitable for use with typical present-day (1976) circuit simulators, is presented. The macromodel can provide up to an order of magnitude reduction in CPU time and matrix size for CAD. Good agreement (typically within 10 percent) between experimental and macromodel transient response parameters is obtained. A detailed macromodel design procedure is presented that enables the macromodel parameters to be found from typical data-sheet or easily-measured parameters.     

单片集成锁相环的实用宏模型

本文提出了一个能在ＳＰＩＣ通用电路分析程序上运行的单片集成锁相环ＬＭ５６５的宏模型。宏模型引出脚与实陆器件一一对应，较好地模拟了ＬＭ５６５各个引起的输出波形及外部元件对其性能的控制，使之能实际应用到由ＬＭ５６５构成的各种电路计算机辅助分析中。     

Simple and accurate nonlinear macromodel for operational amplifiers

A simpler macromodel than that proposed by G. Boyle et al. (1974) is presented. This macromodel does, however, include a large number of operational amplifier characteristics. Advantages of this macromodel include: it is simpler, it is always feasible to calculate parameters, it can be more suitable for AC analysis, and it is quicker to simulate. For the given circuits, the DC analysis with this macromodel was about four times shorter than with the Weil-McNamee (1978) and about two and a half times shorter than with the macromodel of Boyle et al. The duration of transient analysis was up to seven times shorter with the new macromodel than with the Weil-McNamee model, and up to 50% shorter than with the Boyle et al. macromodel     

模拟集成电路宏模型计算机辅助自动建立

本文提出一种新的模拟集成电路宏模型计算机辅助自动建立方法,通用性强、宏模型精度高。文中详细描述了建立过程,给出相应的软件流程,并对建立过程中的一些关键算法进行了探讨和创新。最后给出利用新方法建立二级运放宏模型的实例。     

A physical-based noise macromodel for fast simulation of switching noise generation

Efficient prediction of the substrate noise generated by large digital sections is currently a major challenge in System-on-a-Chip design. A macromodel to accurately and efficiently predict the substrate noise generated by digital standard cells is presented. The macromodel is generated from identification of the physical elements relevant to noise generation. Techniques to directly or indirectly compute the values of the elements in the cell macromodel are proposed. Using this macromodel, prediction of the noise generated by large digital sections can be easily done following a methodology based on high-level logic simulation. As a first step to validation, the macromodel accuracy is demonstrated in some circuits consisting of a reduced number of gates.     

Modeling integrated injection logic (I/SUP 2/L) performance and operational limits

A new user-oriented I/SUP 2/L macromodel is presented which models I/SUP 2/L performance and predicts operational limits. The macromodel includes n-p-n current gain falloff and injector transport efficiency falloff at both low and high operating currents. Lateral current transfer between adjacent gates may be included in the macromodel. A straightforward parameter measurement scheme is given which requires only simple test gates. The macromodel is easily implemented in commonly available circuit simulators such as SPICE. The modeling of I/SUP 2/L dynamic behavior is demonstrated with computer simulations of a five-stage ring oscillator and `D' flip-flop, where typically 15 percent or better agreement with measured data has been achieved. It is also shown that operational limits of I/SUP 2/L circuits can be accurately predicted. Computer simulation of I/SUP 2/L performance as a function of temperature is discussed. The macromodel is well suited for worst case analysis of I/SUP 2/L, and the close correspondence of the macromodel's parameters to gate geometry makes it possible to use the macromodel to approximately simulate performance changes with layout and geometry variations.     

深亚微米CMOS混合信号电路衬底噪声耦合宏模型

提出了一种基于二维器件模拟的深亚微米工艺外延型衬底的电阻宏模型.该宏模型通过器件模拟与非线性拟合相结合的方法建立,使衬底寄生参数的提取更加方便,同时保障了深亚微米电路特性的模拟精度.此外,该宏模型结构简单,可以得到与器件模拟基本一致的模拟结果,并可以方便地嵌入SPICE中进行一定规模的电路模拟.     

模拟乘法器的宏模型

本文提出了一个由构造法建立的模拟乘法器的宏模型,该模型可以模拟乘法器的动态特性、静态特性与非线性特性的十几种特性参数,并且电路简单,是一个比较全面而实用的模型。     

用修正特征法模型求解高速VLSI中有耗互连线的瞬态响应

本文提出了用于高速集成电路系统中有耗互连线瞬态响应求解的一个计算模型及其相应的算法。传统的特征法在用于求解无耗传输线或满足ＬＧ＝ＲＣ的有耗传输线时具有简单的递归形式和较高的计算效率,但不能用于一般的有耗传输线。本文在特征法的基础上,通过适当的参数修正,建立了一般有耗传输线瞬态响应的近似特征模型,导出了其对时间变量递归形式的计算公式。     

An integrated injection logic (I/SUP 2/L) macromodel including lateral and current redistribution effects

An integrated logic (I/SUP 2/L) macromodel for computer simulation of logical configurations of I/SUP 2/L gates is presented. The macromodel is synthesized from the familiar Ebers-Moll equivalent circuit which permits compatibility with numerous presently available circuit simulators. Measurement procedures are described for the complete and self-consistent set of electrical parameters required for macromodel definition. A five-stage ring oscillator is computer simulated to demonstrate the application of the macromodel. Lateral current transfer (LCT) between adjacent gates and injector current redistribution (ICR) effects are shown to reduce gate propagation delay times. When both effects are included, the macromodel produces an agreement between computer simulated and experimental results of better than 10 percent. A ring oscillator example illustrates the use of the macromodel to provide physical insight into the layout sensitivity of I/SUP 2/L.     

考虑微磁芯磁阻的分布参数微梁执行器小信号宏模型

以多级弯曲磁微梁执行器为研究对象，先采用梁的模态函数线性组合来逼近梁的变形曲线，然后利用磁路定律，考虑了在宏观磁执行器中忽略的磁芯磁阻，建立了考虑力-磁耦合的非线性方程组，克服了以往的磁微执行器模型不能考虑力磁耦合，而且忽略磁芯磁阻的缺点．计算结果与实验数据及有限元计算结果对比表明，文中的模型有足够的精度，可以作为宏模型使用．     

Precise macromodel applied to high-voltage power MOSFET

A macromodel for precise simulations of high-voltage power MOSFET is presented. The macromodel takes into account basic features of these devices as higher value of the resistance between channel and drain and lower current level though the body diode compared to low-voltage power MOSFET. It also considers that high-voltage power MOSFET work mostly in saturation regime. All required parameters are extracted from direct electrical measurements. Simulations using this and previous macromodels are compared with experimental DC and AC characteristics to demonstrate a much better correspondence with experiment of the macromodel presented.     

A new nonlinear time-domain op-amp macromodel using thresholdfunctions and digitally controlled network elements

A general-purpose nonlinear macromodel for the time-domain simulation of integrated circuit operational amplifiers (op amps), either bipolar or MOS, is presented. Three main differences exist between the macromodel and those previously reported in the literature for the time domain. First, all the op-amp nonlinearities are simulated using threshold elements and digital components, thus making them well suited for a mixed electrical/logical simulator. Secondly, the macromodel exhibits a superior performance in those cases where the op amp is driven by a large signal. Finally, the macromodel is advantageous in terms of CPU time. Several examples are included illustrating all of these advantages. The main application of this macromodel is for the accurate simulation of the analog part of a combined analog/digital integrated circuit     

Precise spice macromodel applied to high-voltage power MOSFET

A macromodel for precise spice simulations of high-voltage power MOSFET is presented. The macromodel takes into account basic features of these devices as higher value of the resistance between channel and drain and lower current level though the body diode compared to low-voltage power MOSFET. It also considers that high-voltage power MOSFET work mostly in saturation regime. All required parameters are extracted from direct electrical measurements. Simulations using this and previous macromodels are compared with experimental DC and AC characteristics to demonstrate a much better correspondence with experiment of the macromodel presented.     

多级弯曲磁微梁执行器力-磁耦合宏模型

本文以多级弯曲磁微梁执行器为研究对象,先采用梁的模态函数线性组合来逼近梁的变形曲线,再将求模态磁场力的积分项分段求积,最后利用磁路定律,建立了考虑力磁耦合的非线性方程组,克服了以往的模型不能考虑力磁耦合的缺点.方程组的复杂程度(阶数)与所取的模态阶数相关.计算结果同实验数据对比表明,模型有足够的精度,可以作为宏模型使用.     

Stability of the FDTD scheme containing macromodels

Stability analysis of the finite difference time domain scheme containing macromodels is presented. It is shown that for a stable macromodel, the stability of the combined scheme depends on the field interpolation at the macromodel boundary. The maximal allowable time step is shown to be much larger than for subgridding.     

Simplified Macromodel of MTLs With Incident Fields (SiMMIF)

Electromagnetic compatibility (EMC) analysis of high-speed designs has become imperative due to rapidly increasing radio-frequency interference and emerging technological trends such as higher operating frequencies, denser layouts, and multifunction convergent products. In this paper, a simplified macromodel of multiconductor transmission lines (MTLs) exposed to incident fields is presented. The proposed formulation can also handle frequency dependence of resistance, capacitance, conductance, and inductance (RLGC) line parameters. The method employs the recently developed delay-extraction-based compact and passive MTL macromodel, while developing closed-form expressions for incident field analysis. An error bound for the proposed macromodel is also presented. The macromodel is simulation program with integrated circuit emphasis (SPICE) compatible and overcomes the mixed frequency/time simulation difficulties usually encountered during transient analysis, while guaranteeing the stability of the global transient simulation. The algorithm provides higher accuracy as well as significant speed gains for EMC analysis of transmission line networks as compared to the existing techniques.     

三端可调稳压器的PSpice宏模型

本文介绍了一种简单实用的用于ＰＳｐｉｃｅ程序的ＬＭ１３７ＨＶ宏模型，该模型较好地模拟了其直流工作特性、温度特性、瞬态特性、纹波抑制比以及某些极限参数。以此模型为基础进行扩展，建立了一系列三端可调稳压器的宏模型库。     

Macromodeling of integrated circuit operational amplifiers

A macromodel has been developed for integrated circuit (IC) op amps which provides an excellent pin-for-pin representation. The model elements are those which are common to most circuit simulators. The macromodel is a factor of more than six times less complex than the original circuit, and provides simulated circuit responses that have run times which are an order of magnitude faster and less costly in comparison to modeling the op amp at the electronic device level. Expressions for the values of the elements of the macromodel are developed starting from values of typical response characteristics of the op amp. Examples are given for three representative op amps. In addition, the performance of the macromodel in linear and nonlinear systems is presented. For comparison, the simulated circuit performance when modeling at the device level is also demonstrated.     

A macromodel for integrated all-MOS operational amplifiers

A macromodel for integrated all-MOS operational amplifiers is developed with reference to circuits where the settling behavior of the op amps is of particular concern. Expressions for the values of the elements of the macromodel are obtained from typical measured characteristics. It is shown that the proposed macromodel can satisfactorily predict both small-signal and large-signal behavior of the op amps.