软件定义仪器

为了加速新型仪器研发,提出了"软件定义仪器"的方法并讨论了其体系和可行性.     

基于C8051F系列单片机提高ADC分辨率的方法

单片机的很多应用都需要使用模／数转换器（ADC）进行测量。本文着重介绍C8051F系列单片机的AD转换子系统以及提高AD转换分辨率的方法,内容包括根据要增加的分辨率计算过采样率、根据要增加的SNR增加过采样率。并举实例介绍过采样和求均值的实现方法。     

采用过采样提高C8051F020片内ADC分辨率的研究

模数转换的分辨率与器件的数字位数有关,位数越多分辨率越高,分辨率越高器件的成本也越高。C8051F020的片内ADC是12位的,为了既降低系统成本又获得较高的分辨率,介绍了过采样和求均值方法的实现原理。该方法有效提高转换的分辨率和信噪比,但增加CPU处理时间并降低了数据吞吐率。     

新的16bit高速ADC推动通信仪器应用

当通信仪器系统用于测试和确认通信产品时，它们的噪声性能指标必须优于待测的所有器件。捕获和分析这些动态通信信号要求ADC具有至高的精密度以及极佳的信噪比（SNR）和无杂散动态范围（SFDR）。     

基于过采样技术提高ADC分辨率探析

近年来,许多系统都需要使用模／数转换器ADC进行测量,将模拟信号转换为数字信号。为了简化系统电路和降低生产成本,在充分利用ADC采样速度的条件下,通过过采样技术提高ADC的分辨率。这里基于ADC的基本结构,采用叠加成形函数的方法,介绍了用过采样的方法来达到较高分辨率和信噪比,得出采样技术可以在不使用昂贵的ADC芯片的情况下提高模／数转换的分辨率。     

选择ADC的两个重要因素;变换率和分辨率

选择最高采样率的ADC(模/数转换器)并非好主意,因为这样会牺牲很多的数据分辨率。在选择ADC时,采样率和分辨率是两个重要的技术指标。你可能重视采样率,误认为对大量的额外数据求平均值便可弥补分辨率的损失,这当然不是一个有效的办法。实际上,既不要使用采样率太慢的ADC,也不必使用太快的ADC。     

工业监控和便携式仪器的6通道SAR型ADC设计要点426

14位LTC2351-14是一款1．5Msps、低功率SAR型ADC，具有6个同时采样差分输入通道。它采用单3V工作电源，并具有6个独立的采样及保持放大器（S／HA）和一个ADC。这款具多个S／HA的单ADC实现了卓越的通道间范围匹配（1mV）和通道至通道时滞（200ps）。     

软件无线电中数字化技术的研究

主要介绍了软件无线电技术的特点及结构，详细分析了其关键技术之一数字化技术的核心器件ADC的工作原理，最后简要介绍了ADC的几个重要性能指标，并对软件无线电A／D转换的噪声和失真性能进行了讨论．     

软件无线电直接射频采样的高速ADC系统研究

针对混合滤波器组ADC系统因其ADC模拟输入带宽低而不能对频率较高的射频模拟信号直接进行模／数转换的瓶颈，本文提出了一种基于Nyquist采样定理和带通采样定理的抽取器数学模型，对该数学模型进行时域、频域的分析证明后，设计了一种基于该数学模型的SHA抽取器，进而在混合滤波器组ADC系统的基础上，提出了高速混合波波器组ADC系统。它能将带宽为(2MHz—2000MHz)的射频模拟信号直接模／数转换，且分辨率达到12比特以上，完全可以满足软件无线电直接射频采样的要求。     

理解ADC的噪声、ENOB及有效分辨率

ADC的一个重要趋势是转向更高的分辨率。这一趋势影响着一系列的应用,包括工厂自动化、温度检测,以及数据采集。     

软件无线电跳频电台接收机射频前端设计

基于软件无线电的基本要求和发展趋势,提出了一种应用在软件无线电跳频电台中接收机射频前端电路结构,分析了接收机射频前端的总体设计方案,包括前端各部分增益的分配、动态范围的分配、噪声系数及灵敏度的计算,讨论了对器件选择的考虑.实际测试结果表明,该射频前端性能指标满足设计要求.     

Advances in software defined radio

Progress in software defined radio has been rapid, since the term was first coined in the mid 1990s. In this brief overview we summarise some of the recent advances in software defined radio from a range of technology perspectives — radio frequency design, baseband reconfigurability, reconfigurable applications and protocols and regulatory (and related network) aspects. Our frame of reference for this article is commercial mobile telecommunications, although many of the technology advances are of relevance and application in other arenas, such as defence, satellite communications and broadcasting. Software defined radio has come a long way very quickly, but in reality is still in its infancy — the next decade will see substantially further advances. This paper draws heavily upon two books on this subject recently edited by the author — the contributors to those books are listed at the end of this article and the work of these pioneers of software radio is fully and most gratefully acknowledged. Additional detail on issues covered in this article may be found in specific chapters of these books, referenced as [Name] within the text.     

企业级组态式Web前端设计方法研究与应用

近年来,MVC(Model-View-Controller)模型已成为Web前端研究领域的热点之一.本文以MVC模型为基础,数据存储(Store)为数据容器,构建了MVCS (Model-View-Controller-Store)模型,并以学生成绩管理系统为例,说明使用该模型完成企业级组态式Web前端设计的方法和实现步骤,展示了前端实时数据的图表和图形.最后,探讨了未来的研究趋势.     

ADC在软件无线电中的应用前景

软件无线电对ADC的应用提出了很多技术挑战。本文首先对A／D转换器进行了概述,分析了其性能,然后重点讨论了软件无线电ADC面临的主要问题和解决方法,给出了在软件无线电中有较好应用前景的A／D转换器。     

Scalability of software defined network

With the development of software-defined networking (SDN),its scalability has become one of the most important issues of SDN.The features of SDN was studied which lead to its scalability problem when SDN was applied to large-scale network.The three main causes leading to scalability problem were discussed:control plane and data plane separation,logical centralized control and fine-grained flow control.Meanwhile,the studies which focus on the scalability of SDN from three aspects:scalability of performance,scalability of geographic and scalability of control was presented.Further,the studies on the performance evaluation of the scalability of SDN were introduced.Finally,the future work was discussed.     

Calculation of ADC resolution for DMT modulation

The analytical derivation of the required precision for the analogue-to-digital converter in discrete multitone transceivers is presented. The obtained closed-form expression, that includes all relevant system parameters, directly relates the required ADC resolution with the maximum allowed number of bits allocated to the DMT subchannels     

Tracing IP-spoofed packets in software defined network

IP packets back tracing is to find the source host hop by hop from the destination.The method found the forwarding path of target packets and source host by adding probe entry into flow tables on SDN switches and analyzing the effective back tracing Packet-in messages sent by related switches.The proposed scheme can provide convenience for debugging network problems ,so that the network administrator can obtain the forwarding paths of any data packets.Furthermore,it can help to solve the problem of IP spoofing.Experimental results prove that the traceability method can find the forwarding paths of target packets in a timely and accurate manner without affecting other traffic or significant system overhead.     

应用于碲锌镉探测器逐次逼近模数转换器基准电压的研究

An on-chip reference voltage has been designed in capacitor-resister hybrid SAR ADC for CZT detector with the TSMC 0.35 μ m 2P4M CMOS process. The voltage reference has a dynamic load since using variable capacitors and resistances, which need a large driving ability to deal with the current related to the time and sampling rate. Most of the previous articles about the reference for ADC present only the bandgap part for a low temperature coefficient and high PSRR. However, it is not enough and overall, it needs to consider the output driving ability. The proposed voltage reference is realized by the band-gap reference, voltage generator and output buffer. Apart from a low temperature coefficient and high PSRR, it has the features of a large driving ability and low power consumption. What is more, for CZT detectors application in space, a radiation-hardened design has been considered. The measurement results show that the output reference voltage of the buffer is 4.096 V. When the temperature varied from 0 to 80℃, the temperature coefficient is 12.2 ppm/℃. The PSRR was-70 dB@100 kHz. The drive current of the reference can reach up to 10 mA. The area of the voltage reference in the SAR ADC chip is only 449×614 μm². The total power consumption is only 1.092 mW.     

数字冗余码; 数字更正; 数字校对;

随着流水线ADC精度的不断提高，由运放和采样电容，比较器等引入的各种非线性误差将严重影响流水线ADC的性能。针对各种非线性误差基于校对数字技术的基本思想以及相应的算法。对近几年数字校对技术在流水线ADC中的应用和发展作了总结。最后对数字校对技术的发展趋势进行了分析，并对这一领域进行了展望。     

一款结合数字校正技术的流水线ADC设计

基于65 nm CMOS工艺、1.2 V供电电压,设计了一款结合偏移双通道技术的流水线模数转换器(analog-to-digital convertor,ADC)。芯片的测试结果表明,该校正方法有效地消除和补偿了电容失配、级间增益误差和放大器谐波失真对流水线ADC综合性能的制约。流水线ADC在125 MS/s采样率、3 MHz正弦波输入信号的情况下,信噪失真比(signal-and-noise distortionratio,SNDR)从校正前的28 dB提高到61 dB,无杂散动态范围(spurious-free dynamic range,SFDR)从校正前的37 dB提高到62 dB。ADC芯片的功耗为72 mW,面积为1.56 mm2。偏移双通道数字校正技术在计算机软件上实现,数字电路在65 nm CMOS工艺、125 MHz时钟下估计得出的功耗为12 mW,面积为0.21 mm2。