垂直腔面发射激光器的TO封装工艺操作误差分析

采用FRESNEL光学软件和MATLAB编程,详细分析了垂直腔面发射激光器的TO封装工艺操作误差对耦合效率的影响.发现在芯片横向偏移、芯片倾斜和管帽倾斜这三种操作误差中,管帽倾斜对封装组件的耦合效率影响最大.     

垂直腔面发射激光器的TO封装的耦合效率模拟分析

采用FRESNEL光学软件和MATLAB软件,详细分析了垂直腔面发射激光器的TO封装组件对耦合效率的影响.发现增加耦合透镜的折射率、减少管帽的高度和耦合透镜的尺寸可以提高耦合效率.     

垂直腔面发射激光器的TO封装的耦合效率模拟分析

采用FRESNEL光学软件和MATLAB软件,详细分析了垂直腔面发射激光器的TO封装组件对耦合效率的影响.发现增加耦合透镜的折射率、减少管帽的高度和耦合透镜的尺寸可以提高耦合效率.     

高速光探测器模块中的耦合理论和模拟

高速光器件的封装工艺中,光耦合占据重要的地位.文中针对一种高速光探测器中常用的光耦合方式——倾斜端面光纤到倒装芯片的耦合,提出了光纤耦合的柱透镜光学模型,并通过理论和光学软件模拟了各种封装工艺条件对耦合效率的影响.模拟结果显示,耦合效率的大小由光纤位置、芯片透镜尺寸和激光光源光斑形状共同决定.     

垂直腔面发射激光器的研究进展及其应用

垂直腔面发射激光器(VCSEL)具有常规半导体激光器不可比拟的优点：其光束是园形的,易于实现与光纤的高效耦合;VCSEL的有源区尺寸可做得非常小,以获得高封装密度和低阈值电流;适宜的设计可将激光二极管制成简单的单片集成二维列阵,以实现二维光数据处理所用的激光源;芯片生长后无须解理、封装即可进行在片实验。由于VCSEL的优良性能,从而获得了国内外科技界、企业界的高度关注。本对这种器件的性能、开发现状及应用作简要的概述。     

高速光探测器模块中的耦合理论和模拟

高速光器件的封装工艺中,光耦合占据重要的地位.文中针对一种高速光探测器中常用的光耦合方式——倾斜端面光纤到倒装芯片的耦合,提出了光纤耦合的柱透镜光学模型,并通过理论和光学软件模拟了各种封装工艺条件对耦合效率的影响.模拟结果显示,耦合效率的大小由光纤位置、芯片透镜尺寸和激光光源光斑形状共同决定.     

30Gbit/s并行光发射模块制作过程中的光耦合及封装

介绍了并行光发射模块制作过程中,垂直腔面发射激光器列阵与列阵光纤的对准及固定方法.对斜面光纤折弯耦合和垂直耦合两种方法进行了实验研究,得到的平均耦合效率均达70%以上.比较了两种耦合方式的利弊.针对列阵光纤耦合的特点,介绍了列阵光纤耦合过程中光纤的位置、角度的调整方法和特点.     

30Gbit/s并行光发射模块制作过程中的光耦合及封装

介绍了并行光发射模块制作过程中,垂直腔面发射激光器列阵与列阵光纤的对准及固定方法.对斜面光纤折弯耦合和垂直耦合两种方法进行了实验研究,得到的平均耦合效率均达70%以上.比较了两种耦合方式的利弊.针对列阵光纤耦合的特点,介绍了列阵光纤耦合过程中光纤的位置、角度的调整方法和特点.     

激光器与单模光纤球透镜耦合的蒙特卡洛分析

为了研究半导体激光器与单模光纤在采用球透镜耦合方式的封装过程中不同耦合参量对耦合效率的影响,建立了半导体激光器与单模光纤通过球透镜耦合的光传输模型。基于ABCD矩阵和高斯光束与单模光纤耦合理论,计算了半导体激光器与单模光纤的球透镜耦合效率,以光功率下降0.5dB为评判标准,给出了在透镜半径为0.5mm时的各参量容忍度。采用蒙特卡洛分析方法,结合耦合效率计算模型,模拟仿真了各参量满足正态分布时的耦合效率分布状况。结果表明,能达到的最大耦合效率为0.616,最大概率耦合效率为0.585,参量区间缩小一半对耦合效率的提升较明显,但进一步缩小参量区间对耦合效率的提升不明显。此研究方法对激光器件封装过程中的对准单元精度选取与耦合效率预估具有指导意义。     

半导体增益芯片与微透镜光纤耦合效率研究

光纤光栅外腔半导体激光器一般采用波导-光纤的直接耦合方式,光纤与增益芯片的耦合效率对光纤光栅外腔半导体激光器性能影响较大.为了讨论在采用不同类型光纤微透镜时对准误差对耦合效率的影响,寻找最佳微透镜类型,指导器件的设计和装配,分析了锥形和半球形光纤透镜的光线最大接收半角,利用ZEMAX软件进行模拟仿真,得到了两种光纤微透镜分别在位置误差和角度误差下的耦合效率曲线图.结果表明,锥形光纤透镜耦合效果更好,更适合应用于光纤光栅外腔半导体激光器.     

Packaging for a 40-channel parallel optical interconnection modulewith an over-25-Gbit/s throughput

NTT is currently working on developing a high-throughput interconnection module that is both compact and cost effective. The technology being developed is called “parallel inter-board optical interconnection technology”, or “ParaBIT”. The ParaBIT module that has been developed is the first step; it is a front-end module with 40 channels, a throughput of over 25 Gbit/s, and a transmission distance of over 100 m along multimode fibers. One major feature of this module is the use of vertical-cavity surface-emitting laser (VCSEL) arrays as very cost-effective light sources. These arrays enable the same packaging structure to be used for both the transmitter and receiver. To achieve super-multichannel performance, high-density multiport bare-fiber (BF) connectors were developed for the module's optical interface. Unlike conventional optical connectors, these BF connectors do not need a ferrule or spring. This ensures physical contact with an excellent insertion loss (less than 0.1 dB per channel). A polymeric optical waveguide film with a 45° mirror for coupling to the VCSEL and photo-diode (PD) arrays by passive optical alignment was also developed. To facilitate coupling between the VCSEL/PD array chips and the waveguide, a packaging technique was developed to align and die bond the optical array chips on a substrate. This technique is called transferred multichip bonding (TMB); it can be used to mount optical array chips on a substrate with a positioning error of only several micrometers. These packaging techniques enabled ultra-parallel interconnections to be achieved in prototype ParaBIT modules     

应用于柔性电子的超薄硅基芯片研究进展北大核心

柔性电子技术在近些年得到了快速发展，越来越多的柔性电子系统需要柔性、高性能的集成电路来实现数据处理和通信。通过减薄硅基芯片可以获得高性能的柔性集成电路，但是硅基芯片减薄之后的性能有可能发生变化，并且在制备、转移、封装的过程中极易产生缺陷或者破碎，导致芯片性能退化甚至失效。因此，超薄硅基芯片的制备工艺和柔性封装技术对于制备高可靠性的柔性硅基芯片十分关键。在此背景下，文章综述了柔性硅基芯片的力学和电学特性研究进展，介绍了几种超薄硅基芯片的减薄工艺和柔性封装前沿技术，并对超薄硅基芯片在柔性电子领域的应用和发展进行了总结和展望，为柔性硅基芯片技术的进一步研究提供参考。     

用于光纤陀螺的LiNbO3集成光学器件

本文报道用于光纤陀螺(FOG)的LiNbO_3集成光学(IO)器件及其技术。介绍制作LiNbO_3波导的扩散和质子交换两种技术,叙述了国内外近年研制和生产的FOG用多功能集成光学芯片及LiNbO_3相位调制器,给出了它们的结构、性能和封装(光纤耦合)技术。对国内外发展状况的综述表明,在这个技术领域,国内研制的器件的性能,已接近国外80年代末的水平。     

Genetic algorithms for defect detection of flip chips

Flip chip packaging technology is widely used in high density assembly and superior performance devices. The solder joints are sandwiched between dies and substrates, leading to the defects optically opaque. Defect inspection of flip chips become more difficult. In this paper, a nondestructive detection method was presented. Ultrasonic excitations were forced on the surface of the flip chips and the raw vibration signals were measured by a laser scanning vibrometer. Eleven time domain features and twenty-four frequency domain features were extracted for analysis. After that, the genetic algorithm was introduced for feature selection and the back propagation network was adopted for classification and recognition. The flip chips were divided into three categories: good flip chips, flip chips with missing solder joints, and flip chips with open solder joints. They are recognized under the features selected by genetic algorithms rapidly and accurately, compared with those under other feature datasets, demonstrating that the approach using genetic algorithms is effective for defect inspection in flip chip packaging.     

芯片设计中的功耗估计与优化技术

在芯片设计中,低功耗一直是一个重要的目标,受到封装、供电、散热的约束,并且最大功耗限制越来越严格。在本文中,首先讨论了芯片中的功耗来源。接着,阐述了在设计过程初期可以采用的几项可以降低功耗的技巧。本文提出的方法用于架构设计和前段设计的初期,如功耗估计、低功耗架构优化和时钟门控等。     

大功率白光LED封装技术面临的挑战

发光二极管（LED）是一类可直接将电能转化为可见光和热等辐射能的发光器件,具有一系列优异特性,被认为是最有可能进入普通照明领域的一种“绿色照明光源”。目前市场上功率型LED还远达不到家庭日常照明的要求。封装技术是决定LED进入普通照明领域的关键技术之一。文章对LED芯片的最新研究成果以及封装的作用做了简单介绍,重点论述了封装的关键技术,包括共晶焊接、倒装焊接以及散热技术,最后指出了未来LED封装技术的发展趋势及面临的挑战。     

Direct Attach of Photonic Components on Substrates With Optical Interconnects

Direct attach of lasers and photodiodes on boards with optical interconnects can facilitate high-density packaging of high-speed optical components. For the technology demonstration, test chips are assembled by means of optical polymer pillars on substrates with embedded arrays of waveguides (WGs) and 45deg mirrors. The light couples vertically though the optical pillars enabling 1.5-dB reduction of the WG-to-chip coupling loss to 0.5dB. The insertion loss of the module tested is less than 2 dB and 10-Gb/s signal transmission through the module is demonstrated with bit-error rate <10^-12. Three-dimensional finite-element analysis provides results on the stress distribution in the displaced pillars of different shapes     

用高低温循环加速试验评估光源模块长期贮存寿命的研究

Light source modules are the most crucial and fragile devices that affect the life and reliability of the interferometric fiber optic gyroscope （IFOG）. While the light emitting chips were stable in most cases, the module packaging proved to be less satisfactory. In long-term storage or the working environment, the ambient temperature changes constantly and thus the packaging and coupling performance of light source modules are more likely to degrade slowly due to different materials with different coefficients of thermal expansion in the bonding interface. A constant temperature accelerated life test cannot evaluate the impact of temperature variation on the performance of a module package, so the temperature cycling accelerated life test was studied. The main failure mechanism affecting light source modules is package failure due to solder fatigue failure including a fiber coupling shift, loss of cooling efficiency and thermal resistor degradation, so the Norris-Landzberg model was used to model solder fatigue life and determine the activation energy related to solder fatigue failure mechanism. By analyzing the test data, activation energy was determined and then the mean life of light source modules in different storage environments with a continuously changing temperature was simulated, which has provided direct reference data for the storage life prediction of IFOG.     

A study of interference in synchronous systems

The influence of interference and coupling in synchronous systems is investigated. Our new approach based on the linear time-variant model in oscillatory systems lends new insight into interference and coupling phenomena in synchronous systems. According to the analysis, it is possible that a small perturbation to an oscillator is enhanced by positive feedback through coupling with another oscillatory system. This implies that the inherent phase error caused by thermal noise can lead to a large amount of jitter by interference even in the absence of external noise. The analysis also reveals the relationship between the jitter occurrence and frequency difference in a plesiochronous system. Additionally, it is shown that the coupling within a closed-loop system can limit the bandwidth of a phase-locked loop and cause the peak gain of the response of the phase error. We confirmed these analytical results by measurements conducted on test chips.