Design of IIR Notch Filter with Approximately Linear Phase

A method for design of linear phase notch IIR filters is presented in this paper. The filter is realized in the form of a?parallel connection of two all-pass sub-filters. In order to achieve the resulting filter with an approximately linear phase in the pass-band, the applied all-pass sub-filters should be also with a?linear phase. The desired amplitude characteristic of a?resulting filter is obtained by all-pass sub-filter phase approximation. It can be achieved by applying either a?pure delay or an IIR all-pass filter in one branch. If a?pure delay is positioned in one branch, equiripple phase of all-pass sub-filter from the other branch is guaranteed for an equiripple amplitude characteristic of the resulting filter. Efficiency of the proposed algorithm is demonstrated on a?few examples. The algorithm exhibits a?fast convergence and an easy determination of initial values. In the case where IIR all-pass sub-filters are placed in both branches, the resulting amplitude characteristic satisfies all the prescribed demands, but the amplitude characteristic is not equiripple even when both all-pass sub-filters have equiripple phase.     

一种数字全通滤波器的设计方法研究

研究了一种数字全通滤波器的设计方法.对于一个平稳的全通滤波器,其分母多项式一定具有最小相位.该方法是基于最小相位滤波器的复倒谱系数和其群迟延函数以及其系统函数之间的关系,通过一个非线性的递归方程求解分母多项式的系数.由全通滤波器的特性已知,分母系数可以完全决定全通滤波器的传递函数.仿真结果表明这种方法能够使所设计滤波器的群延迟特性在整个频率范围内以近似理想的群延迟特性存在.并结合实现提出了一种用FIR逼近IIR的方法.     

Active RC nonminimum phase network using the DVCCS/DVCVS

A new configuration for realizing a second-order nonminimum phase transfer function using the differential voltage controlled current source, differential voltage controlled voltage source (DVCCS/ DVCVS) as the active building block is given. The special cases of a notch filter and an all-pass network are considered. Recently [1], the DVCCS/DVCVS [2]-[3] was used as the active building block in the realization of bandpass and lowpass filters. In this letter the synthesis of a second-order nonminimum phase transfer function using the DVCCS/DVCVS is considered.     

Novel digitally programmable multiphase voltage controlled oscillator and its stability discussion

In this paper, a novel programmable current-mode multiphase voltage controlled oscillator (MVCO) is presented. The proposed MVCO consists of four identical first-order all-pass filters, which act for delay cells of the MVCO. By switching the programmable MOS switches on and off, the MVCO can provide six or eight different phase sinusoidal signals. Theoretically, the proposed MVCO can provide 2n (n ? 3) different phase sinusoidal signals by cascading n (n ? 3) first-order all-pass delay cells. Compared with previous reported works, this MVCO has the advantages of lower supply voltage, lower power consumption, a smaller chip area and more multi-outputs than other reported works. In particularly, by using programmable switches and cascading more first-order all-pass delay cells, the proposed MVCO can theoretically provide 2n (n ? 3) different phase sinusoidal signals.     

A novel technique for the on-chip tuning of monolithic filters

Monolithic analog filters, with the exception of switched capacitor filters need on-chip tuning. Existing schemes of PLL and master-slave techniques use phase control for tuning. The proposed method uses amplitude detection, where the reference voltage itself is derived from the input. Much work has recently been done on active RC continuous-time filters in VLSI [4]-[8]. The heart of all such systems is an integrator with a voltage-variable time-constant (VVI). To generate the control for the VVI, these schemes use either a self-tuning filter (follow the master technique) [5] or a phase-locked loop [8], locking on to a stable reference frequency. Unlike these techniques which are essentially phase-control schemes, what is proposed here is a gain-control scheme.     

All-pass-based design of nearly-linear phase IIR low-pass differentiators

ABSTRACT

A new approach to the design of the nearly linear phase infinite impulse response low-pass differentiators using a parallel all-pass structure is discussed in this paper. The magnitude and phase responses of the proposed low-pass differentiators are first formulated as functions of the phase responses of the corresponding all-pass filters, and a set of equations is derived such that the magnitude response approximates the ideal one in the weighted Chebyshev sense both in the passband and the stopband. The maximum passband phase response linearity error is shown to be related to the maximum passband magnitude error and the value of an additional design parameter. Comparison with the existing nearly-linear phase infinite impulse response low-pass differentiators shows that the low-pass differentiators designed using the proposed method usually require less multiplications, which comes at the cost of a somewhat higher filter order and consequently higher group delay. However, as the reduced number of multiplications lead to lower power consumption if hardware implementation is considered, the proposed low-pass differentiators are an attractive alternative in applications where low group delay is not of crucial importance.     

An ultra-low-power, low-voltage electronic audio delay line for usein hearing aids

In this paper, the design of an electronic audio delay line, realized with a second-order all-pass filter, is presented. The designed filter is primarily intended for use in hearing aids, to provide directivity by a specially designed microphone array. The filter operates at a supply voltage of as low as 1.8 V. The simulated and measured total quiescent current is 0.9 μA. Owing to current companding and class-AB operation, the dynamic range is 62 dB at a total harmonic distortion (THD) below 7%, i.e., at maximum output. The delay time is adjustable by control currents. The filter has been integrated in a standard bipolar process. The total measured delay time of the all-pass filter is approximately 110 μs over a bandwidth of 4 kHz     

Closed-form approach to design of all-pass digital filters using cepstral coefficients

A simple method for the design of all-pass digital filters is described. In this method, given a desired group delay, the cepstral coefficients corresponding to the denominator of a stable all-pass filter are determined using a least-squares approach. The coefficients of the all-pass filter are then obtained from the cepstral coefficients using a recursive relation.     

Versatile integrated PMD emulation and compensation elements

Highly versatile building blocks for polarization-mode dispersion (PMD) emulation and compensation are demonstrated using tunable all-pass filters fabricated in 4%-index-contrast planar waveguides. While the all-pass filters can approximate any phase response, the complexity in setting the individual filter parameters is minimized by restricting the all-pass filter responses to realize a range of differential delays, dispersion, and dispersion slope. A single section can approximate first-order or a higher-order PMD term or emulate chromatic or higher-order dispersion. A differential group delay (DGD) tuning range over 100 ps is demonstrated for 10 Gb/s and 25 ps for 40 Gb/s data. Second-order PMD with a tuning range of 255 ps/sup 2/ and third-order PMD with a range of 2430 ps/sup 3/ are also demonstrated. The larger index contrast required for the ring-resonator-based all-pass filters is advantageous in reducing the thermooptic response time to achieve polarization rotation speeds on the order of 0.1 /spl mu/s/degree. The device is interferometrically stable and compact in size. It can be fully integrated, scaled to many sections, and can implement a variety of PMD synthesis and statistical-emulation approaches.     

A new approach to the design of complex all-pass IIR digital filters

A new method is proposed for designing complex all-pass IIR filters, the all-pass IIR filters with complex coefficients, in this paper. By minimizing the integration of certain square phase error over interested frequencies, an eigenvector of an appropriate real, symmetric and positive-definite matrix is computed to get the filter coefficients. The stability is achieved by specifying properly the desired phase specifications. If an appropriate iterative process is used, equiripple complex all-pass filter design can be obtained. The method is simple and the performance is comparable to the existing methods. Several examples are presented to demonstrate the effectiveness of the approach.     

Phase equalization of multidimensional wave digital filters derived by rotation

In multidimensional filtering, the phase response is very important. It should be as linear as possible in a certain sense. This paper presents a numerical approach to equalize the phase of multidimensional wave digital filters whose reference filters are transformed from one-dimensional reference filters. This method is illustrated by an example of a two-dimensional wave digital filter whose transfer function has nearly circular symmetrical behavior. The parameters of the all-pass circuits for phase equalization are calculated.     

Neural Network-Based IIR All-Pass Filter Design

This paper presents a neural network-based Lyapunov energy function for the weighted least-squares design of IIR all-pass filters. In the proposed method, the error reflecting the difference between the desired phase response and the phase of the designed IIR all-pass filter is formulated as a Lyapunov error criterion. Based on the neural network architecture and suitable Hopfield parameters, the optimal filter coefficients can be obtained when convergence is achieved. Furthermore, a weight updating function is proposed to achieve accurate approximation of the equiripple response. The simulation results indicate that the proposed technique can achieve high performance in a parallel manner.     

A CMOS analog continuous-time delay line with adaptive delay-timecontrol

A CMOS analog continuous-time delay line composed of cascaded first-order current-domain all-pass sections is discussed. Each all-pass section consists of CMOS transistors and a single capacitor. The operation is based on the square-law characteristic of an MOS transistor in saturation. The delay time per section can either be controlled by an external voltage or locked to an external reference frequency by means of a control system which features a large capture range. Experimental verification has been performed on two setups: an integrated cascade of 26 identical all-pass sections and a frequency-locking system breadboard built around two identical on-chip all-pass sections     

基于巴特沃斯逼近的二维IIR数字滤波器的设计

本文给出了一种基于巴特沃斯逼近的二维ＩＩＲ数字滤波器的设计方法，得到了由基本的全通节级联，并联实现的各种二维滤波器函数，包括，镜象对称互补滤波器，扇形滤波器和具有任意矩形通、阻带的滤波器，结果表明，这种实现结构具有通有灵敏度低、滤波器系数少的优点，并且由于巴特沃斯逼近的最大平坦性，得到的滤波器具有良好的相位特性。     

Novel Direct Current-Space-Vector Controlfor Shunt Active Power Filters Basedon the Three-Level Inverter

The growing number of electric drives with non-sinusoidal line currents has given increased interest in active power filters (APF), to avoid grid problems caused by harmonic distortions. In this paper, a novel direct current-space-vector control scheme (DCSVC) is presented for a three-level, neutral-point-clamped voltage source inverter, which is employed as an active power filter. The proposed method generates the compensation current reference indirectly generating an equivalent ohmic conductance for the fundamental component by means of the APF's dc-link voltage control. Based on the fast Fourier transform the compensation of the reactive fundamental current and selectable harmonics can be cancelled, confining the operation to only harmonic compensation and thus saving the APF's apparent power. The novel DCSVC, operating in synchronously rotating coordinates is implemented in a field programmable gate array, realizing the switching states from switching tables. The proposed control reduces the average switching frequency and thus, the switching power loss significantly, compared with a previous DCSVC, operating in stationary coordinates. Simulation and experimental results validate the feasibility and highly dynamic performance of the proposed control, both for harmonic and total non-active current compensation.      

All-Grounded Passive Elements Voltage-Mode DVCC-Based Universal Filters

In this paper two new voltage-mode (VM) universal filters employing three plus-type differential voltage current conveyors (DVCC+s) and grounded passive elements are presented. The first proposed filter is a single-input five-output (SIFO) circuit which can realize simultaneously all of the standard responses, i.e. low-pass (LP), band-pass (BP), high-pass (HP), all-pass (AP) and notch (NH) from the same configuration. The second proposed circuit is a three-input single-output (TISO) universal filter for realizing standard responses depending on the selection of the input signal from the same topology. Both of the proposed filters have the advantage of a high input impedance, which enables easy cascading to obtain higher order filters. The proposed filters are simulated using the SPICE program to verify the theoretical analysis.     

Digital integrator design using Simpson rule and fractional delay filter

The IIR digital integrator is designed by using the Simpson integration rule and fractional delay filter. To improve the design accuracy of a conventional Simpson IIR integrator at high frequency, the sampling interval is reduced from T to 0.5T. As a result, a fractional delay filter needed to be designed in the proposed Simpson integrator. However, this problem can be solved easily by applying well-documented design techniques of the FIR and all-pass fractional delay filters. Several design examples are illustrated to demonstrate the effectiveness of the proposed method.     

Voltage mode universal filters employing single FDCCII

In this paper, four new voltage-mode universal biquad filters configuration are proposed. First of two circuits proposed high-input impedance universal filter with single-input and three-outputs, which can simultaneously realize voltage mode low-pass, band-pass and high-pass filter responses employing all grounded passive components. The third proposed universal filter three-input and single-output, which also can realize all the standard filter functions. The fourth circuit proposed universal filter with three-input and five-outputs, which can be used as either a three-inputs single-output or a two-inputs five-outputs universal filters. It can realize all five different generic filtering signals: low-pass, band-pass, high-pass, band-stop and all-pass. Simulation results are given to confirm the theoretical analysis. The proposed biquad filters are simulated using TSMC CMOS 0.35 μm technology.     

Analysis of negative group delay response of all-pass ring resonator with Mach-Zehnder interferometer

The chromatic dispersion characteristics of waveguide all-pass filters were theoretically analyzed, in which the round-trip loss of a ring resonator was taken into account. Although an all-pass filter based on a ring resonator is lossless in principle, a finite round-trip loss of an actual filter changes an amplitude response and a group delay response drastically. The negative group delay resonance peak was confirmed both theoretically and experimentally.     

Closed-Form Design of Half-Sample Delay IIR Filter Using Continued Fraction Expansion

In this paper, the closed-form design of half-sample delay infinite-impulse response (IIR) filter is presented. First, the continued fraction expansion (CFE) and its recursive computation are reviewed briefly. Then, the CFE of square root function is applied to design half-sample delay IIR filters with various orders. The comparisons with conventional maximally flat half-sample delay all-pass and Lagrange filters are made and implementation issue is also addressed. Next, the designed half-sample delay filter is used to reduce the approximation error of the conventional IIR Simpson integrator, to design half-band and diamond shaped filters, and to magnify the digital image. Finally, several numerical examples are illustrated to demonstrate the effectiveness of the proposed design method