The self-formatting barrier characteristics of Cu–Mg/SiO2 and Cu–Ru/SiO2 films for Cu interconnects

To substitute or to supplement diffusion barrier as reducing lateral dimension of interconnects, the alloying Mg and Ru to Cu was investigated as a self-formatting barrier in terms of their resistivity, adhesion, and barrier characteristics After annealing at 400 °C for 30 min, the resistivities of the Cu–0.7 at%Mg alloy and Cu–2.2 at%Ru alloy were 2.0 μΩ cm and 2.5 μΩ cm, respectively, which are comparable to that of Cu films. The adhesion was investigated by means of a sandwiched structure using the four point bending test. The interfacial debonding energy, which represents the adhesion, of Cu–Mg/SiO₂ was over 5.0 J/m², while those of the Cu–Ru/SiO₂ and Cu/SiO₂ interfaces were 2.2 J/m² and 2.4 J/m², respectively. The barrier characteristics of the alloy films were also investigated by the time-dependent dielectric breakdown test, using a metal–oxide–semiconductor structure, under bias-temperature stress. It was shown that the alloying of Mg made the lifetime seven times longer, as opposed to the alloying of Ru which made it shorter.     

The effects of annealing step-edges on SrTiO3 and MgOsingle-crystal substrates on YBa2Cu3O7Josephson junctions

The effect of annealing step-edges on SrTiO₃ and MgO single-crystal substrates on Josephson junctions of YBa₂Cu ₃O₇, has been studied. The step-edge was fabricated by argon-ion milling technique and was annealed at 1050°C in oxygen atmosphere. YBa₂Cu₃O₇ thin film was deposited on the annealed step-edge by a standard pulsed laser deposition. The effect of annealing the step-edge on the junction was characterized by AFM and current-voltage (I-V)characteristic. The annealed step-edge on SrTiO₃ and MgO substrates showed that the surface of the substrates was smoother and I-V characteristic of Josephson junction improved     

Transport properties of AlGaN/GaN metal–oxide–semiconductor heterostructure field-effect transistors with Al2O3 of different thickness

The Al₂O₃ as a gate oxide and passivation was used to study the transport properties of AlGaN/GaN metal–oxide–semiconductor heterostructure field-effect transistors (MOSHFETs). Performance of the devices with Al₂O₃ of different thickness between 4 and 14 nm prepared by metal–organic chemical vapor deposition (MOCVD) and with 4 nm thick Al₂O₃ prepared by Al sputtering and oxidation was investigated. All MOS-devices yielded higher transconductance than their HFET counterparts, i.e. the transconductance/capacitance expected proportionality assuming the same carrier velocity was not fulfilled. A different electric field near/below the gate contact due to a reduction of traps is responsible for the carrier velocity enhancement in the channel of the MOSHFET. The trap reduction depends on the oxide used, as follows from the capacitance vs frequency dispersion for devices investigated. It is qualitatively in a good agreement with the different velocity enhancement evaluated, and devices with thinner oxide show higher traps reduction as well as higher transconductance enhancement. It is also shown that obtained conclusions can be applied well on performance of SiO₂/AlGaN/GaN MOSHFETs.     

The intervalley X6→Γ6, L6 scattering time in GaAs measured by ultrafast pump-probe infrared absorption spectroscopy

A direct measurement of the dynamics of electrons in the X₆ valley for a GaAs crystal by time-resolved absorption spectroscopy is reported for the first time. IR picosecond probe pulses were used to monitor the growth and decay of the population in the X₆ valley subsequent to excitation by a 527 nm pump pulse. The intervalley X₆→Γ₆, L₆ scattering time t_x of 0.70 ± 0.50 ps is determined and the crossection for the X₆→X₇ transition is estimated to be 1.8 × 10⁻¹⁶ cm².     

Demonstration of GaN MIS diodes by using AlN and Ga2O3(Gd2O3) as dielectrics

GaN MIS diodes were demonstrated utilizing AlN and Ga₂O₃(Gd₂O₃) as insulators. A 345 Å of AlN was grown on the MOCVD grown n-GaN in a MOMBE system using trimethylamine alane as Al precursor and nitrogen generated from a SVT RF N₂ plasma. For the Ga₂O₃(Gd₂O₃) growth, a multi-MBE chamber was used and a 195 Å oxide was E-beam evaporated from a single crystal source of Ga₅Gd₃O₁₂. The forward breakdown voltage of AlN and Ga₂O₃(Gd₂O₃) diodes are 5 and 6 V, respectively, which are significantly improved over 1.2 V from that of a Schottky contact. From the C–V measurements, both kinds of diodes showed good charge modulation from accumulation to depletion at different frequencies. The insulator/GaN interface roughness and the thickness of the insulator were measured with X-ray reflectivity.     

95%Al2O3陶瓷的MoO3体系低温金属化机理研究

本文采用由MoO₃加活化剂组成的配方对氧化铝陶瓷进行低温金属化,通过对氧化铝陶瓷、金属化层的显微结构及元素的分布情况来探索氧化铝陶瓷的低温金属化机理。研究发现金属化层中大部分MoO₃还原成活性较好的Mo颗粒,Mo颗粒间相互烧结连通为主体金属海绵骨架,同时少量的Mo氧化物与MnO、Al₂O₃、SiO 2、CaO等形成玻璃熔体,MnO、Al₂O₃、SiO 2、CaO之间也会形成MnO-Al₂O₃-SiO₂-CaO系玻璃熔体,从而获得致密、Mo金属与玻璃熔体相互缠绕、包裹的金属化层。金属化层中的两种玻璃熔体先后渗透、扩散进入氧化铝陶瓷晶界从而实现陶瓷与金属化层之间的连接。金属化层中还原的Mo金属与Ni层之间形成Mo-Ni合金,从而实现Ni层与金属化层之间的结合。     

MgO-Y_2O_3对热压烧结Al_2O_3性能的影响

以高纯的硫酸铝氨分解的无定形Al2O3为原料,MgO-Y2O3为烧结助剂,在N2气氛下热压烧结制备Al2O3陶瓷。研究了烧结助剂掺量对Al2O3材料的相组成、显微结构、烧结性能、力学性能、热导率和介电性能的影响。结果表明:所制Al2O3陶瓷具有细晶的显微结构特征和超高的抗弯强度。随着MgO-Y2O3掺量的增加,晶粒尺寸、抗弯强度和热导率先增大后减小,而介电损耗则呈现先减小后增大的变化规律。当MgO和Y2O3掺量均为质量分数2%时,Al2O3陶瓷呈现为较佳的综合性能:抗弯强度达最大值为603 MPa,热导率为36.47 W.m–1.K–1,介电损耗低至6.32×10–4。     

Silicon nano-particles in SiO2 sol–gel film for nano-crystal memory device applications

A novel 2-bit nano-silicon based non-volatile memory is proposed to double memory density. The thin film structure exhibits two conduction states (ON and OFF) at different voltages and has a cost-effective structure. The structure utilizes the good electrical properties of fluorinated SiO₂ thin films, together with the bi-stable properties conferred by the nano-silicon particles therein embedded. A polymeric layer of 8-hydroxyquinoline aluminum salt (Alq3) further deposited on the top of the nano-particle layer through chemical evaporation and a silver paste contact determines the final structure. The positive 0–15 V scan reveals two discontinuities with an ON/OFF ratio of 10⁴–10⁵ (2–4 V) and OFF/ON of 10³ (12.5–13.0 V). The reverse scan displays again two distinct thresholds, range of 10.5–11.0 V (ON/OFF ratio 10⁻³), respectively, 0.5 V (OFF/ON ratio 10⁻⁵–10⁻⁴).     

A low-impedance coplanar waveguide using an SrTiO3 thinfilm for GaAs power MMIC's

A novel structure for coplanar-waveguide transmission lines with low impedance and low loss is demonstrated in this paper. The new structure simply has a high dielectric SrTiO₃ thin film underneath the coplanar conductors. Due to the high dielectric constant of SrTiO₃, the coplanar line exhibited characteristic impedance as low as 18 Ω with a slot width of 5 μm and the center conductor width of 50 μm, while a conventional coplanar line on GaAs showed only 30 Ω with the same configuration. The newly developed coplanar structure is easily applicable for present GaAs monolithic-microwave integrated-circuit (MMIC) technology, especially for power MMIC's and low-impedance devices     

Good High-Temperature Stability of TiN/ Al2O3/WN/TiN Capacitors

For the first time, good thermal stability up to an annealing temperature of 1000degC has been demonstrated for a new TiN/Al₂O₃/WN/TiN capacitor structure. Good electrical performance has been achieved for the proposed layer structure, including a high dielectric constant of ~ 10, low leakage current of 1.2times10^-7 A/cm² at 1 V, and excellent reliability. A thin WN layer was incorporated into the metal-insulator-metal capacitor between the bottom TiN electrode and the Al₂O₃ dielectric suppressing of interfacial-layer formation at Al₂ O₃/TiN interfaces and resulting in a smoother Al₂O₃/TiN interface. This new layer structure is very attractive for deep-trench capacitor applications in DRAM technologies beyond 50 nm.     

Pt-based metallization of PMOS devices for a compatible monolithic integration of semiconducting/Yba2Cu3O7−δ superconducting devices on silicon

Mo, Pt, Pt/Mo and Pt/Ti thin films have been deposited onto Si and SiO₂ substrates by RF sputtering and annealed in the YBa₂Cu₃O_7−δ (YBCO) growth conditions. The effect of annealing on the sheet resistance of unpatterned layers was measured. A Pt-based multilayered metallization for the PMOS devices was proposed and tested for a compatible monolithic integration of semiconducting devices and YBCO sensors on the same silicon substrate. The best results were obtained with a Pt/Ti/Mo-silicide structure showing 0.472 Ω_□ interconnect sheet resistivity and 2×10⁻⁴ Ω cm² specific contact resistivity after annealing for 60 min at 700 °C in 0.5 mbar O₂ pressure.     

Cooperative Quantum Cutting in Yb $^{3+}$–Tb $^{3+}$ Codoped Borosilicate Glasses

Quantum cutting down-conversion (DC) with the emission of two near-infrared photons for each blue photon absorbed is realized in $hbox{Yb}^{3+}hbox{–}hbox{Tb}^{3+}$ codoped borosilicate glasses. With the excitation of $hbox{Tb}^{3+}$ ion by a 484-nm monochromatic light, emission from the $^{2} hbox{F} _{5/2}rightarrow ^{2} hbox{F} _{7/2}$ transition of $hbox{Yb}^{3+}$ ions is observed and this emission is proved to originate from the DC between $hbox{Tb}^{3+}$ ions and $hbox{Yb}^{3+}$ ions. Results shows that maximum quantum efficiency reach as high as 153%, which is comparable with that in oxyfluoride glass ceramics in this system. With the advantages of excellent transparence, easy shaping, good stability, and low cost, $hbox{Yb}^{3+}hbox{–}hbox{Tb}^{3+}$ codoped borosilicate glasses are potentially used as down-converter layer in silicon-based solar cells.      

Reliability of ultra thin ZrO2 films on strained-Si

Ultra thin high-k zirconium oxide (equivalent oxide thickness 1.57 nm) films have been deposited on strained-Si/relaxed-Si_0.8Ge_0.2 heterolayers using zirconium tetra-tert-butoxide (ZTB) as an organometallic source at low temperature (<200 °C) by plasma enhanced chemical vapour deposition (PECVD) technique in a microwave (700 W, 2.45 GHz) plasma cavity discharge system at a pressure of 66.67 Pa. The trapping/detrapping behavior of charge carriers in ultra thin ZrO₂ gate dielectric during constant current (CCS) and voltage stressing (CVS) has been investigated. Stress induced leakage current (SILC) through ZrO₂ is modeled by taking into account the inelastic trap-assisted tunneling (ITAT) mechanism via traps located below the conduction band of ZrO₂ layer. Trap generation rate and trap cross-section are extracted. A capture cross-section in the range of 10⁻¹⁹ cm² as compared to 10⁻¹⁶ cm² in SiO₂ has been observed. The trapping charge density, Q_ot and charge centroid, X_t are also empirically modeled. The time dependence of defect density variation is calculated within the dispersive transport model, assuming that these defects are produced during random hopping transport of positively charge species in the insulating layer. Dielectric breakdown and reliability of the dielectric films have been studied using constant voltage stressing. A high time-dependent dielectric breakdown (TDDB, t_bd > 1500 s) is observed under high constant voltage stress.     

High-κ Al2O3−HfTiO Nanolaminates With Less Than 0.8-nm Equivalent Oxide Thickness

High quality nanolaminate stacks consisting of five Al₂O₃-HfTiO layers with an effective dielectric constant of about 22.5 are reported. A dielectric constant for binary HfTiO thick films of about 83 was also demonstrated. The electrical characteristics of as-deposited structures and ones which were annealed in an O₂ atmosphere at up to 950 degC for 5-10 min were investigated. Two types of gate electrodes: Pt and Ti were compared. The dielectric stack which was annealed up to 500 degC exhibits a leakage current density as small as ~1times10^-4 A/cm² at an electric of field 1.5 MV/cm for a quantum-mechanical corrected equivalent oxide thickness of ~0.76 nm. These values change to ~1times10^-8 A/cm² and 1.82 nm, respectively, after annealing at 950 degC     

Simulation and experimental results on the forward J–V characteristic of Al implanted 4H–SiC p–i–n diodes

In this work the forward J–V characteristics of 4H–SiC p–i–n diodes are analysed by means of a physics based device simulator tuned by comparison to experimental results. The circular devices have a diameter of 350 μm. The implanted anode region showed a plateau aluminium concentration of 6×10¹⁹ cm⁻³ located at the surface with a profile edge located at 0.2 μm and a profile tail crossing the n-type epilayer doping at 1.35 μm. Al atom ionization efficiency was carefully taken into account during the simulations. The final devices showed good rectifying properties and at room temperature a diode current density close to 370 A/cm² could be measured at 5 V. The simulation results were in good agreement with the experimental data taken at temperatures up to about 523 K in the whole explored current range extending over nine orders of magnitude. Simulations also allowed to estimate the effect of a different p⁺ doping electrically effective profile on the device current handling capabilities.     

High-efficiency XeCl discharge laser with high-brightnessSrTiO3 corona preionizer

An XeCl discharge laser with a high-brightness corona preionizer using a segmented columnar SrTiO₃ dielectric is discussed. A high overall efficiency of 2.35% with a laser output energy of 350 mJ was obtained using a SrTiO₃ doorknob capacitor cut by a diamond cutter as the dielectric. These characteristics are almost the same value as that obtained with an UV-spark-preionized XeCl laser using the same laser tube     

MOS transistors with stacked SiO2-Ta2O5-SiO2 gate dielectrics for giga-scale integration ofCMOS technologies

Advances in lithography and thinner SiO₂ gate oxides have enabled the scaling of MOS technologies to sub-0.25-μm feature size. High dielectric constant materials, such as Ta₂O₅ , have been suggested as a substitute for SiO₂ as the gate material beyond t_ox≈25 Å. However, the Si-Ta ₂O₅ material system suffers from unacceptable levels of bulk fixed charge, high density of interface trap states, and low silicon interface carrier mobility. In this paper we present a solution to these issues through a novel synthesis of a thermally grown SiO₂(10 Å)-Ta₂O₅ (MOCVD-50 Å)-SiO₂ (LPCVD-5 Å) stacked dielectric. Transistors fabricated using this stacked gate dielectric exhibit excellent subthreshold behaviour, saturation characteristics, and drive currents     

Stack gate PZT/Al2O3 one transistorferroelectric memory

We have developed a single transistor ferroelectric memory using stack gate PZT/Al₂O₃ structure. For the same ~40 Å dielectric thickness, the PZT/Al₂O₃/Si gate dielectric has much better C-V characteristics and larger threshold voltage shift than those of PZT/SiO₂/Si. Besides, the ferroelectric MOSFET also shows a large output current difference between programmed on state and erased off state. The <100 us erase time is much faster than that of flash memory where the switching time is limited by erase time     

Possibility ofNd1.9Ba1.1Cu3O7+δ andPr1.14Ba1.86Cu3O7-δsingle crystals for insulator in high-speed superconductingcircuits

Dielectric properties of both Nd_1.9Ba_1.1Cu ₃O_7+δ (NBCO-213) and Pr_1.14Ba_1.86Cu₃O_7-δ (Pr-rich PBCO) single crystals have been examined at low temperature. These materials have good lattice matching to high-T_c superconductors (HTS), but they are conductive at room temperature. Below 80 K, they are insulators with low dielectric constants, ε _τ below 25, and low dielectric loss tan δ below 0.1 at 100 kHz. The value of ε_τ is suitable for insulators in integrated circuits using strip line widths of 10 μm order, providing short delay time, no excitation of surface wave, and low radiation loss. The value of tan δ is comparable to loss of superconducting surface resistance above 100 GHz. These results indicate the applicability for the insulator layers in multilayer superconducting electronic devices such as Single Flux Quantum (SFQ) circuits operated at high speed     

Template patterning of YBa2Cu3O7

We demonstrate the use of thin chromium layers to define structures in YBa₂Cu₃O₇ deposited by laser ablation. The chromium reacts with copper to form an insulating crystalline compound containing copper and chromium in equal amounts. Although the reaction will proceed up to approximately 1 μm into the defined pattern, the formation of a crystalline compound means that the extent of the reaction is limited by the availability of chromium. We have defined large-area, regular grids of tiny chromium pads, yielding a grid of insulating islands of approximately 600 nm in size after YBa₂Cu₃O₇ deposition. Electrical measurements show the influence of such a pattern on the R-T characteristics of the YBa₂Cu₃O₇.