一种-16 dB ~12 dB增益范围的高线性度PGA设计

可编程增益放大器广泛应用于射频接收通道,起中频放大、驱动模数转换器的功能.基于电阻反馈运放设计的可编程增益放大器具有动态范围大、线性度高的特点.文中采用互补金属氧化物半导体工艺设计实现了一种基于全差分运放和衰减器的宽范围、高线性度可编程增益放大器.测试结果表明增益变化范围为-16dB～12dB,步进为1 dB,输出1 dB压缩点大于10 dBm@60 MHz,输出三阶交调点大于26 dBm@60 MHz.     

一种65 nm CMOS 60 GHz高增益功率放大器

设计了一种基于65 nm CMOS工艺的60 GHz功率放大器。采用共源共栅结构与电容中和共源级结构相结合的方式来提高功率放大器的增益,并采用两路差分结构来提高输出功率。采用片上变压器作为输入/输出匹配及级间匹配,以减小芯片的面积,从而降低成本。采用Cadence、ADS和Momentum等软件进行联合仿真。后仿真结果表明,在工作频段为60 GHz时,最大小信号增益为26 dB,最大功率附加效率为18.6%,饱和输出功率为15.2 dBm。该功率放大器具有高增益、高效率、低成本等优点。     

High-speed GaAs operational amplifier

An operational amplifier has been designed and fabricated using GaAs MESFETs. This amplifier is a general-purpose monolithic GaAs op amp designed as as a stand-alone component. The amplifier has a differential input, an open-loop gain in excess of 60 dB, and is internally compensated. The high open-loop gain (60 dB at 100 kHz) was achieved by using gain stages with positive feedback. The op amp incorporates a current-mirror level-shifting stage which allows the op amp to operate over a wide power-supply range (/spl plusmn/5-9 V). Previous designs have diodes to achieve level shifting, a practice that precludes operation over a wide supply range. This op amp is a true analog to its silicon counterparts, but it has a higher gain-bandwidth product.     

基于GaAs PHEMT工艺的60~90GHz功率放大器MMIC

研制了一款60~90 GHz功率放大器单片微波集成电路(MMIC),该MMIC采用平衡式放大结构,在较宽的频带内获得了平坦的增益、较高的输出功率及良好的输入输出驻波比(VSWR)。采用GaAs赝配高电子迁移率晶体管(PHEMT)标准工艺进行了流片,在片测试结果表明,在栅极电压为-0.3 V、漏极电压为+3 V、频率为60~90 GHz时,功率放大器MMIC的小信号增益大于13 dB,在71~76 GHz和81~86 GHz典型应用频段,功率放大器的小信号增益均大于15 dB。载体测试结果表明,栅极电压为-0.3 V、漏极电压为+3 V、频率为60~90 GHz时,该功率放大器MMIC饱和输出功率大于17.5 dBm,在71~76 GHz和81~86 GHz典型应用频段,其饱和输出功率可达到20 dBm。该功率放大器MMIC尺寸为5.25 mm×2.10 mm。     

Integrated Amplifier Circuits for 60 GHz Broadband Telecommunication

Wide frequency bandwidth has been internationally allocated for unlicensed operation around the oxygen absorption frequency at 60 GHz. A power amplifier and a low noise amplifier are presented as building blocks for a T/R-unit at this frequency. The fabrication technology was a commercially available 0.15 m gallium arsenide (GaAs) process featuring pseudomorphic high electron mobility transistors (PHEMT). Using on-wafer tests, we measured a gain of 13.4 dB and a +17 dBm output compression point for the power amplifier at 60 GHz centre frequency when the MMIC was biased to 3 volts V_dd. At the same frequency, the low noise amplifier exhibited 24 dB of gain with a 3.5 dB noise figure. The AM/AM and AM/PM characteristics of the power amplifier chip were obtained from the large-signal S-parameter measurement data. Furthermore, the power amplifier was assembled in a split block package, which had a WR-15 waveguide interface in input and output. The measured results show a 12.5 dB small-signal gain and better than 8 dB return losses in input and output for the packaged power amplifier.     

A 4?8 GHz dual gate m.e.s.f.e.t. amplifier

A two-stage dual-gate f.e.t. amplifier with small signal gain of 20 ± 0.75 dB, covering an octave bandwidth (4?8 GHz) and having a dynamic gain control range in excess of 60 dB is reported. The gain frequency response, input and output v.s.w.r. are described as a function of second-gate voltage. The performance of the dual-gate f.e.t. amplifier as a fast r.f. switch is also presented.     

Performance of GaAs MESFET's at Low Temperatures (Short Papers)

The noise- and s-parameters of a GaAs MESFET with 1-mu m gate Iength are characterized versus temperature. At room temperature, the noise figure measured at 12 GHz is 3.5 dB. At 90 K, the noise figure decreases to 0.8 dB (T/sub e/ = 60 K). The associated gain is 8 dB. The design of a cooled amplifier for the 11.7-12.2-GHz communication band is discussed. At 60 K, the three-stage amplifier exhibits 1.6-dB noise figure (T/sub e/ = 130 K) and 31-dB gain.     

基于分档切换的射频宽带放大器的设计

针对现行的增益放大器对于低频10M赫兹和高频段的放大特性不能满足增益的一致性,同时每个增益放大器都需级联才能满足0~60d B可调,但级联会产生指标的降低的问题,文中提出一个射频宽带增益放大器。其高频段模块电路是由输入电路、三级16d B放大电路和四选一切换器、增益可调放大器和输出驱动电路组成的模拟电路构成,系统控制模块以STC单片机为主,可完成增益设定、控制四选一切换器、增益可调电路等功能。测试结果表明文中提供的射频宽带放大器,相比传统的射频宽带放大器,在提供较低频段和高频段增益放大且提供增益一致性的同时,能够提供更高的线性度。     

A 100-MHz 100-dB operational amplifier with multipath nested Millercompensation structure

A 100-MHz bipolar operational amplifier has a gain of 100 dB. The op amp owes its high unity-gain bandwidth and high gain to an all-n-p-n signal path and multipath nested Miller compensation (MNMC). The phase margin with a 100-pF load is 40° at 100 MHz and the amplifier settles in 60 ns to 0.1% on a 1-V step. For comparison, a similar op amp without the multipath technique has been realized. The unity-gain bandwidth of this nested Miller compensation (NMC) op amp is 60 MHz and the settling time is 70 ns. Theory and measurements confirm that the multipath technique almost doubles the bandwidth of nested Miller compensated amplifiers     

A 60 GHz Medium Power Amplifier for Radio‐over‐Fiber System

We present the design and fabrication of a 60 GHz medium power amplifier monolithic microwave integrated circuit with excellent gain‐flatness for a 60 GHz radio‐over‐fiber system. The circuit has a 4‐stage structure using microstrip coupled lines instead of metal‐insulator‐metal capacitors for unconditional stability of the amplifier and yield enhancement. The gains of each stage of the amplifier are modified to provide broadband characteristics of input/output matching for the first and fourth stages and to achieve higher gains for the second and third stages to improve the gain‐flatness of the amplifier for wideband.     

Gigahertz-band high-gain low-noise AGC amplifiers in fine-line NMOS

The design and test results of a single-chip NMOS automatic gain control (AGC) amplifier are described. The amplifier has a maximum flat gain of 50 dB, dynamic range of 70 dB, and a noise figure of 11 dB. The flat response from near DC to a 3-dB bandwidth of 1 GHz does not require tuning of any peaking circuits. The chip is also capable of operating at 3 GHz with unity gain delivering -8 dBm into a 50-/spl Omega/ load. The global feedback scheme designed for this chip stabilizes it against large shifts in threshold voltage and ambient temperature variation of 170/spl deg/C. This feedback scheme can provide stable DC feedback for a forward amplifier gain of at least 60 dB. Application of this application in the design of low-noise high-speed fibre-optic systems is envisaged.     

应用于60GHz无线收发机内的带宽大于3GHz的无电感CMOS可编译增益放大器

这篇文章呈现了一个应用于60GHz无线收发机内的带宽大于3GHz的无电感CMOS可编译增益放大器,使用了改进的带负电容抵消技术Cherry-hooper放大器作为增益单元,采用了新颖的电路技术来实现增益调节,该技术在宽带PGA的设计中具有普适性,并且可以大大简化宽带PGA的设计。PGA通过两级增益单元和一级输出BUFFER的级联获得了最大增益30dB和远宽于3GHz的带宽。该PGA集成进整个60GHz无线收发机里面并且用TSMC65nm的CMOS工艺获得实现。整个接收机前端的测试结果表明接收机前端获得了18dB的可变增益范围和>3GHz的带宽,这证明提出的PGA本身获得了18dB的可变增益范围并且带宽是远大于3GHz的。该PGA电源电压为1.2V,功耗为10.7mW,核心版图面积仅仅为0.025mm^2。     

An inductorless CMOS programmable-gain amplifier with a > 3 GHz bandwidth for 60 GHz wireless transceivers

An inductorless wideband programmable-gain amplifier (PGA) for 60 GHz wireless transceivers is presented. To attain wideband characteristics, a modified Cherry-Hooper amplifier with a negative capacitive neutralization technique is employed as the gain cell while a novel circuit technique for gain adjustment is adopted; this technique can be universally applicable in wideband PGA design and greatly simplifying the design of wideband PGA. By cascading two gain cells and an output buffer stage, the PGA achieves the highest gain of 30 dB with the bandwidth much wider than 3 GHz. The PGA has been integrated into one whole 60 GHz wireless transceiver and implemented in the TSMC 65 nm CMOS process. The measurements on the receiver front-end show that the receiver front-end achieves an 18 dB variable gain range with a > 3 GHz bandwidth, which proves the proposed PGA achieves an 18 dB variable gain range with a bandwidth much wider than 3 GHz. The PGA consumes 10.7 mW of power from a 1.2-V supply voltage with a core area of only 0.025 mm².     

High-gain wideband error amplifier topology for DC-DC buck converter switching at 20 MHz

A wideband error amplifier topology with increased DC-gain and reduced quiescent current consumption is presented. The reduction in quiescent current consumption is achieved by lowering the output stage current, which helps to increase the output impedance and hence the overall DC-gain of the amplifier. Simulation results show that the proposed topology has 60 dB DC gain and 540 MHz unity gain bandwidth with 450 muA quiescent current consumption. The experimental result of the loop-gain of a high-frequency (20 MHz) DC-DC buck converter that utilises the proposed topology also confirms the simulation results.     

低压工作的轨到轨输入／输出缓冲级放大器

本文提出了一种低压工作的轨到轨输入／输出缓冲级放大器。利用电阻产生的输入共模电平移动,该放大器可以在低于传统轨到轨输入级所限制的最小电压下工作,并在整个输入共模电压范围内获得恒定的输入跨导;它的输出级由电流镜驱动,实现了轨到轨电压输出,具有较强的负载驱动能力。该放大器在CSMCO．6-μmCMOS数模混合工艺下进行了HSPICE仿真和流片测试,结果表明：当供电电压为5V,偏置电流为60uA,负载电容为10pF时,开环增益为87．7dB,功耗为579uw,单位增益带宽为3．3MHz;当该放大器作为缓冲级时,输入3VPP10kHz正弦信号,总谐波失真THD为53．2dB。     

0.1～2.8 GHz超宽带低噪声放大器的研制

选用噪声较小、增益较高且工作电流较低的放大管ATF55143,利用两种负反馈和宽带匹配技术,结合ADS软件的辅助设计,研制出宽带低噪声放大器。在0.1～2.8GHz范围内,其增益大于30dB,平坦度小于±1.3dB,噪声系数小于1.45dB,工作电流小于60mA,驻波比小于1.8。该放大器成本较低,体积较小,可应用于各种微波通讯领域。     

Area-Efficient 60 GHz +18.9 dBm Power Amplifier with On-Chip Four-Way Parallel Power Combiner in 65-nm CMOS

This paper presents a compact 60-GHz power amplifier utilizing a four-way on-chip parallel power combiner and splitter. The proposed topology provides the capability of combining the output power of four individual power amplifier cores in a compact die area. Each power amplifier core consists of a three-stage common-source amplifier with transformer-coupled impedance matching networks. Fabricated in 65-nm CMOS process, the measured gain of the 0.19-mm² power amplifier at 60 GHz is 18.8 and 15 dB utilizing 1.4 and 1.0 V supply. Three-decibel band width of 4 GHz and P_1dB of 16.9 dBm is measured while consuming 424 mW from a 1.4-V supply. A maximum saturated output power of 18.3 dBm is measured with the 15.9% peak power added efficiency at 60 GHz. The measured insertion loss is 1.9 dB at 60 GHz. The proposed power amplifier achieves the highest power density (power/area) compared to the reported 60-GHz CMOS power amplifiers in 65 nm or older CMOS technologies.     

60-GHz noise performance of ion-implanted InxGa1-xAs MESFET's

The authors report the 60-GHz noise performance of low-noise ion-implanted In_xGa_1-xAs MESFETs with 0.25 μm T-shaped gates and amplifiers using these devices. The device noise figure was 2.8 dB with an associated gain of 5.6 dB at 60 GHz. A hybrid two-state amplifier using these ion-implanted In_xGa_1-x As MESFETs achieved a noise figure of 4.6 dB with an associated gain of 10.1 dB at 60 GHz. When this amplifier was biased at 100% I _dss, it achieved 11.5-dB gain at 60 GHz. These results, achieved using low-cost ion-implantation techniques, are the best reported noise figures for ion-implanted MESFETs     

用受激布里渊散射压缩激光脉宽和进行激光放大

使用受激布里渊散射压缩激光脉宽。30ns的红宝石激光在丙酮中被压缩到～6ns;斯托克斯脉冲经激光放大器放大,能量增益大于5,放大器总功率增益～60。     

Continuous-wave fiber optical parametric amplifier with 60-dB gain using a novel two-segment design

We have obtained 60 dB of internal (ON-OFF) gain with a continuous-wave fiber optical parametric amplifier by using an isolator between two fiber segments to increase the pump stimulated Brillouin scattering threshold. Subdecibel penalties were measured for transmission of 10-Gb/s signals, with 35 dB of gain.