Room-Temperature Deposited Titanium Silicate Thin Films for MIM Capacitor Applications

High-k titanium silicate (i.e., TiSiO₄) thin films of various thicknesses (in the 4.5- to 160-nm range) were successfully deposited by means of a sputter deposition process at room-temperature and integrated into metal-insulator-metal (MIM) capacitors. It is shown that the TiSiO₄-based capacitors can exhibit a capacitance density as high as 30 fF/mum² while maintaining low dielectric dispersion and losses. An excellent voltage linearity was also obtained ( alpha~600 ppm/V² at 8.2 fF/mum²) together with a high dielectric constant of 16.5 and low leakage current of about 10 nA/cm² at 1 MV/cm. Our results thus show that TiSiO₄ films constitute a very promising approach for the achievement of high performance MIM capacitors     

Performance Improvement of $hbox{Sm}_{2}hbox{O}_{3}$ MIM Capacitors by Using Plasma Treatment After Dielectric Formation

In this letter, we investigate the dependence of the performance of metal-insulator-metal (MIM) capacitors with Sm₂O₃ dielectric on plasma treatment (PT) performed before Sm₂O₃ deposition, after Sm₂O₃ deposition, or both before and after Sm₂O₃ deposition. By performing PT in N₂ ambient (PTN) after Sm₂O₃ dielectric formation, the effective quadratic voltage coefficient of capacitance (VCC) can be reduced from 498 to 234 ppm/V² and the effective linear VCC can be reduced from 742.3 to 172 ppm/V for MIM capacitor with Sm₂O₃ dielectric having a capacitance density of ~ 7.5 fF/mum². The leakage current density at +3.3 V can be reduced from 3.44 10^-7 to 1.60 times 10^-8 A/cm² by performing PTN in both before and after Sm₂O₃ deposition. PTN after dielectric formation is an effective way to improve the performance of high-kappa dielectric MIM capacitors for RF and analog/mixed signal IC applications.     

Optimized silicon-rich oxide (SRO) deposition process for 5 V onlyflash EEPROM applications

A process for depositing in-situ very-thin (<10 nm) SiO₂ films on top of a silicon-rich oxide (SRO) layer in a standard low-pressure chemical vapor deposition (LPCVD) reactor has been optimized. Polysilicon-gate MOS capacitors using this stacked dielectric have shown high tunneling current at low voltages and an extraordinary endurance to electrical stress. Capacitors with 7 nm LPCVD SiO₂ on top of 10 nm SRO did not show any relevant shift on either the low or high portion of the I-V characteristic, after a fluence of more than 500 C/cm² at J=0.1 A/cm² . The results add further support to the usefulness of implementing these stacked dielectric structures in a variety of nonvolatile memory devices     

Deposition of uniform Zr-Sn-Ti-O films by on-axis reactivesputtering

We describe the deposition of amorphous Zr-Sn-Ti-O (aZTT) dielectric thin films using conventional on-axis reactive sputtering. Thin films of composition Zr_0.2Sn_0.2Ti_0.6 O₂ have excellent dielectric properties: 40-50-nm thick films with a dielectric constant of 50-70 were obtained, depending on the processing conditions, yielding a specific capacitance of 9-17 fF/μm². Breakdown fields were measured to be 3-5 MV/cm, yielding a figure of merit εε₀E_br=15-30 μC/cm², up to eightfold higher than conventional deposited SiO₂. Leakage currents, measured at 1.0 MV/cm, were in the range 10^-9-10^-7 A/cm². This material appears well-suited for use in Si-IC device technology, for example as storage capacitors in DRAM     

Reactively sputtered tantalum pentoxide thin films for integrated capacitors

The aim of this work was to develop a deposition process for a high-dielectric constant tantalum pentoxide for integrated capacitors. Thin films were deposited reactively on glass wafers using a radio-frequency magnetron sputtering cluster tool at various O₂/Ar flow ratios. By using 2 MeV ⁴He⁺ backscattering spectroscopy and X-ray diffraction, the films obtained showed a stoichiometric orthorhombic β-Ta₂O₅ phase at 20% O₂ in the sputtering gas flow. With low-frequency measurements (f=100 kHz), a 200×200-μm² square metal–insulator–metal (MIM) capacitor with copper electrodes and a 340-nm thick dielectric gave a capacitance density of 0.066 μF/cm², with a quality factor (Q) of 650. The value of the relative permittivity (_r) was approximately 25 determined from MIM capacitors of various sizes. The surface roughness of the 376-nm thick oxide film was found to be small: 0.255 nm. The largest measured capacitor (200×200 μm²) gave reasonable results at low frequencies. When the frequency was increased (100 kHz–20 GHz) only for the smaller capacitors (30×30 μm²) the capacitance remained constant. However, the Q values decreased of the smaller capacitors as a function of frequency. Processed tantalum pentoxide MIM capacitors possessed reasonable electrical properties below 2 GHz and good potential for further improvement.     

Yttrium oxide/silicon dioxide: a new dielectric structure forVLSI/ULSI circuits

Electrical characteristics of Al/yttrium oxide (~260 Å)/silicon dioxide (~40 Å)/Si and Al/yttrium oxide (~260 Å)/Si structures are described. The Al/Y₂O₃/SiO₂/Si (MYOS) and Al/Y₂ O₃/Si (MYS) capacitors show very well-behaved I-V characteristics with leakage current density <10^-10 A/cm² at 5 V. High-frequency C- V and quasistatic C-V characteristics show very little hysteresis for bias ramp rate ranging from 10 to 100 mV/s. The average interface charge density (Q_f+Q _it) is ~6×10¹¹/cm² and interface state density D_it is ~10¹¹ cm^-2-eV^-1 near the middle of the bandgap of silicon. The accumulation capacitance of this dielectric does not show an appreciable frequency dependence for frequencies varying from 10 kHz to 10 MHz. These electrical characteristics and dielectric constant of ~17-20 for yttrium oxide on SiO₂/Si make it a variable dielectric for DRAM storage capacitors and for decoupling capacitors for on-chip and off-chip applications     

Cubic paraelectric (nonferroelectric) perovskite PLT thin filmswith high permittivity for ULSI DRAMs and decoupling capacitors

Polycrystalline paraelectric perovskite thin films in the Pb-La-Ti-O or PLT (28 mol.% La) system have been studied. Thin (0.5-μm) films were integrated onto 3-in Pt/Ti/SiO₂/(100) Si wafers by the sol-gel processing technique. Low-field dielectric measurements yielded dielectric permittivity and loss tangent of 1400 and 0.015, respectively, while high-field Sawyer-Tower measurements (P-E) showed linear behavior up to 40 kV/cm, which approached saturation at 200 kV/cm. Pulse charging transient and current-voltage measurements indicated a high charge storage density (15.8 μC/cm²) and low leakage current density (0.50 μA/cm²) under a field of 200 kV/cm. The charging time for a 1-μm² PLT capacitor at 200 kV/cm was estimated to be 0.1 ns. The preliminary data demonstrate that paraelectric PLT thin films have excellent potential for use in ULSI DRAMs and as decoupling capacitors     

Investigation of MOS capacitors with thin ZrO2layers and various gate materials for advanced DRAM applications

Thin ZrO2layers were used to realize MOS capacitors with aluminum, polysilicon, and molybdenum gate electrodes. The layers, 300-600 Å in thickness, were obtained by metal organic chemical vapor deposition. The effects of various high-temperature treatments as well as gate material deposition conditions on the MOS capacitor properties were studied. Processing conditions compatible with standard silicon technology were established to obtain capacitors suitable for advanced DRAM application. Relative dielectric constant ∈ ≥ 16, breakdown fieldE_{B} ge 3MV/cm, and leakage currents at applied voltage of 5V around 10^-8A/cm²enable the realization of capacitors with dielectric layer equivalent to 35 Å of SiO2.     

Improved High-Temperature Leakage in High-Density MIM Capacitors by Using a TiLaO Dielectric and an Ir Electrode

We have fabricated high-kappa TaN/Ir/TiLaO/TaN metal-insulator-metal capacitors. A low leakage current of 6.6 times 10^-7 A/cm² was obtained at 125degC for 24-fF/mum2 density capacitors. The excellent device performance is due to the combined effects of the high-kappa TiLaO dielectric, a high work-function Ir electrode, and large conduction band offset.     

Low-temperature fabrication of amorphous BaTiO3thin-film bypass capacitors

Amorphous BaTiO₃ thin-film capacitors suitable for integration into a multichip module packaging process were fabricated. The multilayer capacitor structure consisted of an adhesion layer (TiO _xN_y or Ti), a bottom electrode (Cu), a dielectric (amorphous BaTiO₃), and a top electrode (Cu). A 3000-Å amorphous BaTiO₃ film was deposited onto the electrode by the reactive partially ionized beam (RPIB) technique at near room temperature. After a 300°C postdeposition anneal, the capacitors had the following properties: ε_r=17-18 and tanδ<0.01 up to 600 MHz, J_leak=0.06-0.5 μA/cm² at 0.5 MV/cm, and breakdown field E_max=3.3 MV/cm     

Positive flatband voltage shift in MOS capacitors on n-type GaN

GaN MOS capacitors were fabricated using silicon dioxide deposited by low-pressure chemical vapor deposition oxide at 900°C. The MOS capacitor flatband voltage shift versus temperature was used to determine a pyroelectric charge coefficient of 3.7 × 10⁹ q/cm²-K, corresponding to a pyroelectric voltage coefficient of 7.0 × 10⁴ V/m-K     

Electrical characteristics of high quality La2O3 gate dielectric with equivalent oxide thickness of 5 Å

Electrical and reliability properties of ultrathin La₂O ₃ gate dielectric have been investigated. The measured capacitance of 33 Å La₂O₃ gate dielectric is 7.2 μF/cm² that gives an effective K value of 27 and an equivalent oxide thickness of 4.8 Å. Good dielectric integrity is evidenced from the low leakage current density of 0.06 A/cm² at -1 V, high effective breakdown field of 13.5 MV/cm, low interface-trap density of 3×10¹⁰ eV^-1/cm², and excellent reliability with more than 10 years lifetime even at 2 V bias. In addition to high K, these dielectric properties are very close to conventional thermal SiO₂      

High-κ Al2O3−HfTiO Nanolaminates With Less Than 0.8-nm Equivalent Oxide Thickness

High quality nanolaminate stacks consisting of five Al₂O₃-HfTiO layers with an effective dielectric constant of about 22.5 are reported. A dielectric constant for binary HfTiO thick films of about 83 was also demonstrated. The electrical characteristics of as-deposited structures and ones which were annealed in an O₂ atmosphere at up to 950 degC for 5-10 min were investigated. Two types of gate electrodes: Pt and Ti were compared. The dielectric stack which was annealed up to 500 degC exhibits a leakage current density as small as ~1times10^-4 A/cm² at an electric of field 1.5 MV/cm for a quantum-mechanical corrected equivalent oxide thickness of ~0.76 nm. These values change to ~1times10^-8 A/cm² and 1.82 nm, respectively, after annealing at 950 degC     

A high performance MIM capacitor using HfO2 dielectrics

Metal-insulator-metal (MIM) capacitors with a 56 nm thick HfO₂ high-κ dielectric film have been fabricated and demonstrated for the first of time with a low thermal budget (~200°C). Voltage linearity, temperature coefficients of capacitance, and electrical properties are all characterized. The results show that the HfO₂ MIM capacitor can provide a higher capacitance density than Si₃N₄ MIM capacitor while still maintaining comparable voltage and temperature coefficients of capacitance. In addition, a low leakage current of 2×10^-9 A/cm² at 3 V is achieved. All of these make the HfO ₂ MIM capacitor to be very suitable for use in silicon RF and mixed signal IC applications     

Pentacene-Based Thin-Film Transistors With a Solution-Process Hafnium Oxide Insulator

Pentacene-based organic thin-film transistors with solution-process hafnium oxide (HfOx) as gate insulating layer have been demonstrated. The solution-process HfOx could not only exhibit a high-permittivity (kappa = 11) dielectric constant but also has good dielectric strength. Moreover, the root-mean-square surface roughness and surface energy (gammas) on the surface of the HfOx layer were 1.304 nm and 34.24 mJ/cm², respectively. The smooth, as well as hydrophobic, surface of HfOx could facilitate the direct deposition of the pentacene film without an additional polymer treatment layer, leading to a high field-effect mobility of 3.8 cm²/(V middots) .     

High-quality MNS capacitors prepared by jet vapor deposition atroom temperature

The properties of metal-nitride-Si (MNS) capacitors in which the silicon nitride layer is produced by the jet vapor deposition (JVD) technique at room temperature are reported. Despite the room-temperature deposition, the electrical properties of these devices are far better than any previously reported MNS capacitors. Especially remarkable is the low density of interface traps (D_it<5×10¹⁰ /cm²-eV near midgap). In addition, these MNS capacitors are highly resistant to damage caused by hot electrons and ionizing radiation     

Turn-off operation of a MOS-gate 2.6 kV 4H–SiC gate turn-off thyristor

The turn-off operation of a 4H–SiC gate turn-off thyristor (GTO) with 2.6 kV breakover voltage has been investigated using an external Si-MOSFET as a gate-to-emitter shunt (MOS-gate mode), in the temperature interval 293–496 K. The maximum cathode current density j_cmax that can be turned off in such a mode decreases from 1850 A/cm² at 400 K to 700 A/cm² at 496 K. The room temperature j_cmax value is estimated to be about 3700 A/cm². The above j_cmax values are essentially higher than those observed when turning this thyristor off in the conventional GTO mode. Turn-off transients in the MOS-gate mode have been studied in both quasi-static and pulse regimes. Temperature dependencies of the turn-on and turn-off times, as well as those of the turn-on and turn-off energy losses have been measured. The upper switching frequency of the GTO is estimated to be about 700 kHz.     

High Density and Low Leakage Current in $ hbox{TiO}_{2}$ MIM Capacitors Processed at 300 $^{circ} hbox{C}$

We report Ir/TiO₂/TaN metal-insulator-metal capacitors processed at only 300degC, which show a capacitance density of 28 fF/mum² and a leakage current of 3 times 10^-8 (25degC) or 6 times 10^-7 (125degC) A/cm² at -1 V. This performance is due to the combined effects of 300degC nanocrystallized high-kappa TiO₂, a high conduction band offset, and high work-function upper electrode. These devices show potential for integration in future very-large-scale-integration technologies.     

ZnO–ZnMgO Multiple Quantum-Well Ridge Waveguide Lasers

ZnO-ZnMgO multiple quantum-well (MQW) thin-film waveguides with ridge structures have been fabricated on quartz substrates. Low-temperature deposition of high-quality ZnO-ZnMgO MQW thin films was achieved by filtered cathodic vacuum arc technique. A ridge is defined on the thin film by plasma etching. Room-temperature lasing with a peak wavelength at 378 nm of 1.5-nm well width was observed under 355-nm optical excitation. Exciton-exciton scattering was attributed to the amplified spontaneous emission observed from the MQW waveguide. The net optical gain can be larger than 80 cm^-1 at a pump intensity of 2 MW/cm² .     

Studies of yttrium oxide films prepared by RF magnetron sputtering

Films of yttrium oxide (Y₂O₃) were deposited on Si substrates from a Y₂O₃ target by RF magnetron sputtering. MIS capacitors in the form of Al and Y₂O₃ (400 Å)-Si were then fabricated. The leakage current density was about 10^-6 A/cm² at 1.3×10⁶ V/cm, and the breakdown field of the films was about 2.75×10⁶ V/cm. The dielectric constant of the sputtered Y₂O₃ was found to be about 12-12.7