光源掩模协同优化的原理与应用

当半导体技术节点缩小至14 nm及以下时,光刻技术也逐渐接近了其物理极限.光源掩模协同优化(SMO)作为一种新型的分辨率增强技术,能够显著提升极限尺寸下半导体光刻的重叠工艺窗口,有效延伸当前常规光刻技术的生存周期.综述了SMO这一技术,分析了SMO的原理,介绍了该技术的发展和在半导体制造工艺中的应用,重点探讨了其在先进光刻节点研发中的应用,并对其挑战和发展趋势进行了展望,认为SMO不仅是193 nm浸润式光刻技术的重要组成部分,也将是EUV光刻中必不可少的一种技术.     

掩模材料与新颖的衬底方案关键问题及新的良机

通过对掩模衬底材料和掩模加工工艺利用硬性分界条件可满足45nm及以下技术节点的掩模要求。此外类似于折射指数、平整度、成分、均匀性和应力等衬底材料的固有特性严重地影响到掩模加工性能和光刻性能。评述了45nm及以下技术节点对空白材料,掩模及晶片层面的要求。指出了对于关键问题及出现的问题的可仿效实施的方法,最后研究了集成用于高效光掩模工厂的掩模材料的实际情况分析。     

X-ray lithography-an overview

The fundamentals of X-ray lithography are reviewed. Issues associated with resolution, wafer throughput, and process latitude are discussed. X-ray lithography is compared with other lithographic technologies; future advancements, such as X-ray projection lithography, are described. It is shown that the major barrier to the near-term success for X-ray lithography is the requirement for a defect-free one-to-one mask which satisfies the stringent image-placement needs of submicrometer patterning     

Microlens lithography: A new approach for large display fabrication

Microlens lithography is a new lithographic method, that uses microlens arrays to image a lithographic mask onto a substrate layer. Microlens lithography provides photolithography at a moderate resolution for an almost unlimited area. The imaging system consists of stacked microlens arrays forming an array of micro-objectives. Each micro-objective images a small part of the mask pattern, the images overlap in the image plane. Potential applications for microlens lithography are the fabrication of large area flat panel displays (FPD), color filters, and micromechanics.     

凸球面网栅激光直写技术

为了满足凹球面光刻所需的曲面网栅掩模的需求,建立了凸球面激光直接写入系统用于制作曲面网栅掩模。该系统目前支持最高20的基片倾斜,结合加工时的曝光量修正算法,在口径为50 mm、曲率半径为51.64 mm的凸球面基底上制作了矩形网栅图案,并结合双摆台联动在凸面上制作同心圆环图案。实验结果表明,现有凸球面直写系统初步具备加工凸面网栅掩模的能力,为后续的曲面掩模光刻打下坚实基础。     

一种用于降低版图复杂度的新的反向光刻算法

随着光刻系统被驱动用来生产65nm以下的器件时,反向光刻技术（ILT）的应用前景变得越来越广阔。不过,采用反向光刻技术得到的版图通常很难制造,限制了反向光刻技术的使用领域。在这篇文章里提出了一个新的复杂度惩罚项,文章里面称为全局小波惩罚项。通过在版图上进行了四个独特的小波变换,之后选择了一个版图高频成分含量最高的方向作为优化的小波变换方向,全局小波惩罚项对于版图的高频分量能进行更加深入的分析。在这之后,文章中提出了一个新的基于梯度法的反向光刻算法,新算法里面通过将全局小波惩罚项作为它的第一阶段复杂度惩罚项,能更好的降低版图复杂度。实验证明,基于90nm的光学条件和三个典型的65nm的flash阵列版图,相比于采用文章中称为局部小波惩罚项作为复杂度惩罚项的梯度算法,新算法得到的三个版图结果,总的顶点数目分别下降了12.89%,12.63%和12.64%,与此同时精确度保持在同一个水平上。     

Cost-effective integration of an FN-programmed embedded flash memory into a 0.25 μm SiGe:C RF-BiCMOS technology

 This paper presents a process technology for cost-effective integration of low-power flash memories into a 0.25 μm, high performance SiGe:C RF-BiCMOS process. Only four additional lithographic steps are used on top of the baseline BiCMOS process, leading to in total 23 mask levels for the BiCMOS/embedded flash process. Uniform-channel Fowler-Nordheim programmable and erasable stacked-gate cells, suitable for medium density (∼Mbit) memories, are demonstrated. Peripheral high-voltage transistors, with >10 V breakdown voltage, are integrated without additional mask steps on top of the flash cell integration. The flash memory integration is modular and has negligible impact on the original CMOS and HBT device parameters.     

一种应用于双面光刻机中的楔形误差补偿技术

楔形误差补偿技术是双面光刻机中的关键技术之一,它使基片表面和掩模电路图形表面形成2个平行平面,提供给对准工作台进行对准操作。对涉及该技术的气浮轴承设计、小孔截流技术、材料的选择、加工及处理等作了详细的论述。     

Survey on flash technology with specific attention to the critical process parameters related to manufacturing

In this paper, the history of flash processes will be presented, starting with the 1.2-/spl mu/m technology to the most current technology. The front- and back-end process modules will be reviewed taking into account the main impact on cell functionality and reliability. In particular, the lithographic and mask issues, the diffusion and cleaning process steps, the chemical mechanical planarization technique to improve planarization, and the high-energy and large-tilted implant will be covered. Finally, the process and equipment trends for the next-generation flash technology will be presented.     

The use of a silicon-gate C-MOS/SOS test vehicle to evaluate technology maturity

This paper describes a comprehensive test vehicle that has been used to characterize the silicon-gate C-MOS/SOS technology. Specifically, it has facilitated the verification of a set of topological layout rules and mask sequence which are producible industry-wide; the establishment of electrical design parameters; and has provided information on the present yield and performance range of the technology. In addition, structures included on the vehicle make it suitable for process development.     

一种采用双面对准的硅LIGA掩模制作研究

深Ｘ射线光刻是制作高深宽比ＭＥＭＳ结构的一个重要的方法。提出一种基于硅工艺和双面对准技术的ＬＩＧＡ掩模技术,工艺十分简单。采用该掩模,可进一步解决深Ｘ射线光刻中的重复对准多次曝光问题,给出了该掩模设计制作工艺过程及深Ｘ射线光刻结果,整个过程包括常常氮化夺、采用Ｋａｒｌ Ｓｕｓｓ双面对准曝光机进行ＵＶ光刻、电化学沉积金吸收体、体硅腐蚀形成支撑等。利用该掩模在北京ＢＥＰＣ的Ｘ射线光刻光束线上进行曝光。     

国际主流光刻机研发的最新进展

介绍了65 nm和45 nm节点国际主流光刻机的最新研发进展,重点分析了目前提高光刻机性能的关键技术,讨论了目前各公司的主流机型及其性能参数,最后简要介绍了下一代光刻技术的研究进展.     

Simplified ohmic and Schottky contact formation for field effecttransistors using the single layer integrated metal field effecttransistor (SLIMFET) process

A new III-V semiconductor device fabrication process for GaAs-based field effect transistors (FET) is presented which uses a single lithographic process and metal deposition step to form both the ohmic drain/source contacts and the Schottky gate contact concurrently. This single layer integrated metal FET (SLIMFET) process simplifies the fabrication process by eliminating an additional lithographic step for gate definition, a separate gate metallization step, and thermal annealing for ohmic contact formation. The SLIMFET process requires a FET structure which incorporates a compositionally graded In_xGa_1-xAs cap layer to form low resistance, nonalloyed ohmic contacts using standard Schottky metals. The SLIMFET process also uses a Si₃N₄ mask to provide selective removal of the InGaAs ohmic layers from the gate region prior to metallization without requiring an additional lithographic step. GaAs MESFET devices were fabricated using this new SLIMFET process which achieved DC and RF performance comparable to GaAs MESFET's fabricated by conventional methods     

电压调节模块转换控制技术

微处理技术的不断发展,要求供电电源输出电压降低、输出电流增大、动态响应速度加快,由于多采用分布式电源系统,经过二次DC/DC变换实现对微处理器等设备的供电,这对VRM电压调节模块的控制技术提出了新的要求。重点分析目前常用的VRM变换器拓扑结构和特点,针对不同供电结构要求,采用隔离或非隔离VRM的拓扑,并研究需要采取的控制技术对策和工程实现措施。     

Transparent and Reusable Nanostencil Lithography for Organic–Inorganic Hybrid Perovskite Nanodevices

Organic—inorganic hybrid perovskites have attracted considerable attention for developing novel optoelectronic devices owing to their excellent photoresponses. However, conventional nanolithography of hybrid perovskites remains a challenge because they undergo severe damage in standard lithographic solvents, which prohibits device miniaturization and integration. In this study, a novel transparent stencil nanolithography (t-SL) technique is developed based on focused ion beam (FIB)-assisted polyethylene terephthalate (PET) direct patterning. The proposed t-SL enables ultrahigh lithography resolution down to 100 nm and accurate stencil mask alignment. Moreover, the stencil mask can be reused more than ten times, which is cost-effective for device fabrication. By applying this lithographic technique to hybrid perovskites, a high-performance 2D hybrid perovskite heterostructure photodetector is fabricated. The responsivity and detectivity of the proposed heterostructure photodetector can reach up to 28.3 A W⁻¹ and 1.5 × 10¹³ Jones, respectively. This t-SL nanolithography technique based on FIB-assisted PET direct patterning can effectively support the miniaturization and integration of hybrid-perovskite-based electronic devices.     

Space-time profiles of shaped ultrafast optical waveforms

A derivation of the space-time profiles of ultrafast optical waveforms shaped by filtering of spatially separated frequency components is presented. Closed form expressions for the space-time impulse response functions are given for the cases of single and double passes through a pulse shaping apparatus. For a single pass and a short unshaped pulse, diffraction by the mask filter gives rise to a translational spatial shift in the desired electric field profile that varies linearly with time along the shaped waveform. This result is completely general, and applies to frequency-domain pulse shaping with either continuous or discrete mask filters. It is also shown that double passing the apparatus does not generally reverse this effect but rather introduces further space-time coupling such as a time-varying spotsize. Examples of specific mask patterns are presented and implications for the generation of high-fidelity shaped optical waveforms are discussed     

向生产价值的30nm光刻协合渐进

提出了对现代光刻设备性能数据和系统预先筹划和配置 ,并在此基础上讨论了对关键性能方面进一步开发的方法和模式 ,同时还讨论了关于这些模式性能的支持分析结果。     

工件台振动低敏感光刻系统协同优化方法

计算光刻是提高光刻成像性能的有效方法。但是，大多数计算光刻技术建立在理想光刻系统下而忽略了系统误差的影响。系统误差中的工件台振动会导致光刻图形误差增大和工艺窗口下降。因此，必须要降低工件台振动对光刻性能的影响。建立了一种对工件台振动低敏感的光刻系统协同优化方法。首先利用Zernike多项式表征光源来降低算法计算量并提高光源优化自由度。然后创建一项涵盖工件台振动影响的综合评价函数。最后采用基于梯度的统计优化算法建立优化流程。14 nm节点一维掩模图形仿真表明极端工件台振动下，该方法的特征尺寸误差降低28.7%，工艺窗口增大67.3%。结果证明该方法可以有效降低工件台振动敏感度并提高光刻工艺稳定性。     

实时频谱分析技术在雷达信号侦察中的应用

复杂电磁环境下,信号侦察系统需要宽带的信号采集和处理能力、高截获概率和快速准确的分析能力。数字化雷达侦察宽带接收机中采用实时频谱分析技术可以提高设备对信号的捕获能力和观察能力,是一种非常有应用前景的新技术。本文首先研究了实时频谱分析技术的基本原理及其两个关键技术——频率模板匹配技术和数字荧光技术,然后提出了经过频率模板匹配处理后基于数字荧光技术生成的频谱积累图进行信号检测的处理方法,并定性分析了在接收频段上存在单信号、双信号及多信号等不同情况下该方法的处理性能。对双信号和多信号情况,根据信号位置按照分离、交叉和包含三种情况进行了分析。最后给出了相应的仿真验证,假定频段上存在三个宽带信号,其中一个信号在频率模板的模板区,另外两个信号不在,对3种能分离的情况在5dB、10dB、15dB、20dB的不同信噪比下各作了100次试验,并对试验结果进行了分析。仿真结果表明,采用文中提出的处理方法,能够有效的分析处理在同一时间段内存在的多个不同信号,从而提高了雷达侦察接收机的性能。      

适用于阵列波导光栅制作的厚SiO_2陡直刻蚀技术

采用ICP- 98型高密度等离子体刻蚀机进行了厚Si O2 陡直刻蚀技术的研究,利用双层掩膜技术解决了“微掩膜现象”问题,刻蚀获得12 .4 μm的陡直Si O2 光波导剖面,并将这一刻蚀技术用于阵列波导光栅的制作中.