Deadline and activation time assignment for partitioned real-time application on multiprocessor reservations

Providing temporal isolation between critical activities has been an important design criterion in real-time open systems, which can be achieved using resource reservation techniques. As an abstraction of reservation servers, virtual processor is often used to represent a portion of computing power available on a physical platform while hiding the implementation details. In this paper, we present a general framework of partitioning an application comprised of hard real-time tasks with precedence constraints onto multiple virtual processors in consideration of communication latencies between tasks. A novel method is proposed for assigning deadlines and activation times to tasks such that tasks partitioned onto different virtual processors can be analyzed separately using well-established theories for uniprocessor. Extensive simulations have been performed and the results have shown that, compared to existing algorithms, the proposed method achieves better performance in terms of minimizing both total bandwidth and the maximum individual bandwidth.     

UM-RTCOM: An analyzable component model for real-time distributed systems

Component-based development is a key technology in the development of software for modern real-time systems. However, standard component models and tools are not suitable for this type of system, since they do not explicitly address real time, memory or cost constraints. This paper presents a new predictable component model for real-time systems (UM-RTCOM) together with a set of tools to support it. The environment allows new components to be developed which can then be assembled to build complete applications, including hardware interaction. The model includes support for real-time analysis at the component and application level. The analysis is achieved by combining component meta-information in the form of an abstract behaviour model and a method to measure worst-case execution times in the final platform. Additionally, we propose an implementation model based on RT-CORBA where the developer uses the UM-RTCOM components and a set of tools to map these elements to elements of the desired platform. In order to apply our proposals, we have used the model and tools in real applications specifically in the context of nuclear power plant simulators.     

Optimal online multiprocessor scheduling of sporadic real-time tasks is impossible

Optimal online scheduling algorithms are known for sporadic task systems scheduled upon a single processor. Additionally, optimal online scheduling algorithms are also known for restricted subclasses of sporadic task systems upon an identical multiprocessor platform. The research reported in this article addresses the question of existence of optimal online multiprocessor scheduling algorithms for general sporadic task systems. Our main result is a proof of the impossibility of optimal online scheduling for sporadic task systems upon a system comprised of two or more processors. The result is shown by finding a sporadic task system that is feasible on a multiprocessor platform that cannot be correctly scheduled by any possible online, deterministic scheduling algorithm. Since the sporadic task model is a subclass of many more general real-time task models, the nonexistence of optimal scheduling algorithms for the sporadic task systems implies nonexistence for any model which generalizes the sporadic task model.     

面向网络处理器的软件组件框架研究

网络处理器通常由多个异构的处理和内存单元通过片上网络连接构成,其目标应用需要在Gbit/s到几十Gbit/s的网络环境中以线速处理数据包。基于网络处理器的应用有实时、资源受限和异构的特点。组件技术对于复杂的嵌入式系统是一种十分有前途的方法。本文以一种典型的网络处理器为例,说明了在基于网络处理器的系统中应用组件技术时,对组件框架的要求,讨论了组件组合框架和运行时框架,并定义了组件框架服务。利用提出的组件框架,可以实现软件性能工程。     

A comprehensive engineering framework for guaranteeing component compatibility

Despite advances in software engineering methods and tools, understanding what software components do and ensuring that they work well together remains difficult. This is chiefly due to the lack of support for specifying component interfaces and software compositions formally. Due to these shortcomings, composed systems are subject to incompatibility errors, and software developers struggle to retrieve and understand relevant reusable entities. Constructs recently added to the Unified Modeling Language (UML) supported by validation tools can detect and solve behavioural incompatibility issues, while integrated support for characterisation using ontological techniques can describe what a component does. This paper presents a comprehensive software engineering framework that supports software composition at design time and runtime with compatibility guarantees. Our main contributions are (a) a model-driven development approach that combines UML modelling and ontology techniques for the specification of component properties, their validation and their transformation to code, (b) a middleware platform that supports component discovery, compatibility checking and deployment. Following the proposed approach gives benefits for software engineering, in particular in settings where multiple stakeholders are involved.     

A co-simulation framework for design of time-triggered automotive cyber physical systems

Designing cyber-physical systems (CPS) is challenging due to the tight interactions between software, network/platform, and physical components. Automotive control system is a typical CPS example and often designed based on a time-triggered paradigm. In this paper, a co-simulation framework that considers interacting CPS components for assisting time-triggered automotive CPS design is proposed. Virtual prototyping of automotive vehicles is the core of this framework, which uses SystemC to model the cyber components and integrates CarSim to model the vehicle dynamics. A network/platform model in SystemC forms the backbone of the virtual prototyping. The network/platform model consists of processing elements abstracted by real-time operating systems, communication systems, sensors, and actuators. The framework is also integrated with a model-based design tool to enable rapid prototyping. The framework is validated by comparing simulation results with the results from a hardware-in-the-loop automotive simulator. The framework is also used for design space exploration (DSE).     

Virtual-address caches. Part 1: problems and solutions inuniprocessors

This survey exposes the problems related to virtual caches in the context of uniprocessor (Part 1) and multiprocessor (Part 2) systems. We review proposed solutions that have been implemented or proposed in different contexts. The idea is to catalog all solutions, past and present, and to identify technology trends and attractive future approaches. We first overview the relevant properties of virtual memory and of physical caches. To solve the virtual-to-physical address bottle-neck, processors may access caches directly with virtual addresses. This survey introduces the problems and discusses solutions in the context of single-processor systems     

Replication Management in Reliable Real-Time Systems

Building reliable real-time applications on top of commercial off-the-shelf (COTS) components is not a straightforward task. Thus, it is essential to provide a simple and transparent programming model, in order to abstract programmers from the low-level implementation details of distribution and replication. However, the recent trend for incorporating pre-emptive multitasking applications in reliable real-time systems inherently increases its complexity. It is therefore important to provide a transparent programming model, enabling pre-emptive multitasking applications to be implemented without resorting to simultaneously dealing with both system requirements and distribution and replication issues. The distributed embedded architecture using COTS components (DEAR-COTS) architecture has been previously proposed as an architecture to support real-time and reliable distributed computer-controlled systems (DCCS) using COTS components. Within the DEAR-COTS architecture, the hard real-time subsystem provides a framework for the development of reliable real-time applications, which are the core of DCCS applications. This paper presents the proposed framework, and demonstrates how it can be used to support the transparent replication of software components.     

Higher Order Software—A Methodology for Defining Software

The key to software reliability is to design, develop, and manage software with a formalized methodology which can be used by computer scientists and applications engineers to describe and communicate interfaces between systems. These interfaces include: software to software; software to other systems; software to management; as well as discipline to discipline within the complete software development process. The formal methodology of Higher Order Software (HOS), specifically aimed toward large-scale multiprogrammed/multiprocessor systems, is dedicated to systems reliability. With six axioms as the basis, a given system and all of its interfaces is defined as if it were one complete and consistent computable system. Some of the derived theorems provide for: reconfiguration of real-time multiprogrammed processes, communication between functions, and prevention of data and timing conflicts.     

Intel virtualization technology

A virtualized system includes a new layer of software, the virtual machine monitor. The VMM's principal role is to arbitrate accesses to the underlying physical host platform's resources so that multiple operating systems (which are guests of the VMM) can share them. The VMM presents to each guest OS a set of virtual platform interfaces that constitute a virtual machine (VM). Once confined to specialized, proprietary, high-end server and mainframe systems, virtualization is now becoming more broadly available and is supported in off-the-shelf systems based on Intel architecture (IA) hardware. This development is due in part to the steady performance improvements of IA-based systems, which mitigates traditional virtualization performance overheads. Intel virtualization technology provides hardware support for processor virtualization, enabling simplifications of virtual machine monitor software. Resulting VMMs can support a wider range of legacy and future operating systems while maintaining high performance.     

The Non-preemptive Scheduling of Periodic Tasks upon Multiprocessors

The non-preemptive scheduling of periodic task systems upon processing platforms comprised of several identical processors is considered. The exact problem has previously been proven intractable even upon single processors; sufficient conditions are presented here for determining whether a given periodic task system will meet all deadlines if scheduled non-preemptively upon a multiprocessor platform using the earliest-deadline first scheduling algorithm. Supported in part by the National Science Foundation (Grant Nos. CCR-9988327 and ITR-0082866). Sanjoy Baruah is a professor of Computer Science at the University of North Carolina at Chapel Hill. He received his Ph.D. from the University of Texas at Austin in 1993. His research and teaching interests are in scheduling theory, real-time and safety-critical system design, and resource-allocation and sharing in distributed computing environments.     

Targeted processing for real-time embedded mechatronic systems

This paper describes the architecture and design framework for a multiprocessor system on chip (SoC) solution that is being developed for adaptive, high-performance, embedded real-time control applications. Most of the design-to-implementation stages are automated by software tools avoiding most of the error-prone programming tasks and hardware-related issues. Therefore, the work presented here minimises the interdisciplinary design efforts typical to mechatronic systems design, allowing control engineers to focus mainly on the control laws development. The performance achieved by the proposed architecture allows for a straightforward addressing of implementation requirements for a variety of embedded applications, including micro-electromechanical systems.     

嵌入式应用软件通用运行平台研究

介绍了一种嵌入武应用软件通用运行平台，给出了该运行平台的软件体系结构，设计和定义了为支持各种嵌入式应用软件跨平台运行和移植的“抽象操作系统服务接口”和“扩展操作系统服务接口”。其中的核心框架服务接口定义为应用组件，设备的自动装配、智能化管理提供了统一的运行环境，保证了嵌入式应用系统实现的独立性和一致性，提高了应用软件的移植性。     

Design,programming and orchestration of heterogeneous manufacturing systems through VR-powered remote collaboration

Modern manufacturing systems are often composed of a variety of highly customized units and specifically designed manufacturing cells. Optimization of assembly and training of staff requires a series of demo installations and excessive use of costly operational resources. In some cases, components are located at different sites, making the orchestration of the whole system even more difficult.Virtual Reality (VR) collaboration environments offer a solution by enabling high fidelity testing and training of complex manufacturing systems. On the other hand, such platforms are difficult to implement in an engineering perspective, as they are required to provide reliable, standard interfaces towards both robotic components and human operators.The VirCA (Virtual Collaboration Arena) platform is a software framework that supports various means of collaboration through the use of 3D augmented/virtual reality as a communication medium. VirCA offers functions for the high-level interoperability of heterogeneous components in a wide range of domains, spanning from research & development, through remote education to orchestration and management of industrial processes in manufacturing applications. This paper provides an overview of the industrial requirements behind high-fidelity virtual collaboration and demonstrates how the VirCA platform meets these requirements. Use cases are provided to illustrate the usability of the platform.     

Parallel scalable hardware implementation of asynchronous discrete particle swarm optimization

This paper presents a novel hardware framework of particle swarm optimization (PSO) for various kinds of discrete optimization problems based on the system-on-a-programmable-chip (SOPC) concept. PSO is a new optimization algorithm with a growing field of applications. Nevertheless, similar to the other evolutionary algorithms, PSO is generally a computationally intensive method which suffers from long execution time. Hence, it is difficult to use PSO in real-time applications in which reaching a proper solution in a limited time is essential. SOPC offers a platform to effectively design flexible systems with a high degree of complexity. A hardware pipelined PSO (PPSO) Core is applied with which the required computational operations of the algorithm are performed. Embedded processors have also been employed to evaluate the fitness values by running programmed software codes. Applying the subparticle method brings the benefit of full scalability to the framework and makes it independent of the particle length. Therefore, more complex and larger problems can be addressed without modifying the architecture of the framework. To speed up the computations, the optimization architecture is implemented on a single chip master–slave multiprocessor structure. Moreover, the asynchronous model of PSO gains parallel efficacy and provides an approach to update particles continuously. Five benchmarks are exploited to evaluate the effectiveness and robustness of the system. The results indicate a speed-up of up to 98 times over the software implementation in the elapsed computation time. Besides, the PPSO Core has been employed for neural network training in an SOPC-based embedded system which approves the system applicability for real-world applications.     

Agent-based reconfigurable architecture for real-time object tracking

Most conventional object tracking algorithms are implemented on general-purpose processors in software due to its great flexibility. However, the real-time performance is hard to achieve due to the inherent characteristics of the sequential processing of these processors. To tackle this issue, a reconfigurable system-on-chip (rSoC) platform with microprocessors and FPGAs is applied in this paper. To simplify the hardware/software interface, a Belief–Desire–Intention (BDI)-based multi-agent architecture is proposed as the unified framework. Then an agent-based task graph and two heuristic partitioning methods are proposed to partition the hardware and software on an rSoC platform. Compared to the module-based architecture, this BDI-based multi-agent architecture provides more efficiency, flexibility, autonomy, and scalability for the real-time tracking systems. A particle swarm optimization (PSO)-based object detection and tracking algorithm is applied to evaluate the proposed architecture. Extensive experimental results of object tracking demonstrate that the proposed architecture is efficient and highly robust with real-time performance.     

跨平台APEX接口组件的设计与实现

在航电软件开发、集成过程中,不同的操作系统平台提供了不同的操作系统接口,为解决应用程序没有统一的接口规范,从而导致的软件重用率低、软件设计复杂等问题,基于ARINC653标准的APEX接口在不同操作系统上设计并实现了一套统一的、跨操作系统平台的组件,并提供一套能够兼容ARINC653标准的应用软件开发框架。该跨平台APEX接口组件为应用层提供了统一的API接口,解除了应用软件对操作系统的依赖性,实现了应用软件与平台软件的隔离,保证了应用软件在不同操作系统上的快速移植。     

Distributed embedded smart cameras for surveillance applications

Recent advances in computing, communication, and sensor technology are pushing the development of many new applications. This trend is especially evident in pervasive computing, sensor networks, and embedded systems. Smart cameras, one example of this innovation, are equipped with a high-performance onboard computing and communication infrastructure, combining video sensing, processing, and communications in a single embedded device. By providing access to many views through cooperation among individual cameras, networks of embedded cameras can potentially support more complex and challenging applications - including smart rooms, surveillance, tracking, and motion analysis - than a single camera. We designed our smart camera as a fully embedded system, focusing on power consumption, QoS management, and limited resources. The camera is a scalable, embedded, high-performance, multiprocessor platform consisting of a network processor and a variable number of digital signal processors (DSPs). Using the implemented software framework, our embedded cameras offer system-level services such as dynamic load distribution and task reconfiguration. In addition, we combined several smart cameras to form a distributed embedded surveillance system that supports cooperation and communication among cameras.