共查询到20条相似文献,搜索用时 15 毫秒
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WUYing OUYi-hong JIANGYong-qing LIBin 《半导体光子学与技术》2003,9(4):226-229
Silicon deep etching technique is the key tabrication step in the development of MEMS. The mask selectivity and the lateral etching control are the two primary factors that decide the result of deep etching process. These two factors are studied in this paper. The experimental results show that the higher selectivity can be gotten when F- gas is used as etching gas and A1 is introduced as mask layer. The lateral etching problems can be solved by adjusting the etching condition, such as increasing the RF power, changing the gas composition and flow volume of etching machine. 相似文献
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Micro-electro-mechanic-system (MEMS) devices on flexible substrate are important for non-planar and non-rigid surface applications. In this paper, a novel and cost-effective fabrication process for an 8 × 8 MEMS temperature sensor array with a lateral dimension of 2.5 mm × 5.5 mm on a polyimide flexible substrate is developed. A 40 μm thick polyimide substrate is formed on a rigid silicon wafer using as a mechanical carrier throughout the fabrication by four successive spin coating liquid polyimide. The arrayed temperature sensing elements made of 1200 Å sputtered platinum thin film on polyimide substrate show excellent linearity with a temperature coefficient of resistance of 0.0028/°C. The purposed sensor obtains a high sensitivity of 0.781 Ω/°C at 8 mA at constant drive current. Because of the low heat capacity and excellent thermal isolation, the temperature sensing element shows excellent high sensitivity and a fast thermal response. The finished devices are flexible enough to be folded and twisted achieving any desired shape and form. Employing spin-coated liquid polyimide substrate instead of solid polyimide sheet minimizes the thermal cycling as well as improves the production yield. This fabrication technique first introduces the spin-coated PDMS (Polydimethylsiloxane) interlayer between the silicon carrier and the polyimide substrate and makes the polyimide-based devices separate much easier and greatly simplifies the fabrication process with a high production yield. A non-successive two-stage cure procedure for the polyimide precursor is developed to meet low-temperature requirement of the PDMS interlayer. The fabrication procedure developed in this research is compatible with conventional MEMS technology through an optimized integration process. The novel flexible MEMS technology can benefit the development of other new flexible polyimide-based devices. 相似文献
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This paper presents three-dimensional simulations of deep reactive ion etching processes, also known as Bosch processes. A Monte Carlo method, accelerated by ray tracing algorithms, is used to solve the transport equation, while advanced level set techniques are applied to describe the movement of the surface. With multiple level sets it is possible to describe accurately the different material layers which are involved in the process. All used algorithms are optimized in such a way, that the costs of computation time and memory scale more like with the surface size rather than with the size of the simulation domain. Finally the presented simulation techniques are used to simulate the etching of holes, whereas the influence of passivation/etching cycle times and hole diameters on the final profile is investigated. 相似文献
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Alexander Vladimirov Grigorov 《Microelectronic Engineering》2008,85(11):2290-2298
This paper reports a simple and novel process that allows the fabrication of suspended channel MEMS devices. Two basic types of suspended structures were fabricated using the new process, and a possible functionalization mechanism for bio-analytical detection and sensing using spotting and capillary action was successfully tested.Possible uses of the fabricated structures are described, as specific existing types of biochemical MEMS sensors. 相似文献
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高慧莹 《电子工业专用设备》2011,40(10):19-23
CMP在MEMS的多晶硅表面的微机械加工过程中起着至关重要的作用。为了更详细的了解CMP在MEMS加工中的应用,从MEMS的发展,工艺流程、CMP在MEMS制造中的不足以及我国CMP在MEMS制造中的发展现状等方面进行了论述。 相似文献
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随着红外探测技术的不断发展,市场对红外探测器提出了越来越多的要求,如高分辨率、高工作稳定性、低成本、小型化等,红外探测器光敏芯片的制备技术随之向大面阵、小间距方向不断探索。基于市场需求,本文从技术发展的角度,研究采用离子注入技术、干法刻蚀技术制备台面结型焦平面阵列,实现高性能、窄间距、小型化光敏芯片的制备,为未来高分辨率芯片的制备奠定技术基础。文章介绍了128×128(15μm)、128×128(10μm)两款器件的制备,两款器件中测I-V性能良好,其中,128×128(15μm)器件杜瓦封装组件后性能表现良好。 相似文献
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Embedded benzocyclobutene in silicon: An integrated fabrication process for electrical and thermal isolation in MEMS 总被引:1,自引:0,他引:1
Alireza Modafe 《Microelectronic Engineering》2005,82(2):154-167
This paper reports a novel fabrication process to develop planarized isolated islands of benzocyclobutene (BCB) polymer embedded in a silicon substrate. Embedded BCB in silicon (EBiS) can be used as an alternative to silicon dioxide in fabrication of electrostatic micromotors, microgenerators, and other microelectromechanical devices. EBiS takes advantage of the low dielectric constant and thermal conductivity of BCB polymers to develop electrical and thermal isolation integrated in silicon. The process involves conventional microfabrication techniques such as photolithography, deep reactive ion etching, and chemical mechanical planarization (CMP). We have characterized CMP of BCB polymers in detail since CMP is a key step in EBiS process. Atomic force microscopy (AFM) and elipsometry of blanket BCB films before and after CMP show that higher polishing down force pressure and speed lead to higher removal rate at the expense of higher surface roughness, non-uniformity, and scratch density. This is expected since BCB is a softer material compared to inorganic films such as silicon dioxide. We have observed that as the cure temperature of BCB increases beyond 200 °C, the CMP removal rate decreases drastically. The results from optical microscopy, scanning electron microscopy, and optical profilometry show excellent planarized surfaces on the EBiS islands. An average step height reduction of more than 95% was achieved after two BCB deposition and three CMP steps. 相似文献
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Y.X. Li M. Laros P.M. Sarro P.J. French R.F. Wolffenbuttel 《Microelectronic Engineering》1993,20(4):321-328
An in situ two-step process has been developed for plasma etching of poly-Si/silicon nitride/poly-Si sandwich structures for a surface micromachined tactile sensor. The first step of the process uses a CF4-based gas mixture to etch the upper poly-Si layer and the second uses a CHF3-based gas mixture to etch the silicon nitride with an etching selectivity of three over the lower poly-Si layer. Both the upper poly-Si and the silicon nitride of the sandwich structure can be etched with the same photoresist mask, while the lower poly-Si layer remains relatively un-etched. Compared with a one-step process which uses the same chemistry as in step one of the two-step process, the two-step process provides the desired etch selectivity, better uniformity and process tolerance. 相似文献
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In this work, we report the preparation of phospho-silicate-glass (PSG) films using RF magnetron sputtering process and its application as a sacrificial layer in surface micromachining technology. For this purpose, a 76 mm diameter target of phosphorus-doped silicon dioxide was prepared by conventional solid-state reaction route using P2O5 and SiO2 powders. The PSG films were deposited in a RF (13.56 MHz) magnetron sputtering system at 200-300 W RF power, 10-20 mTorr pressure and 45 mm target-to-substrate spacing without external substrate heating. To confirm the presence of phosphorus in the deposited films, hot-probe test and sheet resistance measurements were performed on silicon wafers following deposition of PSG film and a drive-in step. As a final confirmatory test, a p-n diode was fabricated in a p-type Si wafer using the deposited film as a source of phosphorus diffusion. The phosphorus concentration in the target and the deposited film were analyzed using energy dispersive X-rays (EDAX) tool. The etch rate of the PSG film in buffered HF was measured to be about 30 times higher as compared to that of thermally grown SiO2 films. The application of RF sputtered PSG film as sacrificial layer in surface micromachining technology has been explored. To demonstrate the compatibility with MEMS process, micro-cantilevers and micro-bridges of silicon nitride were fabricated using RF sputtered PSG as a sacrificial layer in surface micromachining. It is envisaged that the lower deposition temperature in RF sputtering (<150 °C) compared to CVD process for PSG film preparation is advantageous, particularly for making MEMS on temperature sensitive substrates. 相似文献
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Sherif Sedky 《Microelectronic Engineering》2007,84(11):2491-2500
This work gives an overview of the different developments for silicon germanium (Si1−xGex) from a MEMS post-processing perspective. First, the maximum processing temperature that does not introduce any damage or degradation into the standard characteristics of the CMOS driving electronics is specified. Then, the optimal type of silicon and germanium gas sources and deposition technique that results in an economical process are identified. Next, the selection criteria for a low thermal budget doping method and doping species are discussed. Finally, the advantage and disadvantage for the different approaches implemented for enhancing the physical properties of poly Si1−xGex at a CMOS backend compatible temperature are highlighted. It is shown that the optimal method depends on the application requirements and the CMOS technology used for realizing the driving electronics. 相似文献
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A simple, high yield, method for the fabrication of sharp silicon tips is described. A triangular etch mask design is used to ensure that the tip forms with a single point. An anisotropic wet etch gives rise to a tip that continues to “self-sharpen” after the etch mask is released. The tip geometry comprises three converging {1 1 3} planes towards the apex with {3 1 3} planes forming at the base. The apex of each tip typically has a radius of curvature of <5 nm, which can be reduced to <2 nm by a subsequent oxide sharpening process. Tips of this kind have been successfully integrated into the fabrication of atomic force microscopy probes. 相似文献
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针对深反应离子刻蚀(DRIE)工艺加工高深宽比梳齿电容存在侧壁倾斜角的情况,分析了该倾斜角对梳齿谐振器频率的影响。为了使设计的梳齿谐振器频率符合应用要求,推导出了梳齿谐振器在正负侧壁倾斜角θ下的谐振频率计算公式。利用ANSYS Workbench11.0平台,分别对侧壁倾斜角为0°,0.2°,0.35°和0.5°的情形进行了有限元建模与模态仿真。仿真结果表明:随着正倾斜角的增大,谐振频率减小;负倾斜角增大时,谐振频率增大,且一阶模态振形的平稳程度越差。比较数值仿真结果与考虑了正负倾斜角误差的梳齿谐振器谐振频率计算公式计算结果对比,吻合较好。 相似文献
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