Specification and Standardization of a Java Trusted Computing API

The paradigm of Trusted Computing promises a new approach to improve the security of computer systems. The core functionality, based on a hardware component known as Trusted Platform Module, is integrated into commodity hardware. However, operating system integration and application software support remains limited at present. In particular, for Java, the most widely used platform‐independent computing environment, there is currently no generally accepted Trusted Computing API. In this article, we describe the design of a high‐level API for Trusted Computing. We report on the current state of the Trusted Computing Group's software architecture and on previous approaches targeting Java. We derive our requirements and design goals and describe a novel API design. We report on our transparent approach to standardization in the Java Community Process. The result of this effort is the API we propose in the Java Specification Request 321. In this work, we not only present the design of this new API but also discuss implementation and testing strategies. Copyright © 2011 John Wiley & Sons, Ltd.     

基于ARM的嵌入式移动机器人控制系统的设计

讨论了基于S3C2410微处理器的移动机器人小车控制系统的硬件设计,以及在嵌入式操作系统Windows CE下的软件设计.具体分析了各个模块的设计原理、驱动和应用软件的设计.该移动机器人系统具有模块化、易扩展、可移植、硬件体积小、功耗低、实时性强、可靠性高等优点.     

PCI总线系统中基于USB的数据采集系统设计

USB总线(通用串行总线)快速可靠，便捷易用，是一种理想的数据传输方法。介绍了一种在PCI总线系统中利用软硬件相结合的方式采集并通过USB实时什榆数据的方法，从采集系统的工作原理和硬件、软件的实现方法等方面对采集系统的设计进行了说明，着重介绍了USB设备及主机软件的设计方法。     

MobileFBP: Designing portable reconfigurable applications for heterogeneous systems

Power-efficiency has been a key issue for today’s application and system design, ranging from embedded systems to data centers. While application-specific designs and optimizations may improve the power efficiency, it requires significant efforts to co-design the hardware and software, which are difficult to re-use. On the hardware front, the trend of heterogeneous computing enables custom designs for specific applications by integrating different types of processors and reconfigurable hardware to handle compute-intensive tasks. However, what is still missing is an elegant application framework, i.e., a programming environment and a runtime system, to develop portable applications which can offload tasks or be reconfigured dynamically to run on a variety of systems efficiently.Our ongoing work, MobileFBP, provides an application framework which aims to support heterogeneous and reconfigurable systems. Using the framework, the developers build portable applications with a dataflow programming paradigm, and the MobileFBP runtime system dynamically schedules the task components to run on available computing resources locally or remotely based on the application profiles. We hope that this ability produces high-level portable applications and reduces the efforts and skills needed for the developers to optimize their applications on a range of systems. This paper describes this work and presents our preliminary results.     

Zynq异构多核的无线电信号采集终端系统设计

针对无线电管理部门大规模信号监测的应用需求,设计了一种基于异构多核 Zynq-7000的嵌入式无线电信号采集监测系统.该系统在硬件上采用了射频捷变收发器AD9361作为接收前端,Zynq-7000作为处理核心;在软件上实现了 NEON和 VFP的硬件加速,以 QT为框架开发了用户显示界面.在详细阐述该终端在硬件逻辑设计、嵌入式设计和应用软件设计的基础上,通过试验展示了其所具有的数据采集、频谱监测和数据可视化等功能.这为轻便、灵巧、低成本、便携式无线电信号监测系统的研发提供了重要参考.     

FPGA based hardware acceleration for elliptic curve public key cryptosystems

This paper addresses public key cryptosystems based on elliptic curves, which are aimed to high-performance digital signature schemes. Elliptic curve algorithms are characterized by the fact that one can work with considerably shorter keys compared to the RSA approach at the same level of security. A general and highly efficient method for mapping the most time-critical operations to a configurable co-processor is proposed. By means of real-time measurements the resulting performance values are compared to previously published state of the art hardware implementations.

A generator based approach is advocated for that purpose which supports application specific co-processor configurations in a flexible and straight forward way. Such a configurable CryptoProcessor has been integrated into a Java-based digital signature environment resulting in a considerable increase of its performance. The outlined approach combines in an unique way the advantages of mapping functionality to either hardware or software and it results in high-speed cryptosystems which are both portable and easy to update according to future security requirements.     

基于DSP的有源电力滤波器控制系统设计

首先介绍了基于DSP的全数字化电压并联型三相有源电力滤波器控制系统的研制,该平台的核心数字处理芯片为TMS320LF2407;补偿指令电流的检测算法为ip、iq运算法;使用间接三角波比较法的电流控制方案。并详细阐述了该平台的硬件接口和软件设计。     

USB芯片CH375在电能测量仪系统中的应用

本文主要对USB375的性能特点和工作原理以及在电能测量系统中的应用,包括与CPU的硬件接口、软件设计等方面进行了论述。该系统能够实现与上位机或各种移动设备进行数据高速传输和存储。     

基于HMC5883的电子罗盘设计

针对低功耗的手持导航应用,提出了一种基于数字磁阻传感器和MEMS加速度计的小型低功耗电子罗盘设计方案.介绍了电子罗盘工作原理、硬件设计及软件算法,并在分析磁性物质影响的基础上提出了合理可行的矫正方法.实验表明,该电子罗盘能准确测量罗盘朝向,并且功耗低、运行稳定,具有倾斜补偿及校正功能,可用于普通导航领域.     

便携式多功能检定仪设计

介绍了便携式多功能检定仪的软硬件系统设计原理,描述了检定仪的硬件系统组成结构和软件系统设计、实现,并对软件设计中的关键技术进行了详细的阐述.     

A bridging model for multi-core computing

Writing software for one parallel system is a feasible though arduous task. Reusing the substantial intellectual effort so expended for programming a second system has proved much more challenging. In sequential computing algorithms textbooks and portable software are resources that enable software systems to be written that are efficiently portable across changing hardware platforms. These resources are currently lacking in the area of multi-core architectures, where a programmer seeking high performance has no comparable opportunity to build on the intellectual efforts of others. In order to address this problem we propose a bridging model aimed at capturing the most basic resource parameters of multi-core architectures. We suggest that the considerable intellectual effort needed for designing efficient algorithms for such architectures may be most fruitfully expended in designing portable algorithms, once and for all, for such a bridging model. Portable algorithms would contain efficient designs for all reasonable combinations of the basic resource parameters and input sizes, and would form the basis for implementation or compilation for particular machines. Our Multi-BSP model is a multi-level model that has explicit parameters for processor numbers, memory/cache sizes, communication costs, and synchronization costs. The lowest level corresponds to shared memory or the PRAM, acknowledging the relevance of that model for whatever limitations on memory and processor numbers it may be efficacious to emulate it. We propose parameter-aware portable algorithms that run efficiently on all relevant architectures with any number of levels and any combination of parameters. For these algorithms we define a parameter-free notion of optimality. We show that for several fundamental problems, including standard matrix multiplication, the Fast Fourier Transform, and comparison sorting, there exist optimal portable algorithms in that sense, for all combinations of machine parameters. Thus some algorithmic generality and elegance can be found in this many parameter setting.     

一种新型便携式缆索张力测定仪的设计与实现

介绍了一种基于PCMCIA接口的便携式缆索张力测定仪的设计。硬件部分主要介绍了系统组成和PCMCIA数采卡的技术特性,软件部分介绍了基于LabWindows/CVI7.0的虚拟测试仪器设计过程。     

A model for availability analysis of distributed software/hardware systems

System availability is a major performance concern in distributed systems design and analysis. A typical kind of application on distributed systems has a homogeneously distributed software/hardware structure. That is, identical copies of distributed application software run on the same type of computers. In this paper, the system availability for this type of system is studied. Such a study is useful when studying optimal testing time or testing resource allocation. We consider both the case of simple two-host system, and also the more general case of multi-host system. A Markov model is developed and equations are derived to obtain the steady-state availability. Both software and hardware failures are considered, assuming that software faults are constantly being identified and removed upon a failure. Although a specific model for software reliability is used for illustration, the approach is a general one. Comparisons show that system availability changes in a similar way to single-host based software/hardware systems. Sensitivity analysis is also presented. In addition, the assumptions used in this paper are discussed.     

便携式自动测试系统(ATS)的研究与设计

自动测试系统(ATS)已广泛应用于各种武器装备的维护和保障领域,为满足部队导弹测试系统自动化、小型化需求,研究设计了一种基于PXI总线技术的便携式ATS,介绍了硬件平台的总体构成、适配器接口设计以及软件架构与功能.经验证,采用该方法研制的便携式ATS与传统的ATS相比,不仅具有更高的性价比,而且在使用上更加机动,可维护...     

基于Nios II的便携式数字化谱仪研究

提出了基于Altera Nios Ⅱ软核处理器进行便携式数字化谱仪设计思路.在FPGA中进行Nios Ⅱ处理器核、UART、FIFO以及ADC控制等数字逻辑设计,结合数据采集控制、图形显示和通信等软件功能模块,给出了由FPGA、ADC采集单元和串口工业触摸屏组成的便携式谱仪硬件平台.系统测试结果验证了所提出技术方案应用于CdZnTe (CZT)便携式数字化谱仪开发的可行性.     

Software engineering and computational physics

The paper gives first a survey of the development of computational physics in the general context of computer science. Then new methods of software engineering, artificial intelligence and functional languages are presented on examples with respect to applications in physics. It concludes with some speculations about the future of computational physics especially regarding the lectures at the 6th Summer School on Computing Techniques in Physics.     

基于CPCI总线的嵌入式计算机通用接口设计

针对基于CPCI总线的嵌入式计算机设计中遇到的底层驱动软件与具体硬件芯片相互关联的问题,开展了嵌入式计算机通用接口设计的研究.采用软件、硬件与现场可编程技术相互结合的设计方法,通过通用硬件接1:1电路设计、共享存储区设计、通用函数设计,实现了基于CPCI总线的嵌入式计算机通用接口,并成功应用于具体的工程实践.     

Trustworthy ICs for secure embedded computing

The design of secure and trusted embedded systems has recently drawn enormous attention from system-design practitioners. A secure system is only as strong as the weakest link. Therefore, any security functions implemented in an embedded system must be considered in both hardware and software, at all design abstraction levels, in communications between components, and in the manufacturing phase. In addition, these implementations are subject to typical power, performance, and cost constraints of consumer embedded systems. This issue of IEEE Design & Test features a special issue on Design and Test of Integrated Circuits for Secure Embedded Computing.     

IA-64的并行架构及其寄存器文件

同时多线程能在同一时钟周期执行不同线程的指令,并且指令级并行和线程级并行。显式并行指令计算关注于编译器和硬件的相互协作。寄存器文件的设计在高性能处理器设计中十分重要,寄存器栈和寄存器栈引擎是提高其性能的重要手段。该文设计和实现一套并行环境,其中包括并行编译器OpenUH和基于IA-64的同时多线程体系结构EDSMT,实验表明,该并行架构适用于大多数并行应用,针对NAS的并行测试程序,该架构相对于SMTSIM平均有12.48%的性能提升。     

Deliberate Individual Change Framework for Understanding Programming Practices in four Oceanography Groups

Computing affects how scientific knowledge is constructed, verified, and validated. Rapid changes in hardware capability, and software flexibility, are coupled with a volatile tool and skill set, particularly in the interdisciplinary scientific contexts of oceanography. Existing research considers the role of scientists as both users and producers of code. We focus on how an intentional, individually-initiated but socially-situated, process of uptake influences code written by scientists. We present an 18-month interview and observation study of four oceanography teams, with a focus on ethnographic shadowing of individuals undertaking code work. Through qualitative analysis, we developed a framework of deliberate individual change, which builds upon prior work on programming practices in science through the lens of sociotechnical infrastructures. We use qualitative vignettes to illustrate how our theoretical framework helps to understand changing programming practices. Our findings suggest that scientists use and produce software in a way that deliberately mitigates the potential pitfalls of their programming practice. In particular, the object and method of visualization is subject to restraint intended to prevent accidental misuse.