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1.
光纤以太网网是指在光纤上运行以太网局域网(LAN)数据包接入服务的网络,底层连接可以以任何标准的以太网速度运行,包括10Mbit/s、100Mbit/s、1Gbit/s或10Gbit/s。光纤以及网把以太网技术扩展到LAN之外,进入城域网(MAN)。光纤以太网也将以太网的优越性扩展到了MAN,大大降低了运营商的网络建设成本。  相似文献   

2.
北电网络的新型10Gbit/s S/DMS传输节点系统面向宽带传输的需求,可支持10Gbit/s群路速率接口和低速155M、62M和2.5Gbit/s等支路端口卡。其多波长光中继器系统(MOR/MOR+)采用双向多波长放大器,在单根光纤上支持16或32波DWDM传输。二者的结合可使运营商利用现有的光纤,在满足高性能传输及高效率管理的同时,实现最低的每比特每公里传输成本。  相似文献   

3.
A test chip for an integrated full cmos led driver has been realized with a modulation current of 60 mA at a maximum bit rate of 155 Mbit/s. A cmos receiver is evaluated to amplify pin diode photo currents less than 10 μA at the same bit rate of 155 Mbit/s. Both circuits are integrated on one chip. The circuit has been developed in a 0.8 μm digital cmos process.  相似文献   

4.
Serial modulation and demodulation provide a significant simplification in the hardware realization of high data rate MSK systems. The serial MSK (SMSK) technique results in theoretical performance charateristics identical to conventional MSK. A 750 kbit/s low data rate system and a 760 Mbit/s high data rate system were constructed to evaluate the feasibility of the design concepts. The low data rate system had an overall BER performance degradation of 1.3 dB at a 10-6BER. The 760 Mbit/s system had a corresponding degradation of 2.0 dB and used direct modulation and demodulation at the 14.7 GHz carrier.  相似文献   

5.
We report coherent lightwave systems experiments over 150 km employing phase modulation at speeds of 400 Mbit/s and 1 Gbit/s. Bit error rates lower than 10?9 were attained with no evidence of an error rate floor. Receiver sensitivities of ?53.3 dBm and ?44.5 dBm (10?9 BER) achieved at 400 Mbit/s and 1 Gbit/s with a new balanced mixer receiver correspond to improvements of 10.7 dB and 7.5 dB over the best previously published direct detection results.  相似文献   

6.
HSUPA技术及其发展   总被引:2,自引:0,他引:2  
HSUPA(高速上行分组接入)是3GPP标准化组织为进一步满足数据业务需求在WCDMA/UTRA-FDDR6版本中提出的一种新技术,本文详细描述了引入HSUPA后WCDMA系统结构的演化,阐述了HSUPA中涉及的物理层混合自动请求重传(HARQ)、快速调度、短帧长、新扩频因子以及软切换等关键技术及其相应研究,最后对HSUPA技术及WCDMA的发展趋势进行了讨论.  相似文献   

7.
Using a cleaved-coupled-cavity (C3) ridge guide laser which oscillates in a single longitudinal mode at 1.55 ?m wavelength, we report the first lightwave transmission experiment exploying single-frequency lasers at speeds above 500 Mbit/s. We have achieved digital transmission with a bit-error rate of 2 × 10?10 at 1.0 Gbit/s over 101 km of single-mode fibre. This represents a record for the length of unrepeatered optical transmission for bit rates greater than 500 Mbit/s. Evidence for an error-rate floor, presumably due to residual partition noise, is observed. No such floor was observed in an 84 km?1 Gbit/s experiment using the same C3 laser.  相似文献   

8.
Space optical communications with the Nd: YAG laser   总被引:1,自引:0,他引:1  
The development of a Nd : YAG space laser communication system is discussed with respect to history, potential applications, and present status. The basic design of an Air Force Space Communications Flight Test operable at a data rate of 1000 Mbit/s is described at both the system and component level. An engineering feasibility model of this system has been completed, and the results of tests data are reported. Communications at 1000 Mbit/s with a receiver sensitivity of 20 photoelectrons/bit was demonstrated for a bit error rate of 10-6, interterminal tracking with angle erros less than 1 µrad, and station to station acquisition in less than 6 s. A simulated range of 40 000 km was used.  相似文献   

9.
We report the operation of a fully integrated p-i-n FET circuit based on a planar embedded In0.53Ga0.47As p-i-n detector and load resistor with InP depletion-mode FET's. The structure employs selective growth of InGaAs on a semi-insulating InP substrate and selective ion implantation of Si and Be into the InP and InGaAs, respectively. For a 10-9bit error rate at 1.54 m, the circuit achieves a sensitivity of -34 dBm at 90 Mbit/s and -29.5 dBm at 295 Mbit/s.  相似文献   

10.
针对应用于850nm光通信中的10/100Mbit/s收发器,提出采用0.5μm标准CMOS工艺对其光接收芯片实现Si基单片集成。整体芯片面积为0.6mm2,共集成了一个双光电二极管的(DPD)光电探测器和一个跨阻前置放大电路,功耗为100mW,并给出了具体的测试性能结果。结果表明,在850nm光照下,光接收芯片带宽达到53MHz,工作速率为72Mbit/s。重点介绍了DPD光电探测器的原理和结构,并给出了相应的制造过程和电路等效模型,对整个光接收芯片进行了多种实用性测试,可以满足系统的性能要求。  相似文献   

11.
Using a high-speed InGaAsP/InP LED, 560 Mbit/s signal transmission over 4.4 km has been realised with a large-bandwidth graded-index fibre at 1.3 ?m wavelength and a bit-error rate of 10?9.  相似文献   

12.
Optical-fiber transmission experiments in the 1.3-μm wavelength region are reported. GaInAsP/InP double-heterostructure semiconductor laser emitting at 1.293 μm is modulated directly in nonreturn-to-zero (NRZ) codes at digit rates tanging from 100 Mbit/s to 1.2 Gbit/s. Its output is transmitted through low-loss GeO2-doped single-mode silica fibers in 11-km lengths. Transmitted optical signals are detected by a high-speed Ge avalanche photodiode. Overall loss of the 11-km optical fibers, including 11 splices, is 15.5 dB at 1.3 μm. Average received optical power levels necessary for 10-9error rate are -39.9 dBm at 100 Mbit/s and -29.1 dBm at 1.2 Gbit/s. In the present system configuration, the repeater spacing is limited by loss rather than dispersion. It seems feasible that a more than 30 km repeater spacing at 100 Mbit/s and a more than 20 km even at 1.2 Gbit/s can be realized with low-loss silica fiber cables, whose loss is less than 1 dB/km. Distinctive features and problems associated with this experimental system and constituent devices are discussed.  相似文献   

13.
《Electronics letters》1991,27(5):393-394
Error-free operation of a wavelength conversion laser diode (WCLD) is demonstrated. The optical input/output interface scheme of the WCLD has been examined and wavelength switching at a data rate of 125 Mbit/s has been experimented on. Good error rates below 10/sup -10/ and a small sensitivity degradation of 2.0 to 2.9 dB were achieved.<>  相似文献   

14.
15.
This paper discusses 400 Mbit/s optical regenerator integrated circuits, focusing on their circuit architecture and performance, and describes their application to a 400 Mbit/s optical regenerator. The basic design concepts for high-speed regenerator IC's are discussed and a new integrated circuit architecture based on these design concepts is proposed. The proposed architecture of regenerator IC's is used to fabricate five IC chips (Reshaping IC, Retiming IC, Decision IC, LD driver IC, and dc-to-dc converter IC) using a high-speed bipolar process with transistors having a unity gain bandwidth of 5 GHz. The combination of these IC's can achieve submarine and terrestrial long-haul optical transmission at bit rates up to 450 Mbits/s. These IC's are applied to a 400 Mbit/s IC optical regenerator. Experimental results show that the IC optical regenerator has an optical dynamic range of more than 27 dB without any adjustment and received average optical power required to maintain a 10-11error rate is less than -38 dBm. Experimental results fully satisfy the system requirements, and the feasibility of commercial application is demonstrated.  相似文献   

16.
Two approaches to frequency division multiplexing using SAW devices are described. The first one uses a 9-channel filter array, where the signal combining and splitting is performed using wide-band power splitters. Two of these filter arrays were used in a data link, with data rates up to 7.5 Mbit/s for a total data rate of 67.5 Mbit/s. The second approach uses offset multistrip couplers to channel a wide-band signal into various narrow-band outputs according to frequency. Consequently, this approach exhibits lower insertion loss and is especially suitable for a large number of channels. An 8-channel MSC multiplexer has been constructed with less than 10-dB insertion loss.  相似文献   

17.
Chidgey  P.J. Smith  D.W. 《Electronics letters》1987,23(23):1228-1229
A simple and novel sampling technique for optical timedivision multiplexing circuit and packet switched data is proposed using a gain-switched distributed feedback semiconductor laser and lithium niobate modulators. System error rate measurements on a two-channel system multiplexing data at 140 Mbit/s and 50 Mbit/s are given and operating penalties analysed.  相似文献   

18.
Otsuka  Y. 《Electronics letters》1990,26(10):622-624
The CCITT recommended that the bit rates for synchronous digital hierarchy (SDH) should be multiples of 155.52 Mbit/s. In handling high-speed data (such as 622.08 Mbit/s) in B-ISDN switching systems, there are problems associated with waveform degradation caused by impedance mismatching and amplitude attenuation. A countermeasure is the regeneration of the distorted waveforms using the system clock in each board. A bit-synchronisation circuit allows distorted waveforms to be regenerated and simplifies the design of timing between boards. The author have developed a high-speed bit-synchronisation LSI with excellent jitter tolerance in the 600 Mbit/s region and which has a simple circuit structure. The LSI features a circuit structure based on an elastic store, Si-bipolar super self-aligned process technology (SST),/sup 1/ and careful timing design. It can handle three different bit-rates (622.08, 155.52, and 51.84 Mbit/s) and has a maximum bit rate of 1 Gbit/s.<>  相似文献   

19.
A new technique for simultaneous bidirectional data transmission on a single monomode fibre is described. The link is implemented by employing a single light source at one end of the fibre and a reflective modulator at the other. Simultaneous transmission of 565 Mbit/s and 34 Mbit/s signals is reported with BER < 10-9 in each case.  相似文献   

20.
A new integrated PIN/JFET using an original three-layer GalnAs structure has been developed in order to optimise both devices separately. Thanks to the good performances and high reliability of individual components, the sensitivity of such monolithic photoreceivers is ? 33.7 dBm for a 10?9 bit error rate at 140 Mbit/s.  相似文献   

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