基于ARM S3C44B0X的LED显示屏设计

为了简化LED显示屏的驱动电路，节约单片机的端口资源。对常见的LED显示屏驱动电路进行了改进，全部采用通用的串入并出移位寄存器作为选通驱动．系统全部采用串行数据控制。形成了一种只需4根信号线的LED显示屏驱动电路解决方案。仅需占用单片机的4个I／O端口发送串行数据就可以实现正常的显示功能。文中给出相应的程序代码。     

AVR单片机入门及C语言高效设计实践（四）

ATMEAG16L的I／O端口特点及使用 ATMEAG16L单片机有32个通用I／O口，分为PA、PB、PC和PD四组，每组都是8位。这些I／O口都可以通过各自的端口寄存器设置成输入和输出（即作为普通端口使用），有些I／O口还具有第二功能（我们在后面使用到这些第二功能时再介绍）。     

Corelis公司用于大批量测试的JTAG控制器

Corelis公司推出据称测试行业第一款边界扫描（JTAG）控制器NetUSB-1149．1／SE，该产品将网络连接的灵活性、USB接口的简单性和对多达八个目标同时进行边界扫描测试并对这些目标上的Flash与EEPROM存储器器件进行编程的能力集合于一身。NetUSB-1149．1／SE是一种先进的多端口边界扫描控制器，具有八个TAP（测试访问端口），允许工程师同时对多达八个JTAG链运行边界扫描测试和对这些链上的CPLD、FPGA和Flash存储器进行编程。     

单片机技术在数据采集及监测过程中的应用

应用单片机微型智能系统对输出数据:电压、电流及电位的采集测量、显示和打印。以8031单片机为核心,8031单片机有一个8位的CPU,一个128字节的RAM,21个特殊功能寄存器,4个8位并行I/O口,1个全双工异步串行端口,2个16位定时器/计数器,5个具有优先级别的中断源。在8031外接一片程序存储器就可以构成一个有完整功能的微机应用电路。     

SPI接口及其在数据交换中的应用

SPI是一种常用的串行通信协议，用于MCU系统与外围设备的通信。文中以OMAP1612／11的SPI接口为例，论述了SPI接口的端口、寄存器等结构，介绍了SPI协议，给出了SPI在主模式MCU_DSP发送／接收协议下的数据发送／接收过程，并在FPGA从端对SPI接口进行仿真。     

适合消费电子产品的电流转换逻辑技术

消费电子和通信产业正见证着I／O解决方案从并行到高速串行的转变：能够降低成本、简化设计，并具备可延展性，满足全新带宽的要求。这类接口I／O技术的市场潜力巨大，包括移动电话、DVD-RW和高清晰度LCD电视机，而低功耗、低电磁干扰(EMI)和高数据吞吐量在这些应用中极为重要。因此，业界一直致力于设计和开发这些串行I／O，以低功耗提供高速的数据速     

I/O扩展电路GM8166在嵌入式锅炉系统中的应用

介绍了I/O扩展电路GM8166的功能和特点,结合该器件在嵌入式锅炉系统中的应用,侧重说明它通过串行输入并行输出、并行输入串行输出两种转换模式来完成锅炉32路数字输入和32路数字输出控制的I/O口扩展.     

边界扫描测试技术在雷达BIT电路中的应用

提出了一种采用超大规模集成电路的边界扫描测试技术来设计内建自测试(BIT)电路的方法。此方法利用一片单片机的I/O口线以及超大规模集成电路所具有的边界扫描测试结构来实现对VLST集成电路芯片的故障诊断。     

应用于FPGA芯片的边界扫描电路

针对在FPGA芯片中的应用特点，设计了一种边界扫描电路，应用于自行设计的FPGA新结构之中。该电路侧重于电路板级测试功能的实现，兼顾芯片功能的测试；同时，加入了器件编程功能。在电路设计中采用单触发器链寄存器技术，节省芯片面积。版图设计采用0．6μm标准CMOS工艺，并实际嵌入FPGA芯片中进行流片。该电路可实现测试、编程功能，并符合IEEE1149．1边界扫描标准的规定，测试结果达到设计要求。     

基于FPGA的数字中频接收和恢复系统设计

介绍一种数字中频恢复系统,该系统分为光纤接收单元、FPGA核心单元和QDUC单元。光纤接收单元采用高速串行器／解串器TLK1501,完成高速串行数据的串行转换。FPGA核心单元对数据进行解码、检验、配置TLK1501和AID957。QDUC单元实现基带信号的上变频和D／A转换。测试结果证明,系统具有实时性好、工作稳定、抗干扰性强的优点。     

Partial scan and symbolic test at the register-transfer level

This paper presents a partial scan methodology suited for (pipelined) data paths described at the Register-Transfer level. The method is based on feedback elimination by making existing registers scannable or by adding extra transparent scan registers An optimal set (in terms of area cost) of scan registers is selected using an exact branch and bound algorithm. This approach can deal with complex realistic data paths requiring orders of magnitude lower CPU times than gate devel techniques. Furthermore, our symbolic test pattern generation technique can very effectively deal with the delay in the remaining acyclic sequential circuit parts. This symbolic test method makes various scan schemes possible which ensure a correct assembly and application of the test vectors. They are discussed and compared in terms of hardware requirements, test application times and test accuracy.     

基于NiosII的边界扫描控制核的设计

本文基于ALTERA公司的Nios软核＋可编程资源FPGA的SOPC平台设计了一个边界扫描控制器IP核。该控制器基于Allera的SOPC系统及Avalon总线规范,完成自定了边界扫描控制核的设计方案及设计流程,通过SOPC中的Avalon总线接口,该控制器产生符合IEEE1149．1标准的边界扪描测试系统,能实现各种边界扫描测试。提高了系统设计的灵活性,加速了边界扫描测试效率。仿真及实验结果表明,该设计能够完成有效高速的边界扫描测试。     

基于ADSP-2191DMA方式的高速数据通信

本文针对便携式高速数据采集系统的数据传递瓶颈，介绍了ADSP—2191的两种并行DMA传送方式。在文中，作者着重对Mem DMA的相关寄存器进行了讲解。并针对具体硬件框架，给出了程序实例，为21xx系列DSP工程应用的高速通信设计了重要参考。     

一种改进的PN码捕获技术研究

在直接序列扩频系统中应用频域捕获方法,可以显著缩短捕获时间,本文提出了在伪码寄存器全1状态后添0的办法,完美的解决伪码与FFT运算长度不匹配的问题。本文采用双重频率步进的扫频方法,有效地减少在低信噪比条件下的捕获时间。     

A three-dimensional parabolic equation applied to VHF/UHFpropagation over irregular terrain

The two-dimensional (2-D) parabolic equation (PE) is widely used for making radiowave propagation predictions in the troposphere. The effects of transverse terrain gradients, propagation around the sides of obstacles, and scattering from large obstacles to the side of the great circle path are not modeled, leading to prediction errors in many situations. In this paper, these errors are addressed by extending the 2-D PE to three dimensions. This changes the matrix form of the PE making it difficult to solve. A novel iterative solver technique, which is highly efficient and guaranteed to converge, is presented. In order to confine the domain of computation, a three-dimensional (3-D) rectangular box is placed around the region of interest. A new second-order nonreflecting boundary condition is imposed on the surface of this box and its angular validity is established. The boundary condition is shown to keep unwanted fictitious reflections to an acceptable level in the domain of interest. The terrain boundary conditions for this 3-D PE method are developed and an original technique for incorporating them into the matrix form of the iterative solver is described. This is done using the concept of virtual field points below the ground. The prediction accuracy of the 3-D PE in comparison to the 2-D PE is tested both against indoor scaled frequency measurements and very high frequency (VHF) field trials     

基于Multi-Capture结构的扫描链优化算法

提出了一种基于多扫描链Multi-capture结构的扫描链优化算法,通过构造具有最小相关度的多扫描链结构,并利用Multi-capture内部响应复用为激励以侦测故障的原理,达到极大压缩测试向量长度的目的。实验结果表明,该优化算法平均优化率可以达到30％左右。     

Charge transfer and blooming suppression of charge transfer photodiode area array

A charge-transfer photodiode array combines the advantages of diffused diodes for broad and smooth spectral response and analog registers for low-noise readout. The device structure described is that of a high-speed low-blooming 100-by-100 diode array using bucket-brigade readout registers. Two of the mechanisms which are essential to successful operation of this combination structure are studied. These mechanisms are the charge transfer from sensing diode to the analog register and blooming suppression. It is found that the charge-transfer speed degrades sharply with reducing light level due to subthreshold leakage behavior of the MOS transfer gate. This degradation is eliminated by using a background charge supplied from the analog register. Experimental data confirms the validity of the concept.     

新型激光高速柔性线路板打孔系统

总结了一种应用于柔性线路板(Printed circuit board,PCB)高速打孔的新型激光加工系统，每分钟可以打孔18000个。柔性线路板传统制版工艺中的过孔会被油墨完全堵住，由于孔径小且数量繁多，加之软板个体存在变形和误差，因此这些油墨使用传统方法无法清除，这为产品带来了一定的隐患。为此，研制了一种新型激光高速柔性线路板打孔系统。采用2个高速振镜移动激光位置，配合伺服系统带动工作台快速移动，通过反馈系统精准定位，同时在计算机的控制下补偿柔性线路板软板的变形，另外采用光电系统对柔性线路板软板进行精准测量和定位。振镜的扫描范围为25 mm×25 mm，将柔性线路板分割成若干区域，依次加工，振镜和工作台位置相互配合，全部待加工孔的坐标值通过软件实施变换。     

A parity-preserving multi-input signature analyzer and its application for concurrent checking and BIST

In this paper a joint implementation of a parity preserving multi-input signature analyzer (PMISA) and a parity checker is described. The PMISA simultaneously can be used for concurrent checking and for testing of digital circuits. In the case of concurrent checking errors are detected by their erroneous parity. If a circuit is tested errors are detected either by their erroneous parity or by the erroneous signature of the PMISA. A possible scan-mode of the PMISA allows its application in a scan path with parity-encoded inputs and outputs of the combinational modules which are driven by register sets. In normal operation mode all the registers of the PMISA can be utilized as functional registers of the combinational circuit.     

高频锁相环的可测性设计

文章针对一款应用于大规模数字集成电路的CMOS高频锁相环进行了可测性设计,详细讨论了最高输出频率、输出频率范围和锁定时间等参数的测试.分别给出了边界扫描测试和分频器测试两种测试方案,并对两种方案进行了比较,指出了各自的适用范围.对于选用的边界扫描方法,给出了详尽的测试电路图,并进行了电路仿真,仿真结果表明该方法有效可行.