数字电视 可靠性试验设计

可靠性技术是提高产品质量的有效手段,具有广阔的应用前景。结合国内外可靠性试验技术对数字电视可靠性设计进行分析,分别介绍了可靠性的主要特征量、可靠性试验论证设计、贝叶斯验证试验、可靠性试验方案设计等方面,供相关实验室及检测人员参考。     

Discovering user-generated metaphors through usability testing

A post hoc analysis of data collected from a usability test on the Fluke ScopeMeter 97 (a diagnostic instrument for analyzing electrical signals) revealed that, in doing tasks, subjects were making use of their own internal metaphors (user generated) that were unsupported by the design of the ScopeMeter keys. We investigated the interaction of the user generated metaphors and designer generated metaphors. By examining the effects that the subjects' skill levels and their backgrounds had on employing such metaphors, we began to outline certain characteristics of user generated metaphors. We found that user generated metaphors demonstrate unyielding persistence in the minds of ScopeMeter users, particularly in the higher skilled subjects     

Diagnosis and correction of multiple logic design errors in digitalcircuits

This paper presents a technique to correct multiple logic design errors in a gate-level netlist. A number of methods have been proposed for correcting single logic design errors. However, the extension of these methods to more than one error is still very limited. We direct our attention to circuits with a low multiplicity of errors. By assuming different error dependency scenarios, multiple errors are corrected by repeatedly applying a single error search and correction algorithm. Experimental results on correcting double-design errors and triple-design errors on ISCAS and MCNC benchmark circuits are included     

基于遗传算法的转移阻抗测试装置优化设计

提出了一种新的基于遗传算法的宽带电磁干扰(EMI)衬垫转移阻抗(TI)测试装置优化设计方法,获得了宽频带(0～2 GHz)下的等效电路.以测试装置结构所决定的分布参数(L、C1、C2)为优化对象,以输入阻抗为优化目标,建立了衬垫测试系统的目标函数;优化前后输入阻抗理论值比较表明:采用优化的测试装置进行测试,输入阻抗误差显著减小,并且这一结论在通常意义下都有效.     

In-process functional testing of pixel circuit in AM-OLEDs

This paper presents a functional testing scheme using a two-thin-film-transistor (TFT) pixel circuit of an active-matrix organic light-emitting display (AM-OLED). This pixel circuit and the co-operative electrical testing scheme can not only evaluate the characteristics of each TFT, but also determine the location of line and point defects in the TFT array. Information on defects can be used in a unique repair system that cutting and repairing these defects. Furthermore, the functional testing scheme can be applied as a part of yield management of the AM-OLED array process.     

网络考试系统中数据库的设计及架构

介绍了网络考试系统在高校教学中的必要性,对网上考试系统进行研究,其目的是为教学资源的共享提供一种途径,提高教师的工作效率,保证考试的公平性与公正性。而作为网络考试系统来说,如何构架数据库是整个网络考试系统的核心,文章通过对网络考试试题库的分析来搭建数据库设计,从而解决网络考试系统的核心模块。     

面向多种总线测试设备的软件设计

介绍了一种面向多种总线测试设备的软件设计,通过GPIB、TCP网络、RS 485串口等总线编程技术,采用多线程编程方法实现对GPIB-IEEE488.2接口测量设备、网络接口示波器以及串口测量设备的分时通信,最终实现数据采集的目的。     

Designing-in of quality through axiomatic design

Decisions made during the design stage of product and process development profoundly affect product quality and process productivity. To aid in design decision making, a theoretical framework is advanced; the axiomatic approach to design. Axiomatic design consists of: (1) domains in the design world; (2) mapping between these domains; (3) characterization of a design by a vector in each domain; (4) decomposition of the characteristic vectors into hierarchies through a process of zigzagging between the domains; and (5) the design axioms, viz, independence and information axioms. Statistical process control (SPC) and other methodologies to improve quality are valid only when they are consistent with the independence and information axioms. This paper presents several criteria that govern the design and manufacture of quality products. To be able to control the quality of products, a design must satisfy the independence axiom. Based on this axiom and some theorems, several design criteria are derived and discussed. These criteria provide the bounds for the validity of some of the SPC techniques being used. When there is more than one acceptable design of a product or process, the information axiom must be used to select the best design(s)     

The impact of testing on VLSI design methods

The question `why design for testability'? is answered by discussing some existing test philosophies. Exhaustive testing, functional testing, and structural testing are treated, also with regard to their usefulness for VLSI circuits. There is no general agreement on how to design for testability. Various approaches exist, and each has its specific applications. Some of these approaches are discussed in detail, also regarding the influence of the complexity on necessary CAD tools for test pattern generation.     

Balance testing and balance-testable design of logic circuits

We propose a low-cost method for testing logic circuits, termed balance testing, which is particularly suited to built-in self testing. Conceptually related to ones counting and syndrome testing, it detects faults by checking the difference between the number of ones and the number of zeros in the test response sequence. A key advantage of balance testing is that the testability of various fault types can be easily analyzed. We present a novel analysis technique which leads to necessary and sufficient conditions for the balance testability of the standard single stuck-line (SSL) faults. This analysis can be easily extended to multiple stuck-line and bridging faults. Balance testing also forms the basis for design for balance testability (DFBT), a systematic DFT technique that achieves full coverage of SSL faults. It places the unit under test in a low-cost framework circuit that guarantees complete balance testability. Unlike most existing DFT techniques, DFBT requires only one additional control input and no redesign of the underlying circuit is necessary. We present experimental results on applying balance testing to the ISCAS 85 benchmark circuits, which show that very high fault coverage is obtained for large circuits even with reduced deterministic test sets. This coverage can always be made 100% either by adding tests or applying DFBT.This research was supported by the National Science Foundation under Grant No. MIP-9200526. Parts of this paper were published in preliminary form in Proc. 23rd Symp. Fault-Tolerant Computing, Toulouse, June 1993, and in Proc. 31st Design Automation Conf, San Diego, June 1994.     

Rapid application design and testing of Web usability

The rapid application design and testing (RAD-T) process greatly advances time-driven development of Web applications without sacrificing usability. Our GUI-based toolset, in conjunction with an extension of HTML, provides for early usability testing at the onset of Web specification and design activities     

Novel design of a bioelectric amplifier with minimized magnitude and phase errors

A new design of a bioelectric amplifier that has better parameters than conventional designs is presented. The design allows the construction of bioelectric amplifier with improved parameters in terms of common-mode rejection ratio and phase and magnitude errors. The voltage gain is easily adapted to a wide range of biomedical applications. The experimental and simulation results of the designed bioelectric amplifier are also included.     

全息无损检测试验台的设计

本文在振动理论的基础上,论述了多级减振方案的减振效果,导出了减振效率公式,同时对试验台的结构设计进行介绍。试验结果表明减振性能良好。     

Structural RFIC device testing through built-in thermal monitoring

Current RFIC test practices perform system-level verification through specific functional validation. Structural testing, although widely accepted for digital and analog generic ICs, is not adopted in this domain due to the lack of appropriate fault models. Another important reason is the impossibility of embedding test-mode circuitry within the RF blocks because of parasitic component disturbances. This work discusses the feasibility of complementing functional tests with structural methods by using thermal testing. The benefits reside in the intrinsic electrical loadless property of the technique and the impact of many defects on the circuit temperature. The analysis focuses on the possibilities of detecting defects that escape functional testing, and practical implementation issues.     

Design and functional test of a novel optical testing target

A novel optical testing target (OTT) with three degrees of freedom (DOFs) is proposed for measuring the tracking performance of a photoelectric theodolite. The main components, such as the azimuth axis system, the pitching axis system, the linear motion system, and the simulated target generator, are designed. Furthermore, the linear module with the form of a large-span and low-stiffness cantilever beam is strengthened using an integrated optimization method. After the structure is strengthened, the 1st-order natural frequency increases from 14 Hz to 32 Hz. Finally, a functional test is performed and the results show that compared with a traditional optical test target, the simulated target generated by the novel target is advantageous in practice.     

Optimal design of life testing for ULSI circuit manufacturing

The life testing of ultra large scale integration (ULSI) circuits is perhaps the most complex manufacturing process found today. This complexity is, in part, the result of product diversity, uncertainty, and changing technologies, and has caused the cost of testing for ULSI circuits to grow exponentially. The author develops a testing cost model and determines the optimum sample size on test which minimizes the expected total system cost assuming that the cost of waiting per unit time and the cost of placing an ULSI circuit on test are given. Numerical examples are also provided to illustrate the methods