基于HfO2栅介质的Ga2O3 MOSFET器件研制

采用金属有机化学气相沉积(MOCVD)方法在(010) Fe掺杂半绝缘Ga2O3同质衬底上外延得到n型β-Ga2O3薄膜材料,材料结构包括400 nm的非故意掺杂Ga2O3缓冲层和40 nm的Si掺杂Ga2O3沟道层.基于掺杂浓度为2.0×1018 cm-3的n型β-Ga2O3薄膜材料,采用原子层沉积的25 nm的HfO2作为栅下绝缘介质层,研制出Ga2O3金属氧化物半导体场效应晶体管(MOSFET).器件展示出良好的电学特性,在栅偏压为8V时,漏源饱和电流密度达到42 mA/mm,器件的峰值跨导约为3.8 mS/mm,漏源电流开关比达到108.此外,器件的三端关态击穿电压为113 V.采用场板结构并结合n型Ga2O3沟道层结构优化设计能进一步提升器件饱和电流和击穿电压等电学特性.     

Design tradeoffs between surface and buried-channel FET's

A study of the operation of surface- and buried-mode p-channel FET's is conducted. The buried-channel devices are fabricated using n-type polysilicon gates while the surface-channel devices employ p-type polysilicon gates. Using devices with different channel lengths (20 to 0.4 µm), threshold voltage lowering, subthreshold characteristics, transconductance, punchthrough, and body effects are compared over a wide range of background doping concentrations. In the study surface-channel devices were found to be more resistant to short-channel effects than their buried-channel counterparts independent of background doping concentration. Two-dimensional computer simulation revealed that buried-channel devices are more subject to drain-induced barrier lowering and bulk punchthrough. The body effect for the surface-channel device is lower than its counterpart at low background doping concentrations whereas the buried-channel device has a lower body effect at high background doping levels. The effective carrier mobility of buried-channel devices was found greater than that of surface devices. The net difference in the transconductance, however, is offset by the high parasitic diffusion resistance.     

On the possible effects of AlGaAsSb growth parameters on the 2-DEGconcentration in AlGaAsSb/InGaAs/AlGaAsSb QW's

The absence of pinchoff in the room temperature current-voltage characteristics of certain AlGaAsSb/InGaAs/AlGaAsSb-based high electron mobility transistors (HEMT's) is investigated by theoretical calculations. The room temperature pinchoff properties are strongly affected by the Al mole fraction in the buffer layer, the In mole fraction in the channel, the unintentional acceptor doping level of the lattice-matched quaternary buffer, and the quantum well width. The use of InAs as the channel material imposes strict conditions on the composition and the unintentional acceptor doping of the buffer layer. With decreasing In mole fraction, the restriction is relaxed. A higher Al mole fraction in the buffer, along with a lower In mole fraction in the channel, results in superior pinchoff characteristic and lower gate leakage     

Fundamental materials studies of undoped, In-doped, and As-doped Hg1−xCdxTe

Variable magnetic-field Hall and transient photoconductance-lifetime measurements were performed on a series of undoped, In-doped, and As-doped HgCdTe samples grown by molecular beam epitaxy (MBE). Use of quantitative mobility-spectrum analysis (QMSA) combined with multiple carrier-fitting (MCF) techniques indicates that the majority of samples contain an interfacial n-type layer that significantly influences the interpretation of the electrical measurements. This n-type layer completely masks the high-quality electrical properties of undoped or low n-type In-doped HgCdTe, as well as complicating the interpretation of activation in As-doped p-type HgCdTe. Introduction of an intentional n-type background, typically created through doping with In to “recover” high mobility, is actually shown to increase the “bulk” layer conductivity to a level comparable to the interface layer conductivity. Photoconductance-lifetime measurements suggest that In-doping may introduce Shockley-Read-Hall (SRH) recombination centers. Variable-field Hall analysis is shown to be essential for characterizing p-type material. Photoconductance-lifetime measurements suggest that trapping states may be introduced during the incorporation and activation of As. Two distinctly different types of temperature dependencies were observed for the lifetimes of As-doped samples.     

Electrochemical capacitance voltage profiling of the narrow band gap semiconductor InAs

InAs is a narrow band gap compound semiconductor with potential applications in infra-red detectors and high speed transistors. In order to facilitate device design using this material, it is essential that carrier concentration profiles be accurately known. Capacitance-voltage (CV) profiling is often employed for this purpose. Due to surface Fermi level pinning, it is difficult to form metal Schottky contacts to InAs layers, making conventional CV profiling difficult. Electro-chemical CV (ECV) measurements have been successfully performed on InAs epilayers grown by molecular beam epitaxy on GaP. A solution of 0.2 M EDTA with 0.2M NaOH and 10–20% by volume of ethylenediamine acts both as an etchant and as a Schottky contact to InAs. The profiles obtained for undoped InAs layers were compared to Hall effect data, and showed good agreement. ECV profiling of thick layers with p- and n-type doped regions is also demonstrated.     

High triplet energy n-type dopants for high efficiency in phosphorescent organic light-emitting diodes

High triplet energy n-type dopants, lithium 2-(oxazol-2-yl)phenolate (LiOx) and lithium 2-(1-methyl-imidazol-2-yl)phenolate (LiIm), were synthesized as n-type doping materials for phosphorescent organic light-emitting diodes and the effect of the n-type doping materials on the electron mobility and device performances of the phosphorescent organic light-emitting diodes was investigated. The LiOx and LiIm n-type dopants were effective to increase the electron mobility of electron transport materials and improve the quantum efficiency of green and blue phosphorescent organic light-emitting diodes.     

InAs Nanocrystals with Robust p-Type Doping

Robust control over the carrier type is fundamental for the fabrication of nanocrystal-based optoelectronic devices, such as the p–n homojunction, but effective incorporation of impurities in semiconductor nanocrystals and its characterization is highly challenging due to their small size. Herein, InAs nanocrystals (NCs), post-synthetically doped with Cd, serve as a model system for successful p-type doping of originally n-type InAs nanocrystals, as demonstrated in field effect transistors (FETs). Advanced structural analysis, using atomic resolution electron microscopy and synchrotron X-ray absorption fine structure spectroscopy reveal that Cd impurities reside near and on the nanocrystal surface acting as substitutional p-dopants replacing Indium. Commensurately, Cd-doped InAs FETs exhibit remarkable stability of their hole conduction, mobility, and hysteretic behavior over time when exposed to air, while intrinsic InAs NCs FETs are easily oxidized and their performance quickly declines. Therefore, Cd plays a dual role acting as a p-type dopant, and also protects the nanocrystals from oxidation, as evidenced directly by X-ray photoelectron spectroscopy measurements of air exposed samples of intrinsic and Cd-doped InAs NCs films. This study demonstrates robust p-type doping of InAs nanocrystals, setting the stage for implementation of such doped nanocrystal systems in printed electronic devices.     

InAs/GaAs量子点中间带太阳电池的理论研究与优化

从荧光粉散射机理分析了LED器件色角向分布不均匀的形成原因,提出了一种利用逐点步进光学设计方法,实现了不同入射角度内蓝光光程相等的远荧光粉层结构。应用该方法设计了使用不同折射率载体的LED远荧光粉层光学结构。模拟结果显示,应用所设计的光学形状的远荧光粉层结构,相比传统平面荧光粉层结构,75°方向光斑边缘与中心法线方向色差du′v′从0.05降低到0.01左右,色温偏移降低了43%~98%不等,有效改善了白光LED远程荧光粉封装结构的色度均匀性。该设计不需要增加或改变封装工艺手段,工业生产实现简单,额外成本很少,具有较强的实际应用价值。 更多还原     

锗近红外光电探测器制备工艺研究进展

Ge材料由于在近红外波段具有较大的吸收系数、高的载流子迁移率、以及与Si工艺相兼容等优势而被视为制备近红外光电探测器最理想的材料之一。针对Ge光电探测器制备过程中面临的挑战,文中综述了近年来笔者所在的课题组在Ge探测器材料、器件及工艺方面的研究进展。首先介绍了Si基Ge材料的制备工艺,利用低温缓冲层生长技术、Ge/Si键合技术、Ge浓缩技术等分别制备得到高晶体质量的Si基Ge材料。研究了Ge材料n型掺杂工艺,利用离子注入结合两步退火处理（低温预退火和激光退火）以及利用固态磷旋涂工艺等分别实现Ge材料n型高掺浅结制备。最后探究了金属/Ge接触势垒高度的调制方法,结合金属中间层和透明导电电极ITO制备得到性能良好的Ge肖特基光电探测器。     

Narrow-width SOI devices: the role of quantum-mechanical size quantization effect and unintentional doping on the device operation

The ultimate limits in scaling of conventional MOSFET devices have led the researchers from all over the world to look for novel device concepts, such as ultrathin-body (UTB) silicon-on-insulator (SOI), dual-gate SOI devices, FinFETs, focused ion beam MOSFETs, etc. These novel devices suppress some of the short channel effects exhibited by conventional MOSFETs. However, a lot of the old issues still remain and new issues begin to appear. For example, in UTB SOI devices, dual-gate MOSFETs and in FinFET devices, quantum-mechanical size quantization effects significantly affect the overall device behavior. In addition, unintentional doping leads to considerable fluctuation in key device parameters. In this work we investigate the role of two-dimensional quantization effects in the operation of a narrow-width SOI device using an effective potential scheme in conjunction with a three-dimensional ensemble Monte Carlo particle-based device simulator. We also investigate the influence of unintentional doping on the operation of this device. We find that proper inclusion of quantization effects is needed to explain the experimentally observed width dependence of the threshold voltage. With regard to the problem of unintentional doping, impurities near the middle portion of the source end of the channel have most significant impact on the device drive current and the fluctuations in the device threshold voltage.     

Investigation of Impact Ionization in InAs-Channel HEMT for High-Speed and Low-Power Applications

An 80-nm InP high electron mobility transistor (HEMT) with InAs channel and InGaAs subchannels has been fabricated. The high current gain cutoff frequency (f_t) of 310 GHz and the maximum oscillation frequency (f_max) of 330 GHz were obtained at V_DS = 0.7 V due to the high electron mobility in the InAs channel. Performance degradation was observed on the cutoff frequency (f_t) and the corresponding gate delay time caused by impact ionization due to a low energy bandgap in the InAs channel. DC and RF characterizations on the device have been performed to determine the proper bias conditions in avoidance of performance degradations due to the impact ionization. With the design of InGaAs/InAs/InGaAs composite channel, the impact ionization was not observed until the drain bias reached 0.7 V, and at this bias, the device demonstrated very low gate delay time of 0.63 ps. The high performance of the InAs/InGaAs HEMTs demonstrated in this letter shows great potential for high-speed and very low-power logic applications.     

Susceptor effects on the morphological and impurity properties of 4H-SiC epilayers

The morphological and impurity properties of 4H-SiC epilayers grown using graphite susceptors coated with vitreous carbon, SiC, TaC, and NbC were compared. Metal carbide coated susceptors produced epilayers with smooth morphologies and no thick backside polycrystalline SiC deposition. Epilayers grown using metal carbide coated susceptors possessed more than 10 times higher intentional N₂ doping efficiencies and more than 10 times lower unintentional Al concentrations compared to epilayers grown using vitreous carbon coated susceptors. Metal carbide coated susceptors permitted doping control and abrupt p.n. junctions, and possessed more than 10 times longer lifetimes compared with vitreous carbon or SiC coated susceptors.     

杂质Si对InAs自组织量子点均匀性的影响

研究了较低掺杂浓度时InAs量子点中直接掺杂Si对其发光特性的影响.光致发光谱(PL)的测量表明,与未掺杂样品相比,掺杂样品发光峰稍微蓝移,同时伴随着发光峰谱线明显变窄.该结果表明,在生长InAs层时直接掺杂,有利于形成大小分布更均匀的小量子点.该研究对InAs自组织量子点在器件应用方面有一定的意义.     

高阻硅中深能级与少子寿命的研究

本文测量了ｎ型高阻硅在９种不同浓度的金掺杂前后少子寿命的变化，以及两类不同电阻率的ｎ型高阻硅在７种不同辐照剂量的１ＭｅＶ高能电子辐照前后少子寿命的变化；测量了金掺杂和高能电子辐照在硅中引入的主要深能级；研究对比金掺杂和高能电子辐照对硅单晶性能的影响及其在提高电子器件开关速度方面的应用。     

Experimental determination of electron and hole mobilities in MOSaccumulation layers

This letter presents for the first time, the experimentally determined majority carrier mobilities in the accumulation layer of a MOSFET for both p-type and n-type channel doping for a wide range of doping concentrations. The measured carrier mobility is observed to follow a universal behavior at high transverse fields, similar to that observed for minority carriers in MOS inversion layers. At the higher doping levels, the effective mobility for majority carriers at low to moderate transverse fields is found to be very close to the bulk mobility. This is believed to be due to carrier screening of the ionized impurity scattering which dominates at the higher doping concentrations     

Impact of device geometry and doping strategy on linearity and RF performance in Si/SiGe MODFETs

Based on careful calibration in respect of 70 nm n-type strained Si channel Si/SiGe modulation doped FETs (MODFETs) fabricated by Daimler Chrysler, numerical simulations have been used to study the impact of the device geometry and various doping strategies on device performance and linearity. Both the lateral and vertical layer structures are crucial to achieve high RF performance or high linearity. The simulations suggest that gate length scaling helps to achieve higher RF performance, but degrades the linearity. Doped channel devices are found to be promising for high linearity applications. Trade-off design strategies are required for reconciling the demands of high device performance and high linearity simultaneously.     

On the validity of unintentional doping densities extracted using Mott–Schottky analysis for thin film organic devices

The organic electronic devices are often understood invoking the concept of ‘unintentional doping’. However, the applicability and usefulness of this controversial concept is not very clear and is under much recent debate. In this work, we revaluate the validity of this concept through careful experiments and detailed numerical simulations. Specifically, we use the Capacitance Voltage (CV) measurement of pentacene devices as a testbed to unravel the role of injecting electrodes and unintentional doping (if any). Indeed, our results indicate that the CV of pentacene capacitors can be solely understood in terms of properties of the contact electrodes. The unintentional doping, if present, has an inconsequential role in device performance. Our conclusions indicate that, often, an incorrect interpretation of CV results would lead to unphysical values of unintentional doping and have obvious implications towards the fundamental understanding of organic semiconductor device physics, modeling, and characterization; thus resolving many ambiguities in literature by providing a consistent interpretation through a coherent conceptual framework.     

A study on channel design for 0.1 μm buried p-channel MOSFETs

This paper investigates the channel design for buried p-channel MOSFETs with an effective channel length of 0.1 μm via simulations using the two-dimensional device simulator PISCES IIB. A new three-layer design is considered with the objective of obtaining low junction capacitance while maintaining high current drive and suppressing punchthrough. The channel design consists of a p-type layer under the gate oxide, an n-type anti-punchthrough layer below the p-type layer followed the substrate with a doping concentration of 1e17/cm³. By optimizing the doping structure, an attempt is made to investigate fundamental limits of the buried channel design. In concurrence with published results, it is shown that there is a maximum allowable thickness for the first layer, while the thickness of the anti-punchthrough layer has a minimum value in order to effectively suppress punchthrough. The above constraints enable devices with good subthreshold characteristics (subthreshold swing <90 mV/Dec) as well as high transconductance which is a matter of concern for ultra-thin buried layers. While simulation results show that it is possible to fabricate buried p-channel MOSFETs with n-type polysilicon gate electrodes in the 0.1 μm regime, it is also evident that advanced doping and low temperature fabrication technologies are needed that provide control over doped layers of ultra-thin dimensions     

Unintentional As incorporation in molecular beam epitaxially grown InAs/AlSb/GaSb heterostructures

We investigate unintentional arsenic incorporation during the molecular-beam epitaxial growth of AlSb/InAs/GaSb heterostructures, using both a standard As₄ evaporation cell and a valved arsenic cracker. When a standard As₄ cell is used, unintentional arsenic concentrations as large as 10–20% can be incorporated into the AlSb and GaSb layers from the background As ambient in the growth chamber, both during growth and on stationary surfaces. This incorporation can be controlled and suppressed with the use of a valved As cracker. Suppression of the As background substantially improves the electrical transport properties of AlSb/InAs/AlSb quantum well structures.     

Indium doping of HgCdTe grown by metalorganic chemical vapor deposition-direct alloy growth using triisopropylindium and diisopropyltellurium triisopropylindium adduct

A new indium source, triisopropylindium, was used to dope HgCdTe layers grown by metalorganic chemical vapor deposition n-type with carrier concentrations, n_H, in the range between low 10¹⁵ and low 10¹⁷ cm⁻³ at 77K. The reproducibility of carrier concentration was found to be excellent for n_H<3×10¹⁵ cm⁻³. High electron mobilities and minority carrier lifetime comparable to published values indicate that indium doping produces high quality n-type HgCdTe material. State-of the-art photodiodes were obtained by growing a p-type HgCdTe layer by liquid phase epitaxy on an indium doped layer. In addition, and adduct compound formed between diisopropyltellurium (DIPTe) and triisopropylindium (TIPIn): DIPTe·InTIP, was also found to be a viable n-type dopant for HgCdTe especially at concentrations in the low 10¹⁵ cm⁻³ or less.