The cellular environment of lightweight handheld portables

The European cellular environment is described, and the types of cellular environments that are able to support lightweight handheld portables are addressed. Microcellular structures are considered, covering propagation measurements, rapid handover, interfacing with local area networks, and highway microcells with an overlaying macrocell. Narrowband transmission of subband-coded speech by 16-level QAM and high-bit-rate transmission are discussed. Picocells, i.e., very small areas or volumes that might encompass an office, a house and its immediate environment, or a hot spot that provides high-capacity communication, are considered     

功率放大器数字预失真技术的研究

在宽带码分多址(WCDMA)等宽带通信系统中,射频功率放大器呈现出严重的电记忆效应和热记忆效应,产生频谱再生和邻道干扰,传统的无记忆预失真技术已经无法消除信号失真而达到理想的线性化效果.针对此类有记忆性的功放,文章提出一种新的记忆多项式预失真器,以跟踪射频功率放大器特性的变化, 并进行非线性补偿.     

A low-power high-performance digital predistorter for wideband power amplifiers

In this paper, we present a low-power high-performance digital predistorter (DPD) for the linearization of wideband RF power amplifiers (PAs). It is based on the novel FIR memory polynomial (FIR-MP) predistorter model, which significantly augments the performance of the conventional memory polynomial predistorter with the use of complex baseband digital FIR filter prior to the memory polynomial. The adjacent channel leakage ratio (ACLR) performance comparison between the conventional MP and the proposed FIR-MP is done based on simulations with multi-carrier modulated signals of 20 and 80 MHz bandwidths. The PA models used for the simulations are extracted from the measurements of a commercial \(1\,\hbox {W}\) GaAs HBT PA. At the ideal system-level simulations, the improvements in ACLR over the conventional MP are 7.2  and 15.6 dB, respectively, for 20 and 80 MHz signals. The choice of selection of various parameters of the predistorter along with the subsequent digital-to-analog converter (DAC) is presented. The impact of fixed-point representation is assessed using ACLR metrics, which shows that a wordlength of 14 bits is sufficient to obtain ACLR beyond \(45\,\hbox {dBc}\) with a margin of \(10\,\hbox {dB}\). The proposed predistorter is synthesized in \(28\,\hbox {nm}\) fully-depleted silicon-on-insulator (FDSOI) CMOS process. It is shown that with a fraction of the power and die area of that of the MP a huge improvement in ACLR is attained. With an overall power consumption of 8.2 and 88.8 mW, respectively, for 20 and 80 MHz signals, the FIR-MP DPD proves to be a suitable candidate for small-cell base station PA linearization.     

Optimization of EDGE terminal power amplifiers using memoryless digital predistortion

This paper describes a lookup-table (LUT)-based digital predistortion system usable for enhanced data for global system for mobile evolution (EDGE) handset transmitters. The system is memoryless and capable of improving average efficiency and performance in terms of the leakage power at offset frequencies and error vector magnitude. The obtainable efficiency at maximum linear output power is comparable, but at backoffs superior to commercial EDGE power amplifiers (PAs). Minimum system requirements on word length and LUT size have been investigated, which shows that a LUT having approximately 500 coefficients and a system word length of 13 bits are sufficient for EDGE. The proposed system is simple compared to basestation implementations comprising PA memory compensation and can be easily implemented in handsets in order to improve the overall system performance. The effects of antenna mismatch on system performance have been investigated     

Sigma?delta digital drive signals for switchmode power amplifiers

A novel all-digital approach to generate a pulse train to drive switchmode power amplifiers is proposed. Sigma?delta (ΣΔ) techniques are used to shape time quantisation noise away from the band of interest. The proposed architecture promises greater than 10 dB improvement in adjacent channel power over an existing scheme. The key contribution is to quantise in the polar domain while performing the ΣΔ filtering in the Cartesian domain.     

Complex gain and fixed-point digital predistorters for CDMA power amplifiers

Two digital baseband predistortion techniques, one based on the complex gain digital predistorter (CGDP) approach and the other based on the fixed-point predistorter (FPPD) approach, are used to compensate a nonlinear high-power amplifier (HPA) in an IS-2000 system. Forward-link performance for a perfectly linear HPA, nonlinear HPA, and compensated HPA using both a CGDP and an FPPD are compared using an IS-2000 forward-link simulator. Both predistortion techniques are shown to provide similar forward-link performance and reduction in spectral regrowth of the sidebands for the wide-band compensated HPAs utilized by IS-2000 systems.     

Effects of reconstruction filters in digital predistortionlinearizers for RF power amplifiers

The reconstruction filters are a major source of error in digital predistortion linearizers for RF power amplifiers. This paper presents a method that enables these filters to be designed for lowest filter complexity and minimum degradation of the linearizer performance. Furthermore, a method to choose an appropriate sampling rate for the predistorter is presented. Different filter approximations and orders are examined for different amplifier configurations by means of simulation. Of the filters tried, low-ripple Chebyshev and Butterworth filters perform best. It is demonstrated that it is possible to account for reasonable filter misalignment with only a small degradation in performance. It is also shown that the effect on the modulation is small with respect to intersymbol interference     

Analysis of microwave MESFET power amplifiers for digital wireless communications systems

The analysis of microwave MESFET power amplifiers (PAs) for digital wireless communications by using the hybrid Volterra-series method is presented in this paper. Compared with the traditional approach in the pure frequency-domain operation, the hybrid method has the advantage of fast computation for the continuous spectral signals with the same accuracy. The major modification is the equivalent baseband formulations in the time domain for the digital modulation signal, and the frequency-domain treatment with the nonlinear system via Volterra-series expansion. The MESFET two-dimensional current model is utilized and detailed current expressions are given to account for the gate-drain cross-term effects, while the nonlinear capacitors are also considered to describe the MESFET nonlinear characteristics completely. Circuit-level simulation yields the output modulation signal parameters with the measured data confirmation. System performance degradations due to nonlinear distortions of the MESFET PA are also performed for the communication link with the additive white Gaussian noise channel model. These results would be very useful in PA designs for digital wireless communications systems.     

Analysis of predistortion, equalization, and ISI cancellationtechniques in digital radio systems with nonlinear transmit amplifiers

An analysis made of the performance of predistortion, equalization, and intersymbol interference (ISI) cancellation techniques in compensating for the transmit amplifier nonlinearity in digital microwave radio systems. The study is carried out using the 64 QAM and 256 QAM signal formats and two values of the roll-off factor in the Nyquist pulse shaping. The simulated compensation techniques include three types of predistortion, two ISI cancellers, and several nonlinear equalizers with or without decision feedback. A basic result is that decision-feedback equalizers do not offer any significant advantage over nonrecursive equalizers. It is also shown that ISI cancelers with a memoryless equalizer as first-stage decision device do not perform any better than nonlinear equalizers of similar complexity. Another contribution an improved fifth-order analog signal predistortion technique is analyzed. The gain that can be achieved using a modified 256 QAM signal constellation that is more robust to nonlinear distortion is quantified     

Quantization analysis and design of a digital predistortionlinearizer for RF power amplifiers

Significant improvements in terms of reduced power consumption and increased bandwidth are obtained if a digital predistortion linearizer is implemented with an application specific digital signal processor. This paper investigates the quantization effects in different parts of a table based complex gain predistortion linearizer. The analysis can be used to optimize the predistortion linearizer with respect to word length based on the knowledge of the RF amplifier gain characteristic, the probability density function for the modulation scheme and the maximum allowable adjacent channel interference level. A predistorter chip is described that has been designed using the analysis. The chip has been fabricated and tested. Compared with a standard digital signal processing (DSP) solution it provides seven times higher bandwidth but consumes only 10% of the power     

Performance evaluation for cellular CDMA

The authors consider the performance of a cellular radio, direct-sequence code-division multiple access, (CDMA) system. The base-to-mobile link is modeled as a flat Rayleigh fading channel, with all signals transmitted from a given base station fading in unison. For the mobile-to-base link, the authors use a similar model, except that the waveforms from all users are assumed to experience independent fading. The effects of imperfect power control are shown     

A digital predistortion assisted hybrid supply modulator for envelope tracking power amplifiers

In this paper, a novel digital predistortion assisted supply modulator is presented. The proposed modulator is suitable for envelope tracking power amplifiers. In this topology, a digitally controlled linear power amplifier is used to compensate the switching noise ripples of the switching modulator. The proposed structure is evaluated with a 0.18 µm CMOS process technology. The results show up to 9% static efficiency improvement in comparison with previous one-phase and two-phase architectures. It is shown that for a 5 MHz WiMAX signal with a 6.7 dB PAPR at 26.8 dBm output power, a maximum average efficiency of 73.5% is achieved in the proposed design.     

A hybrid digital/RF envelope predistortion linearization system for power amplifiers

This paper presents an adaptive wide-band digitally controlled RF envelope predistortion linearization system for power amplifiers (PAs). A field-programmable gate-array-based lookup table is indexed by a digitized envelope power signal, and instantaneously adjusts the input signal amplitude and phase via an RF vector modulator to compensate for the AM-AM and AM-PM distortion. The advantages of this predistortion architecture over conventional baseband digital approaches are that a 20%-33% wider correction bandwidth is achievable at the same clock speeds, and linearization can be performed without the need for a digital baseband input signal. The timing match between the input RF signal and predistorting signal, which is one of the critical factors for performance, was investigated and adjusted to obtain optimum performance. Using three-carrier cdmaOne and wide-band multitone signals, the linearization performances for a 0.5-W GaAs heterostructure field-effect transistor, a 90-W peak-envelope-power (PEP) silicon LDMOS PA, and a 680-W PEP LDMOS PA were examined. In addition, the predistortion performance variation for different signals was studied in terms of signal envelope statistics, output powers, and PA power capacities.     

Analytical performance evaluation of downlink beamforming with power control by transmit power limited channel inversion

We investigate the transmission performance of a downlink BPSK transmission system which uses beamforming combined with cross-polarised antenna arrays and power control in a Rayleigh fading environment to fulfil QoS requirements of real time services. A power control method termed “power control by transmit power limited channel inversion” is applied in the system. Power limitation in the downlink and the effect on the bit error rate performance is especially interesting for mobile stations at the cell borders of a cellular communication system. For this non-linear transmit model we derive analytical formulas for the average transmit power and the bit error rate performance. The exact validity of the results is verified by Monte-Carlo simulations. We also show the interaction of power control and beamforming, and the dependency of the gain in transmit power from the SNR, an effect that is not visible without transmit power limited power control.     

基于坐标变换的射频功放预失真参数估计方法

在低中频预失真器构架的基础上,提出了一种基于坐标变换的预失真参数估计方法,从而降低了传统数字基带预失真系统的硬件成本和数值计算量。算法将传统算法中的复数乘法转换为极坐标中的幅度乘法和相位加法,使同样的计算步骤所消耗的乘法和加法次数分别降低了75%和50%。算法由通用的通带Volterra非线性模型进行推导得出,适用于当前的任意系统模型。对实际射频功放的测试实验结果验证了其有效性。     

A power supply error correction method for single-ended digital audio class D amplifiers

In single-ended digital audio class D amplifiers (CDAs), the errors caused by power supply noise in the power stages degrade the output performance seriously. In this article, a novel power supply error correction method is proposed. This method introduces the power supply noise of the power stage into the digital signal processing block and builds a power supply error corrector between the interpolation filter and the uniform-sampling pulse width modulation (UPWM) lineariser to pre-correct the power supply error in the single-ended digital audio CDA. The theoretical analysis and implementation of the method are also presented. To verify the effectiveness of the method, a two-channel single-ended digital audio CDA with different power supply error correction methods is designed, simulated, implemented and tested. The simulation and test results obtained show that the method can greatly reduce the error caused by the power supply noise with low hardware cost, and that the CDA with the proposed method can achieve a total harmonic distortion + noise (THD + N) of 0.058% for a –3 dBFS, 1 kHz input when a 55 V linear unregulated direct current (DC) power supply (with the –51 dBFS, 100 Hz power supply noise) is used in the power stages.     

An analog/digital pre-distorter using particle swarm optimization for RF power amplifiers

In this paper, a novel pre-distorter is presented using the particle swarm optimization (PSO) for an RF power amplifier linearization has been presented. We used the PSO in order to design of an efficient pre-distorter for the linearization of the output of an RF power amplifier by using the output data of the proposed power amplifier. The PSO is implemented to estimate and optimize the coefficient parameters of the work function in the proposed pre-distorter block diagram. The proposed method using PSO is most efficient because this approach is independent of the output of the power amplifier. The proposed method has been simulated with two-tone input signal and output power spectrum has been compared, where the obtained adjacent channel leakage ration (ACLR) is better than 50 dBc for both channels. Therefore, a quite significant improvement in linearity is achieved.     

On the synthesis of digital transmit filters

A simple method for calculating the coefficients of a digital transversal filter when cascaded with analog filters is proposed. The optimization criterion takes into account both the spectral characteristics of the signal and the residual amount of intersymbol interference at the decision device input. In contrast with standard methods no a priori constraints are applied to the filter in the time or in the frequency domain     

Genetic algorithm optimization of a hybrid analog/digital predistorter for RF power amplifiers

This study presents a genetic algorithm optimization of a hybrid analog/digital predistorter, in order to reduce the intermodulation distortion (IMD) caused by the nonlinear properties of the radio frequency (RF) power amplifier (PA). Designed predistorter based on polynomial work function and the coefficient of the polynomial is optimized in order to reduce IMD by spectrum monitoring. The design procedure and validation of predistorter have been carried out by Agilent-ADS2005A. In order to validate the predistorter two different modulation schemes as CDMA and 16-QAM have been used. Also in order to verifying the linearization a test power amplifier circuit has been examined including Motorola MOSFET MRF9742 showing the nonlinear characteristics with memory. Simulations have been shown that adjacent channel power ratio (ACPR) improvements were acceptable for both CDMA and 16-QAM modulation schemes.     

SSA optimized digital pre-distorter for compensating non-linear distortion in high power amplifier

Telecommunication Systems - We applied the stochastic salp swarm algorithm (SSA) to design high power amplifier (PA) and digital pre-distorter (DPD) using generalized memory polynomial model. This...