Fault-based ATPG for linear analog circuits with minimal size multifrequency test sets

An automatic test pattern generation (ATPG) procedure for linear analog circuits is presented in this work. A fault-based multifrequency test approach is considered. The procedure selects a minimal set of test measures and generates the minimal set of frequency tests which guarantee maximum fault coverage and, if required, maximal fault diagnosis, of circuit AC hard/soft faults. The procedure is most suitable for linear time-invariant circuits which present significant frequency-dependent fault effects.For test generation, the approach is applicable once parametric tests have determined DC behaviour. The advantage of this procedure with respect to previous works is that it guarantees a minimal size test set. For fault diagnosis, a fault dictionary containing a signature of the effects of each fault in the frequency domain is used. Fault location and fault identification can be achieved without the need of analog test points, and just in-circuit checkers with an observable go/no-go digital output are required for diagnosis.The procedure is exemplified for the case of an analog biquadratic filter. Three different self-test approaches for this circuit are considered. For each self-test strategy, a set of several test measures is possible. The procedure selects, in each case, the minimal set of test measures and the minimal set of frequency tests which guarantee maximum fault coverage and maximal diagnosis. With this, the self-test approaches are compared in terms of the fault coverage and the fault diagnosability achieved.This work is part of AMATIST ESPRIT-III Basic Research Project, funded by CEC under contract #8820.     

Sinh-Domain linear transformation filters

A new systematic method for designing Sinh-Domain linear transformation (LT) filters is introduced in this article. For this purpose, a substitution scheme containing the Sinh-Domain LT equivalent of each passive prototype has been introduced. The proposed equivalents have been realised by employing appropriate Sinh-Domain building blocks with low-voltage operation capability. As an example, a third-order Sinh-Domain elliptic LT filter has been designed and its performance has been evaluated through simulation results. In addition, a detailed comparison with the corresponding Sinh-Domain and log-domain counterparts has been performed and the obtained results have been further discussed.     

Multiple-loop feedback filters using current feedback amplifiers

Novel high-order filter topologies realised by employing current feedback operational amplifiers as active elements are introduced in this article. These are constructed from multiple-loop feedback paths and could be utilised for the realisation of filters of arbitrary order and type. An offered benefit is the requirement for employing only grounded capacitors and resistors. Two design examples are provided and the correct operation of the corresponding topologies has been evaluated through experimental results.     

Universal filters of arbitrary order and type employing square-root-domain technique

Novel Single Input Multiple Output (SIMO) and Multiple Input Single Output (MISO) universal filter topologies of arbitrary order and type are introduced in this paper. The proposed topologies have been realised by employing Square-Root Domain (SRD) technique. An offered benefit of the universal filter topologies is that only grounded capacitors are required for their implementations and the resonant frequency of the filters can be electronically controlled by an appropriate dc current. The proposed universal filters simultaneously offer all the five standard filtering functions i.e. Lowpass (LP), Highpass (HP) and Bandpass (BP), Bandstop (BS) and Allpass (AP) frequency responses. In addition, the SIMO topology is generic in the sense that it can yield four different stable filter configurations. Two design examples are provided in each configuration and the correct operation of the corresponding topologies has been evaluated through the PSPICE software with BSIM 0.35-µm CMOS process model parameters.     

"龙腾"S2微处理器测试结构设计

介绍了"龙腾"52微处理器测试结构设计方法,详细讨论了采用全扫描测试、内建自测试(BIST)等可测性设计(DFT)技术.该处理器与PC104全兼容,设计中的所有寄存器采用全扫描结构,设计中的存储器采用内建自测试,整个设计使用JTAG作为测试接口.通过这些可测性设计,使芯片的故障覆盖率达到了100%,能够满足流片后测试需求.     

Insensitive voltage-mode and current-mode filters with easily modifiable transfer functions

Two configurations for 2^nd order current-mode filters are introduced. The circuits, which exhibit low values for their active and passive sensitivies are implemented from two current conveyors. They are easily cascadable because they exhibit zero input impedance. Two voltage-mode implementations are then deduced from them. Depending on the passive components used, the circuit will be either a 2^nd order or a 3^rd order filter. Both the current-mode and voltage-mode implementations are characterized by easily modifiable transfer functions, without affecting ₀ and Q.SPICE simulation results, which confirm the theoretical analysis, are given and discussed for current conveyors implemented in a translinear form.     

New analogue inverse filters realised with current feedback op-amps

This article presents new configurations for realising analogue inverse lowpass, inverse bandpass, inverse highpass and inverse bandreject filters using commercially available current feedback op-amps (CFOA) with an accessible z-terminal (such as AD844). The workability of the proposed circuits has been confirmed by experimental results by employing AD844-type CFOAs.     

High-selectivity single-ended and balanced bandpass filters using ring resonators and coupled lines loaded with multiple stubs

High-selectivity single-ended and balanced bandpass filters (BPFs) using dual-mode ring resonators and coupled lines loaded with multiple stubs are proposed in this paper. With the help of the loaded short-circuited and open-circuited stubs, six deep transmission zeros (TZs) from 0 to 2f₀ (f₀: center frequency of the passband) can be realized in both of single-ended and balanced BPFs to improve the stopband suppressions. The functions of the loaded short/open stubs and calculated analysis of TZs’ positions have been presented. For further demonstration, two examples of single-ended BPF and balanced BPF with high common-mode suppression are designed and fabricated, whose center frequencies are both at 2.1 GHz. Their measured 3-dB fractional bandwidths are 23.7% and 24.7% (differential-mode), respectively. The simulated results and measurements of these two filters are in good agreement.     

CMOS电流控制全平衡式电流传输器

This paper presents a current controlled fully balanced second-generation current conveyor circuit（CF-BCCII）.The proposed circuit has the traits of fully balanced architecture, and its X-Y terminals are current control-lable.Based on the CFBCCII, two biquadratic universal filters are also proposed as its applications.The CFBCCII circuits and the two filters were fabricated with chartered 0.35-μm CMOS technology;with ±1.65 V power supply voltage, the total power consumption of the CFBCCII circuit is 3.6 mW.Comparisons between measured and HSpice simulation results are also given.     

CMOS current controlled fully balanced current conveyor

mW. Comparisons between measured and HSpice simulation results are also given.     

基于电流测试的混合电路故障诊断

在运用小波神经网络进行混合电路故障诊断的过程中,测试参数的选取至关重要。研究了一种基于电流测试的故障诊断。该方法即通过PSPICE模拟电路的静态及动态电流信息,再通过小渡神经网络的结合,证明了该方法在混合电路故障诊断中的可行性,为提高混合电路的故障诊断率提供了一种新的方法。     

专家诊断技术在某导弹装备故障诊断中的应用

首先介绍了两种专家诊断技术：传统故障诊断技术和模糊综合评判诊断技术，接着结合具体的实例介绍该专家技术在某型导弹装备的故障诊断过程中的具体应用过程，经过微机模拟推演，取得良好的效果。     

Some extremal properties of Daubechies filters and other orthonormal filters

New extremal properties of Daubechies 4-tap orthonormal filters are given: they maximize a certain functional, have the largest gain in (0,π/2), and allow maximum energy compaction in [0,π/2]. These properties do not carry over to Daubechies filters of arbitrary length. They complement what is known about Daubechies filters and highlight the specific role of the 4-tap filter. Moreover, we demonstrate that these properties cannot be fulfilled by any other orthonormal lowpass filter, regardless of its length.     

On the practical realization of higher-order filters with fractional stepping

We propose the use of a compact integer-order transfer function approximation of the fractional-order Laplacian operator s^α to realize fractional-step filters. Lowpass and bandpass filters of orders (n+α) and 2(n+α), where n is an integer and 0<α<1, can, respectively, be designed. A 5th-order lowpass filter with fractional steps from 0.1 to 0.9 (i.e. 5.1→5.9) is given as an example with its characteristics compared to 5th- and 6th-order Butterworth filters. Spice simulations and experimental results are shown.     

Single MIMO-OTA and single-grounded-capacitor-based first-order allpass filter design

A novel first-order voltage-mode allpass (AP) filter employing a single multiple-input-multiple-output operational-transconductance-amplifier (MIMO-OTA) and a single grounded capacitor is introduced in this article. Compared to the corresponding already published topologies, the offered benefits are as follows: it employs minimum number of active and passive components; the only capacitor is grounded, which is good for a monolithic integration of an IC; and the absence of any matching condition for its realisability. The performance of the proposed circuit has been evaluated through simulation results, utilising the analogue design environment of Cadence software.     

Modular realization of multi-dimensional filters

A method is proposed for the exact decomposition of a general multi-dimensional (m-d) rational transfer function in terms of order one, each one of which is a function of only one of the m variables. This method is used for the realization of general, linear m-d filters, with great modularity, and high parallelism. By using known nonsingular matrices, the coefficients of the decomposed filter can be expressed in terms of the coefficients of the given transfer function and the elements of these matrices. An algorithm for the determination of these coefficients is given and a class of matrices is proposed which leads to simple realizations.     

VLSI可测性设计研究

从可测性设计与VLSI测试、VLSI设计之间的关系出发，将与可测性设计相关的VLSI测试方法学、设计方法学的内容有机地融合在一起。文中简要地介绍了VLSI可测性设计的理论基础和技术种类，简明地评述了可测性设计的现状和发展趋势，并且探讨了可测性设计的实现方法。     

Coefficients of maximally flat low and high pass nonrecursive digital filters with specified cutoff frequency

A simple and general method is presented for determining the coefficients of a lowpass or highpass maximally flat nonrecursive digital filter with a specified cutoff frequency.     

基于小波分析和神经网络的模拟电路故障诊断方法

提出了一种基于神经网络和小波分析的模拟电路故障诊断的系统方法。该方法通过对电路的可测性测度计算，选择电路的最佳测试节点，然后利用小波分析作为特征提取手段提取电路的故障特征向量，经归一化和主元分析（PCA）处理后。得到最优特征向量，最后输入到神经网络实现电路故障诊断。计算机仿真结果表明该方法具有更好的故障分辨率。     

Realization of current-mirror filters with large time-constants

A novel scheme for realizing large time-constants in analog filters, using current-mirrors as active elements, is introduced in this paper. Instead of employing conventional capacitor multipliers, the proposed concept is based on the realization of very low values of transconductance. This has been achieved through a linear compression of the input signal in order to achieve operation of the core in a reduced bias current. The expansion performed by the output stage preserves the gain of the whole system. The validity of the proposed scheme as well as the offered benefit have been verified through simulation results using the Analog Design Environment of the Cadence software.