FLUORINE BEHAVIOR IN BF_2~+ IMPLANTED POLYSILICON FILMS SUBJECTED TO RAPID THERMAL ANNEALING

The physical and electrical properties of BF_2~+ implanted polysilicon films subjectedto rapid thermal annealing(RTA)are presented.It is found that the out diffusion of F and itssegregation at polysilicon/silicon oxide interface during RTA are the major causes of F anomalousmigration.Fluorine bubbles were observed in BF_2~+ implanted samples at doses of 1×10~(15) and5×10~(15)cm~(-2) after RTA.     

BF+2注入的多晶硅薄膜快速热退火后氟行为的研究

本文报道BF_2~+注入的多晶硅薄膜经快速热退火后的物理和电学性质。发现造成氟异常分布的原因是由于快速热退火过程中氟的外扩散以及在多晶硅/二氧化硅界面处的聚集。在注入剂量为1×10~(15)和5×10~(15)cm~(-2)的样品中,经快速热退火后可以观察到氟泡。     

Rapid thermal annealing of si implanted gaas

Rapid thermal annealing (RTA) technology offers potential advantages for GaAs MESFET device technology such as reducing dopant diffusion and minimizing the redistribution of background impurities. LEC semi-insulating GaAs substrates were implanted with Si at energies from 100 to 400 keV to doses from 1 × 10¹² to 1 × 10¹⁴/cm². The wafers were encapsulated with Si₃N₄ and then annealed at temperatures from 850-1000° C in a commercial RTA system. Wafers were also annealed using a conventional furnace cycle at 850° C to provide a comparison with the RTA wafers. These implanted layers were evaluated using capacitance-voltage and Hall effect measurements. In addition, FET’s were fabricated using selective implants that were annealed with either RTA or furnace cycles. The effects of anneal temperature and anneal time were determined. For a dose of 4 × 10¹²/cm² at 150 keV with anneal times of 5 seconds at 850, 900, 950 and 1000° C the activation steadily increased in the peak of the implant with overlapping profiles in the tail of the profiles, showing that no significant diffusion occurs. In addition, the same activation could be obtained by adjusting the anneal times. A plot of the equivalent anneal times versus 1/T gives an activation energy of 2.3 eV. At a higher dose of 3 × 10¹³ an activation energy of 1.7 eV was obtained. For a dose of 4 × 10¹² at 150 keV both the RTA and furnace annealing give similar activations with mobilities between 4700 and 5000 cm²/V-s. Mobilities decrease to 4000 at a dose of 1 × 10¹³ and to 2500 cm²/V-s at 1 × 10¹⁴/cm². At doses above 1 × 10¹³ the RTA cycles gave better activation than furnace annealed wafers. The MESFET parameters for both RTA and furnace annealed wafers were nearly identical. The average gain and noise figure at 8 GHz were 7.5 and 2.0, respectively, for packaged die from either RTA or furnace annealed materials.     

Rapid thermal annealing of ion implanted cdte

Rapid thermal annealing of ion implantedn-type CdTe has been investigated. Samples were implanted with 60 keV Ar⁺ and As⁺ ions to a dose of 1 × 10¹⁴ cm⁻² and subjected to anneal sequences of 5-100s at temperatures of 350-650° C. Photoluminescence measurements have indicated that the implantation completely quenches the photoluminescence; however, anneals for only 5s at 350° C are sufficient to recover most of the features of the photoluminescence spectrum to that equivalent of unimplanted material. Luminescence spectral features associated with thermal annealing damage and substitutional As in inferred. Type conversion of the As⁺ implanted layer is observed and it has been shown that good diodes can be made, with the best behaviour resulting from a 5s anneal at 450° C. Research supported by the Natural Sciences and Engineering Research Council of Canada     

Sensitivity analysis of ion implanted silicon wafers after rapid thermal annealing

In this study, we have investigated sensitivities of the ion implanted silicon wafers processed by rapid thermal annealing (RTA), which can reveal the variation of sheet resistance as a function of annealing temperature as well as implantation parameters. All the wafers were sequentially implanted by the arsenic or phosphorous implantations at 40, 80, and 100 keV with the dose level of 10¹⁴ to 2 × 10¹⁶ ions/cm². Rapid thermal annealing was carried out for 10 s by the infrared irradiation at a temperature between 850 and 1150°C in the nitrogen ambient. The activated wafer was characterized by the measurements of the sheet resistance and its uniformity mapping. The values of sensitivities are determined from the curve fitting of the experimental data to the fitting equation of correlation between the sheet resistance and process variables. From the sensitivity values and the deviation of sheet resistance, the optimum process conditions minimizing the effects of straggle in process parameters are obtained. As a result, a strong dependence of the sensitivity on the process variables, especially annealing temperatures and dose levels is also found. From the sensitivity analysis of the 10 s RTA process, the optimum values for the implant dose and annealing temperature are found to be in the range of 10¹⁶ ions/cm² and 1050-1100°C, respectively. The sensitivity analysis of sheet resistance will provide valuable data for accurate activation process, offering a guideline for dose monitoring and calibration of ion implantation process.     

Multi-step rapid thermal annealing of boron and indium implanted Hg1−xCdxTe

In this work, we are reporting the use of a two-step rapid thermal annealing (RTA) process (250°C, 100s+340°C, 30s) for the annealing of Hg_1−xCd_xTe (MCT) implanted layers over p-type (x=0.22) substrates. We report a high value of electrical activation (70%) of the indium implants after this short RTA treatment in inert Ar atmosphere. The need of two RTA steps in the annealing recipe is shown, and so the role played by each of them: the first step annihilates the implantation damage, while the second one produces the impurity electrical activation. However, for the boron case, no electrical activity was found after several annealing processes, behaving as an inert species for the case of this bulk MCT material. We also point out the change on the substrate electrical characteristics induced by the thermal treatments, and report the convenience of a subsequent low temperature furnace annealing (200°C, 72 h) to reduce back the bulk carrier concentration to values low enough to achieve an n⁺-p IR detector structure.     

Rapid thermal annealing of ion implanted 6H-SiC by microwave processing

Rapid thermal processing utilizing microwave energy has been used to anneal N, P, and Al ion-implanted 6H-SiC. The microwaves raise the temperature of the sample at a rate of 200°C/min vs 10°C/min for conventional ceramic furnace annealing. Samples were annealed in the temperature range of 1400-1700°C for 2-10 min. The implanted/annealed samples were characterized using van der Pauw Hall, Rutherford backscattering, and secondary ion mass spectrometry. For a given annealing temperature, the characteristics of the microwave-annealed material are similar to those of conventional furnace anneals despite the difference in cycle time.     

Patterning by rapid thermal annealing of GaAs layers grown on diluted nitride QWs

The structural characterization of hole patterns on GaAs cap layers grown on GaInNAs quantum wells (QWs) created by rapid thermal annealing is shown in this work. The effect of annealing temperature on the hole size, as well as the impact of the ion density present during the growth of the QW on the formation of this hole pattern, is presented. Structural (atomic force, scanning electron and transmission electron microscopy) and optical characterization (cathodoluminescence) of the samples is presented. The structure of the planes forming the walls and base of these holes is proposed.     

GaAs VHSIC的离子注入和快速热退火的均匀性研究

研究了改变注入角、ｐ型埋层注入及红外快速热退火对ＧａＡｓＩＣ有源层均匀性的影响，得到了表面形貌好、大面积均匀性良好的注入掺杂有源层。在２英寸圆片上做出的场效应管无栅饱和电流相对偏差２．３％，器件阈值电压标准偏差９８ｍＶ。用该材料做出了６７２门ＧａＡｓ超高速门阵电路，还做出了工作频率为５ＧＨｚ的除二动态分频器。     

Effects of rapid thermal annealing on nitrided gate oxide grown on 4H-SiC

The electrical characteristics of thermally nitrided gate oxides on n-type 4H-SiC, with and without rapid thermal annealing processes, have been investigated and compared in this paper. The effects of annealing time (isothermal annealing) and annealing temperature (isochronal annealing) on the gate oxide quality have also been systematically investigated. After rapid isothermal and isochronal annealings, there has been a significant increase in positive oxide-charge density and in oxide-breakdown time. A correlation between the density of the positive oxide charge and the oxide breakdown reliability has been established. We proposed that the improvement in the oxide-breakdown reliability, tested at electric field of 11 MV/cm, is attributed to trapping of injected electron by the positive oxide charge and not solely due to reduction of SiC-SiO₂ interface-trap density.     

Halogen lamp rapid thermal annealing of Si- and Be-implanted In0.53Ga0.47As

Halogen lamp rapid thermal annealing was used to activate 100 keV Si and 50 keV Be implants in In_0.53Ga_0.47As for doses ranging between 5 × 10¹²−4 × 10¹⁴ cm⁻². Anneals were performed at different temperatures and time durations. Close to one hundred percent activation was obtained for the 4.1 × 10¹³ cm⁻² Si-implant, using an 850° C/5 s anneal. Si in-diffusion was not observed for the rapid thermal annealing temperatures and times used in this study. For the 5 × 10¹³ cm⁻² Be-implant, a maximum activation of 56% was measured. Be-implant depth profiles matched closely with gaussian profiles predicted by LSS theory for the 800° C/5 s anneals. Peak carrier concentrations of 1.7 × 10¹⁹ and 4 × 10¹⁸ cm⁻³ were achieved for the 4 × 10¹⁴ cm⁻² Si and Be implants, respectively. For comparison, furnace anneals were also performed for all doses.     

Si-and Be-implantations in lnP:Fe activated by halogen lamp rapid thermal annealing

Halogen lamp rapid thermal annealing is performed at different temperatures and time durations to activate InP:Fe implanted with 200 keV Si and 60 keV Be ions in the range of 5 x 10¹² -4 x 10¹⁴ cm^-2 . Better electrical properties are obtained in the rapid thermal annealed material than in conventional furnace annealed material. The mea-sured maximum dopant activation and electron mobility for a 200 keV/1 x 10¹⁴ cm^-2 Si-implant are 76% and 1440 cm²/V-s, respectively. For a 60 keV/4 x 10¹⁴ cm^-2 Be-implant an activation of 28% and a sheet resistance of 810 Ω/sq are obtained by using rapid thermal annealing. An implant profile broadening is observed in Be-implanted samples activated with either furnace annealing or rapid thermal annealing.     

Co-Implantation and autocompensation in close contact rapid thermal annealing of Si-implanted GaAs:Cr

Close contact rapid thermal annealing of semi-insulating GaAs:Cr implanted with Si, Si + Al, and Si + P has been studied using variable temperature Hall effect measurements and low temperature (4.2K) photoluminescence (PL) spectroscopy. Isochronal (10 sec) and isothermal (1000° C) anneals indicate that As is lost from the surface during close contact annealing at high anneal temperatures and long anneal times. Samples which were implanted with Si alone show maximum activation at an annealing temperature of 900° C, above which activation efficiency decreases. Low temperature Hall and PL measurements indicate that this reduced activation is due to increasing auto-compensation of Si donors by Si acceptors at higher anneal temperatures. However, co-implantation of column V elements can increase the activation of Si implants by reducing Si occupancy of As sites and increasing Si occupancy of Ga sites, and therebyoffset the effects of As loss from the surface. For samples implanted with Si + P, activation increases continuously up to a maximum at an anneal temperature of 1050° C, and both low temperature Hall and PL measurements indicate that autocompensation does not increase in this case as the anneal temperature increases. In contrast, samples implanted with Si + Al show very low activation and very high compensation at all anneal temperatures, as expected. The use of column V co-implants in conjunction with close contact RTA can produce excellent donor activation of Si implanted GaAs.     

磷（P31^＋）注入Si的快速退火电特性

本文报告了P_(31)~+离子注入Si中快速退火的电特性研究结果。采用高精度四探针测量了P_(31)~+注入层在不同注入剂量下,薄层电阻与退火温度和退火时间的关系。采用自动电化学测量仪PN-4200,测量了P_(31)~+离子注入Si中的载流子剖面分布。     

Study of deep level defect behavior in undoped n-InP (1 0 0) after rapid thermal annealing

The effects of rapid thermal annealing on deep level defects in the undoped n-type InP with Ru as Schottky contact metal have been characterized using deep level transient spectroscopy (DLTS). It is observed that the as-deposited sample exhibit two deep levels with activation energies of 0.66 and 0.89 eV. For the samples annealed at 300 °C and 400 °C, a deep level is identified with activation energies 0.89 and 0.70 eV, respectively below the conduction band. When the sample is annealed at 500 °C, three deep levels are observed with activation energies 0.25, 0.32 and 0.66 eV. Annealing of the sample at 300 °C, orders the lattice of as-grown material by suppressing the defect 0.66 eV (A1) which is found in the as-deposited sample. The trap concentration of the 0.89 eV deep levels is found to be increased with annealing temperature. The deep level 0.32 eV may be due to the lattice defect by thermal damage during rapid thermal annealing process such as vacancies, interstitials and its complexes, indicating the damage of the sample after annealing at 500 °C. The defects observed in all the samples are possibly due to the creation of phosphorous vacancy or phosphorous antisite.     

快速退火BF+注入非晶硅薄膜的显微分析

将具有能量９２ｋｅ Ｖ、剂量１×１０１５／ｃｍ ２ 的 Ｂ Ｆ＋ 注入由 Ｐ Ｅ Ｃ Ｖ Ｄ 方法制备的ａ Ｓｉ∶ Ｈ 薄膜中,然后用功率为 ６０ Ｗ 、束斑直径 ０２ｃｍ 的 Ｃ Ｗ Ｃ Ｏ２ 激光器进行 １０ｓ 快速退火。再用扫描电子显微镜（ Ｓ Ｅ Ｍ）进行显微形貌观察。分析结果指出：由于 Ｂ Ｆ＋ 的注入,使ａ Ｓｉ∶ Ｈ 薄膜中产生了多重结构缺陷,其表面轮廓是类似矩形和方形的图形;发现退火中的晶化是从这些缺陷的棱边开始。最后对晶化过程和机理进行了讨论。     

Rapid thermal annealing of dual Si and P implants in InP

In this study we evaluate the effects of dual implantation with different doses of Si and P on dopant activation efficiency and carrier mobility in InP:Fe. The implants were activated by a rapid thermal annealing step carried out in an optimized phosphoruscontaining ambient. For high dose implants (10¹⁴–10¹⁵ cm⁻²), which are typically employed for source/drain regions in FETs, dual implantation of equal doses of Si and P results in a higher sheet carrier concentration and lower sheet resistance. For 10¹⁴ cm⁻² Si implants at 150 keV, the optimal P co-implant dose is equal to the Si dose for most anneal temperatures. We obtain an activation efficiency of ∼70% for dual implanted samples annealed at 850° C for 10 sec. The high activation efficiencies and low sheet resistances obtained in this study emphasize the importance of stoichiometry control through the use of P co-implants and a phosphorus-containing ambient during the thermal processing of InP.     

Rapid thermal annealing of neutron transmutation doped silicon

Rapid thermal annealing (RTA) of neutron transmutation doped Si wafers is shown to be an alternative to conventional furnace annealing. Measurements of resistivity and deep level transient spectroscopy (DLTS), demonstrated annealing on wafers with diameters up to 75 mm. A 4.5 kW incoherent-light RTA furnace was used. Evidence for crystalline slip was found but this did not appear to affect the results. The slip was more severe for the larger diameter wafers. Some results from a DLTS examination of a partially rapid-thermal-annealed wafer are presented.     

A deep level transient spectroscopy study of rapid thermal annealed arsenic implanted silicon

Deep level traps are observed in silicon that has been implanted with high doses of arsenic and subsequently annealed by rapid thermal annealing. The doses studied create enough damage to form a surface amorphous layer. Annealing temperatures, implant fluence, and the presence of a surface amorphous layer contribute to the type of trap observed. These results show evidence for a clustering/declustering mechanism of arsenic in silicon during rapid thermal annealing.     

Phosphorus-overpressure rapid thermal annealing of indium phosphide

A rapid thermal annealing technique for InP is described in which a controllable phosphorus overpressure, generated by heating red phosphorus, suppresses the dissociation of InP at required annealing temperatures. Two annealing configurations were used to independently study the effects of phosphorus overpressures, anneal temperatures and gas flow rates on the post-anneal electrical and morphological properties of low dose Si-implanted InP:Fe. The advantage of phosphorus overpressure annealing over close-contact annealing is shown, and comparison is made with Si₃N₄ encapsulated annealing. Gas flow velocities close to the sample are found to significantly affect the surface morphology, and a static layer immediately above the sample is found to be beneficial.