Optimal queueing discipline for real-time traffic at ATM switchingnodes

Queueing disciplines at asynchronous transfer mode (ATM) switching nodes handling various kinds of real-time traffic are investigated. ATM can support various new services including voice, data, and video. However, the characteristics of superposed traffic carried by ATM are not known, and a control effective for a versatile arrival process is required. The optimal discipline which minimizes the number of cells being delayed beyond the specified maximum allowable time, and thus being discarded is derived, without assumptions on the arrival process of cells and buffer management schemes. Also discussed is implementation of the optimal discipline and a method of satisfying cell loss probability requirements of individual classes     

Priority queueing strategies and buffer allocation protocols fortraffic control at an ATM integrated broadband switching system

The problem of furnishing an asynchronous transfer mode (ATM) based broadband-ISDN (B-ISDN) with two bearer services supporting different grades of transfer quality is addressed. The focus is on priority bandwidth and buffer management in the ATM communications nodes (switches, multiplexers or concentrators, and expanders) in the context of a multichannel network architecture. Detailed queueing analyses and simulations and results are provided to evaluate the differentiation between traffic classes that can be achieved by different strategies. The implementation complexity of the different schemes is discussed. Various priority queueing strategies characterized mainly by different degrees of resource sharing and a general system model for performance evaluation are introduced. Performance comparisons and design tradeoffs are addressed     

Engineering ATM networks for congestion avoidance

With the combination of telecommunication, entertainment and computer industries, computer networking is adopting a new method called Asynchronous Transfer Mode (ATM) networking. Congestion control plays an important role in the effective and stable operation of ATM networks. Traffic management concerns with the design of a set of mechanisms which ensure that the network bandwidth, buffer and computational resources are efficiently utilized while meeting the various Quality of Service (QoS) guarantees given to sources as part of a traffic contract. In this paper, the most widely recognized congestion control schemes for ABR service are investigated. Some of these schemes show either lack of scalability or fairness while other well‐behaved schemes may require a highly complex switch algorithm that is unsuitable for implementation in cell‐switching high‐speed ATM networks. A new and improved congestion control scheme is proposed to support the best‐effort ABR traffic. This algorithm provides the congestion avoidance ability with high throughput and low delay, in addition to achieving the max–min fairness allocation. This revised version was published online in June 2006 with corrections to the Cover Date.     

Design and evaluation of multicast GFR for supporting TCP/IP over hybrid wired/wireless ATM

The major challenges of designing multicast traffic control protocols for a combined wired/wireless network are the varying transmission characteristics (bandwidth, error, and propagation delay) of the wireless and wired media, and the different, possibly conflicting frame rate requests from multiple sources. To address these issues, in this paper we design and evaluate new unicast and multicast guaranteed frame rate (GFR) schemes for supporting TCP/IP traffic over a combined wired/wireless ATM network. We first propose a new, flexible weighted buffer management, and a frame‐based virtual spacing (VS) mechanism implementing weighted fair queueing. The unicast GFR scheme is based on the integration of the new weighted buffer management, and either cell‐based or frame‐based VS. It is then extended to support multicast GFR flows. The multicast scheme presented in this paper is the first multicast GFR scheme appeared in the literature. These schemes are carefully evaluated over several network configuration, supporting heterogeneous TCP/IP traffic with various frame rates. Simulation results show that the new schemes guarantee the minimum rates requested, provide excellent fairness, and achieve reasonably high efficiency. The new schemes may be extended to provide differentiated service in both IP and mobile IP frame work. This revised version was published online in July 2006 with corrections to the Cover Date.     

基于缓冲区门限的ATM网业务流量控制分析

ＡＴＭ网中许多流量控制策略是基于缓冲区门限的，即根据缓冲区占有情况采取输入业务降速等控制。但以往的文献对这类控制策略的分析缺乏普遍性。本文对这类控制策略建立数学模型，并利用推广的流体流法对Ｏｎ－Ｏｆ业务在这种控制策略下的性能进行理论分析。文中通过数值实验得到一些重要结论。它们对这类控制策略的实现具有指导意义。     

Management and control functions in ATM switching systems

As research has progressed, it has become clear that the main difficulties in ATM pertain to its operational details rather than the concept. And it seems likely that these control issues will be much more complicated and costly for ATM switches when compared with current telephone circuit switches. The asynchronous transfer mode (ATM) is the target switching technique for the future public broadband integrated services digital network (B-ISDN). The purpose of this article is to examine the management and control functions in ATM switching systems implied by current industry standards and agreements on OAM and traffic control. Until now, ATM research in the areas of switch design and traffic control have progressed essentially independently. First, we briefly review the B-ISDN Protocol Reference Model and its representation of the different information flows in ATM. Network management and traffic control principles in ATM, and in particular OAM, are overviewed. With this information as background, we attempt to infer their implications on the functional blocks of an ATM switching system. An example switch architecture model with distributed management and control functions is outlined, and some design issues are discussed     

Traffic management for TCP/IP over satellite ATM networks

Several Ka-band satellite systems have been proposed that will use ATM technology to seamlessly transport Internet traffic. The ATM UBR, GFR, and ABR service categories have been designed for data. However, several studies have reported poor TCP performance over satellite ATM networks. We describe techniques to improve TCP performance over satellite ATM networks. We first discuss the various design options available for TCP end systems, IP-ATM edge devices, as well as ATM switches for long-latency connections. We discuss buffer management policies, guaranteed rate services, and the virtual source/virtual destination option in ATM. We present a comparison of ATM service categories for TCP transport over satellite links. The main goal of this article is to discuss design and performance issues for the transport of TCP over UBR, GFR, and ABR services for satellite ATM networks     

A Shared Buffer Memory ATM Access Switch

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Pushout with virtual thresholds buffer management scheme in a shared buffer ATM switch

In this paper we investigate the performance metrics of buffer management schemes. In general, the selective pushout (SP) scheme can support very low loss probability of the high‐priority cells, but it may cause unfairness of buffer allocation among different output queues and high overall cell loss probability. In order to fit the dynamic required performance metrics of ATM switches, a novel buffer management scheme called pushout with virtual thresholds (PVT) is proposed. In the PVT scheme, each output queue is guaranteed to increase in length until its virtual threshold (VT). Simulation results show the PVT can dynamically achieve the fairness and low overall cell loss probability or very low loss probability of the high priority cells by adequately adjusting the VT. Specially, when the VT = 0, the PVT control can be viewed as the SP control. Copyright © 2003 John Wiley & Sons, Ltd.     

Performance analysis of data packet discarding in ATM networks

Data performance in ATM networks should be measured on the packet level instead of the cell level, since one or more cell losses within each packet is equivalent to the loss of the packet itself. Two packet-level control schemes, packet tail discarding and early packet discarding, were proposed to improve data performance. In this paper, a new stochastic modeling technique is developed for performance evaluation of two existing packet-discarding schemes at a single bottleneck node. We assume that the data arrival process is independent of the nodal congestion, which may represent the unspecified bit-rate traffic class in ATM networks, where no end-to-end feedback control mechanism is implemented. Through numerical study, we explore the effects of buffer capacity, control threshold, packet size, source access rate, underlying high-priority real-time traffic, and loading factor on data performance, and discuss their design tradeoffs. Our study shows that a network system can he entirely shut down in an overload period if no packet-discarding control scheme is implemented, under the assumption that there are no higher layer congestion avoidance schemes. Further, unless with sufficiently large buffer capacity, early packet discarding (EPD) always outperforms packet tail discarding (PTD) significantly under most renditions. Especially under the overload condition, EPD can always achieve about 100% goodput and 0% badput, whereas the PTD performance deteriorates rapidly. Among all the factors, the packet size has a dominant impact on EPD performance. The optimal selection of the EPD queue control threshold to achieve the maximum goodput is found to be relatively insensitive to traffic statistics     

Wireless ATM networks: technology status and future directions

The concept of “wireless ATM” (WATM), first proposed in 1992, is now being actively considered as a potential framework for new-generation wireless communication networks capable of supporting integrated, quality-of service (QoS) based multimedia services. In this review paper, we outline the technological rationale for wireless ATM, present a system-level architecture, and discuss key design issues for both mobile ATM switching infrastructure and radio access subsystems. The WATM radio access layer issues covered in this paper include: spectrum allocation; spectrum etiquette; modem technology; and medium access/data link control (MAC/DLC) protocols. Mobile ATM aspects such as ATM signaling extensions for handoff control, location management, and mobile QoS control are discussed. A summary of current wireless/mobile ATM technology development and standardization status is given, including an outline of our WATMnet prototype. The paper concludes with a discussion of future directions for wireless ATM technology such as Internet protocol (IP) integration and mobile multimedia terminals/applications     

Efficient buffer sharing in shared memory ATM systems with spacepriority traffic

In this letter we study the problem of the optimal design of buffer management policies within the class of pushout and expelling policies for a shared memory asynchronous transfer mode (ATM) switch or demultiplexer fed by traffic containing two different space priorities. A numerical study of the optimal policies for small buffer sizes is used to help design heuristics applicable to large buffer sizes. Simulation studies for large buffer systems are then presented     

An architecture for QoS analysis and experimentation

We have prototyped and have begun to experiment with an extremely flexible ATM cell store. The cell store accommodates 16 K ATM cells and allows complete software control of the buffer management strategy. The prototype was designed to serve as an output port in an experimental ATM switch, but has also been used as a stand-alone component in several research ATM networks. It is envisioned that the cell store will aid in the realization of queueing strategies capable of supporting emerging ATM and IP service models. This paper describes the motivation, background, detailed design, and an application of the ATM cell store     

An ATM queue manager handling multiple delay and loss priorities

The asynchronous transfer mode (ATM) technique has been widely accepted as a flexible and effective scheme to transport various traffic over the future broadband network. To fully utilize network resources while still providing satisfactory quality of service (QOS) to all network users, prioritizing the user's traffic according to their service requirements becomes necessary. During call setup or service provisioning, each service can be assigned a service class determined by a delay priority and a loss priority. A queue manager in ATM network nodes will schedule ATM cells departing and discarding sequence based on their delay and loss priorities. Most queue management schemes proposed so far only consider either one of these two priority types. The queue manager handles multiple delay and loss priorities simultaneously. Moreover, a cell discarding strategy, called push-out, that allows the buffer to be completely shared by all service classes, has been adopted in the queue manager. We propose a practical architecture to implement the queue manager by using available VLSI sequencer chips     

Realization of large capacity ATM switches

Large-capacity ATM switches, with switching capacity in excess of 40 Gb/s or 100 Gb/s, are becoming an essential part of network growth. To realize such switches requires technology know-how as well as implementation trade-off considerations. This article provides a system-level exploration of large-capacity ATM switches in terms of switch fabric scalability, cell buffer management, buffer design trade-off, call processing capabilities, and future trends in switch design     

ATM网络业务恢复机制研究

提出了基于网管控制下的层次化ATM网络业务恢复管理机制，指出了在网络维护管理过程中采用多种恢复机制并进行层次化技术处理的重要性。ATM网络的正常可靠运行需要从网络各个层次，运用各种恢复管理机制对业务进行管理维护。在网络实际运行过程当中，联合应用网络各层次上的恢复管理机制是非常重要的。描述了该技术具体应用以及基于网管控制的业务恢复策略。     

Sharing memory in banyan-based ATM switches

We study a multistage ATM switch in which shared-memory switching elements are arranged in a banyan topology. By “shared-memory,” we mean that each switching element uses output queueing and shares its local cell buffer memory among all its output ports. We apply a buffer management technique called delayed pushout that was originally designed for multistage ATM switches with hierarchical topologies. Delayed pushout combines a pushout mechanism, for sharing memory efficiently among queues within the same switching element, and a backpressure mechanism, for sharing memory across switch stages. The backpressure component has a threshold to restrict the amount of sharing between stages. A synergy emerges when pushout, backpressure, and this threshold are all employed together. Using a computer simulation of the switch under bursty traffic, we study delayed pushout as well as several simpler pushout and backpressure schemes under a variety of traffic conditions. Of the five schemes we simulate, delayed pushout is the only one that performs well under all load conditions     

Applications of neurocomputing in traffic management of ATMnetworks

In the near future, high speed integrated networks, employing asynchronous transfer mode (ATM) cell switching and multiplexing technique, will be used to provide new and diverse mixture of services and applications. Multimedia teleconferencing, video-on-demand, television broadcasting, and distant learning are some examples of these emerging services. The ATM technique is based on the principle of statistical multiplexing, which is flexible enough to support different types of traffic while providing efficient utilization of the network's resources. New classes of techniques such as neural networks and fuzzy logic have many adaptive, learning and computational capabilities that can be utilized to design effective traffic management algorithms. The subject of this paper is to demonstrate how such neurocomputing techniques can be used to address ATM traffic management issues such as traffic characterization, call admission control, usage parameters control and feedback congestion control     

Multiple access control protocols for wireless ATM: problemsdefinition and design objectives

The concept of wireless ATM is now being actively considered as a potential framework for next-generation wireless communication networks capable of supporting integrated multimedia services with different QoS requirements. Several key subsystem design issues for wired ATM and wireless networks need to be readdressed in the scope of the wireless ATM. One of the main key subsystem issues is the development of the appropriate medium access control (MAC) protocol, which has the capability to extend the statistical multiplexing of the wired ATM network into the wireless medium. In this article the authors address the problem of a suitable MAC protocol for the specification of a wireless ATM network and outline the design objectives. In addition, the authors address some other challenging key issues that the wireless medium and wireless network architecture impose on the ATM stack protocol     

A prototype broadcast-and-select photonic ATM switch with a WDMoutput buffer

A rack-mounted prototype of a broadcast-and-select (B and S) photonic ATM switch is fabricated. This switch has an optical output buffer utilizing wavelength division multiplexed (WDM) signals. The WDM technology solves. The cell-collision problem in a broadcast-and-select network and leads to a simple network architecture and the broadcast/multicast function. The prototype can handle 10-Gb/s nonreturn-to-zero (NRZ) coded cells and 5-Gb/s Manchester-coded cells and has a switch size of four. In this prototype, the level and timing design are key issues. Cell-by-cell level fluctuation is overcome by minimizing the loss difference between the optical paths and adopting a differential receiver capable of auto-thresholding. The temperature control of delay lines was successful in maintaining the phase synchronization. Using these techniques, we are able to provide a WDM highway with a bit error rate of less than 10^-12. Fundamental photonic ATM switching functions, such as optical buffering and fast wavelength-channel selection, are achieved. We show our experimental results and demonstrate the high performance and stable operation of a photonic ATM switch for use in high-speed optical switching systems as an interconnect switch for a modular ATM switch and an ATM cross-connect switch