A study on GTO turn-off failure mechanism—A time- and temperature-dependent 1-D model analysis

A 1-D model is presented for use in analyzing the GTO thyristor turn-off process, including the conduction region squeezing effects as well as the current due to temperature variation, i.e., thermal diffusion and the current due to bandgap variation with temperature change. The model simulates current-voltage characteristics for the current concentrated area, where the current density increases almost linearly with the anode voltage. It is found that the nonuniformity in the p-base sheet resistance is a significant cause for the current concentration because of the enhanceddv/dtcurrent due to the excess carrier removal from the highly injected n-base. The model also predicts the limitation to the anode voltage imposed on the device before the current is completely turned off.     

Theoretical and experimental characteristics of the base resistancecontrolled thyristor (BRT)

Described are the characteristics of a new MOS gated thyristor structure called the base resistance controlled thyristor (BRT), in which the turn-off of a thyristor built with an N drift region is achieved by reducing the resistance of the p-base region under MOS gate control. A p-channel MOSFET used to achieve turn-off is formed in the N drift region. The device is designed so that, when the p-channel MOSFET is switched on, holes are diverted from the p-base region of the thyristor into the adjacent p⁺ region, raising the holding current of the thyristor above the operating current level, and turning off the thyristor. Results of extensive 2-D numerical simulations that have been performed to demonstrate operation of this new device concept are discussed. Experimental results on 600-V devices fabricated with an IGBT process have corroborated theoretical predictions. Current densities above 900 A/cm² have been turned off at room temperature with a gate bias of -10 V     

GTO thyristors

Major aspects of gate-turn-off (GTO) thyristors are discussed, including device modeling, design considerations, basic research on their switching phenomena, electrical characteristics, and applications. A device design is considered which would increase the maximum interruptible anode current I_ATO and blocking voltage while decreasing the switching time and power dissipation. The most difficult design problem is to determine the dominant factors that affect I_ATO. From experimental and computational results, it is found that I_ATO is increased by a reduced p-base sheet resistance, a thicker n-base layer and an increased gate-cathode breakdown voltage. The turn-off performance is also improved by introducing several modified device structures, such as an anode-shorted emitter construction, an asymmetric n⁺-doped based structure, a buried gate, and a cathode emitter heterojunction GTO thyristor. Typical characteristics are given for a 5000-V 3000-A unit. GTO applications are discussed, including variable-voltage variable-frequency inverter-controlled AC induction motor drive systems and PWM converter systems     

Floating base thyristor

The floating base thyristor (FBT) is a new thyristor structure in which its p-base region, containing a p⁺ region is not shorted to the n⁺ emitter. Using the DMOS process, an n-channel and a p-channel MOSFET are integrated with the thyristor structure. The device operates in the thyristor mode with a low ON-state voltage drop at even high current densities when a positive bias is applied to, both gates. When a negative bias is applied to the OFF gate, the device operates in the IGBT mode with the saturated current controlled by the positive bias applied to the ON gate     

A time- and temperature-dependent 2-D simulation of the GTO thyristor turn-off process

GTO thyristor turn-off process is analyzed for a resistive load case by performing an exact two-dimensional time- and temperature-dependent numerical simulation. A newly defined concept "on-region" is introduced to help understanding of the simulation results. Excess carrier plasma (on-region) in the p-base is squeezed finally to as narrow as 60 µm wide, accompanying a large current density increase at the center of the middle junction. The carriers in the n-base are found not to be greatly affected by the initial plasma squeezing in the p-base. After the on-region width in the p-base reaches its final limit, the excess carriers around the middle junction of the final on-region is rapidly reduced, resulting in complete anode current turn-off.     

Gate turn-off capability of depletion-mode thyristors

Experimental results are described which demonstrate the ability to switch a thyristor from its ON state to its OFF state by using a depletion layer formed by the application of gate bias to a trench-gate MOSFET integrated within the thyristor structure. The maximum controllable current is found to be a function of the gate bias voltage, the trench depth, and the ambient temperature. The maximum controllable current can be increased by increasing the trench depth and decreasing the p-base sheet resistance. The maximum controllable current decreases at high temperatures, as in the case of other MOS-bipolar devices, but is significantly better than for previous devices. The absolute values of the maximum turnoff current are well above 1000 A/cm² at room temperature and 500 A/cm² at 200°C     

Numerical analysis of turn-off characteristics for a gate turn-off thyristor with a shorted anode emitter

Turn-off current waveform for a gate turn-off thyristor (GTO) with a shorted anode emitter has been calculated numerically by solving the semiconductor basic equations in an equivalent one-dimensional model device. This model is derived from the analysis of current and carrier distributions obtained by a two-dimensional calculation of the on-state of GTO. A calculated turn-off current waveform agrees well with the experimental waveform. The computational time of one case is about 2 min. It is shown that this one-dimensional analysis method is useful for the calculation of the turn-off time. Using this one-dimensional model during the turn-off process and the two-dimensional model in the on-state, the relation between turn-off time and the forward voltage drop can be obtained in relation to the shorted emitter structure. It is shown that the shorted emitter structure is useful to improve this tradeoff relation.     

Current distributions at the lateral spreading of electron-hole plasma in a thyristor

By using the potential probe method, the turn-on action of the three junctions of a thyristor associated with the plasma spreading was investigated as a function of the anode current density Ja. By increasing Ja, the width of the transient region between the ON and the OFF region was increased in the p-base layer but decreased in the n-base layer. The build up of the excess carriers in the p-base layer was due to the lateral field in the transient region, while in the n-base layer it was mainly due to the lateral diffusion from the ON region.     

A New Emitter Switched Thyristor (EST) employing Trench Segmented p-base

A new emitter switched thyristor (EST) employing trench segmented p-base, which successfully improves the forward I-V and switching characteristics with decreasing the device active area, is proposed and verified experimentally with using shallow trench process of novel junction termination extension (JTE) method. The latching current of EST is determined by the p-base resistance of upper npn transistor. Floating n+emitter of conventional EST is enlarged to obtain large base resistance. However, the proposed EST increases the p-base resistance with shorter floating n+ emitter than that of conventional one. Shallow trench in floating emitter region forms the highly resistive p-base region under the bottom of trench. The experimental results show that the shortened floating n+ emitter and lowered latching current of proposed EST decrease experimentally the forward voltage drop by 17.7% and snap-back phenomenon with small active area. The breakdown voltage of series lateral MOSFET of proposed EST is increased from 7 to 14 V due to the trench filled with oxide which results in vertical redistribution of electric field, therefore current saturation capability and forward biased safe operating area (FBSOA) of proposed EST are enhanced. The simulation results show that the switching operation is performed successfully at the blocking voltage of 600 V and Eoff of the proposed one is reduced by 3.7%. The measured inductive load switching characteristics also shows that Eoff of proposed one is improved by 7.2%.     

n型GaAs MESFET沟道特性的研究

报道了ｎ型ＧａＡｓ ＭＥＳＦＥＴ漏源电流Ｉｄｓ和栅源电压Ｖｇｓ间的关系,发现在负栅压状态下,沟道特性分四个区域：过调制区、线性调制区、过渡区和夹断区,并且零栅压饱和漏源电流大的器件线性调制区的范围较大,过渡区的范围较小。     

Ultrahigh-voltage high-current gate turn-off thyristors

High-power GTO's with ratings of 2500 V . 2000 A have been developed, and a 4500 V . 2000 A GTO was trial fabricated and performance tested, for use in traction motor control equipment. Their low ON-state voltage was attained by applying a unique anode emitter shorting structure which does not require doping of a lifetime killer such as gold to obtain suitable GTO characteristics. Their high interrupt current was obtained by introducing a ring-shaped gate structure which has uniform operation between many segments in the devices during turn-off process.     

Numerical simulation of an optoelectronic thyristor in the regime of incomplete turn-off

Direct two-dimensional simulations are used to analyse the possibility of controlling the carrier concentration in the gated base of a GaAs optoelectronic thyristor, which operates in the regime of incomplete turn-off. Modelling results indicate that the number of carriers, light intensity, current distribution, and the position of the light-emitting region the gated base of the thyristor can effectively be changed using gate currents, insufficient to turn the device completely off. The utilization of incomplete turn-off principle can be used for light-intensity modulation and switching purposes.     

Observation of turn-on action in a gate-triggered thyristor using a new microwave technique

The turn-on action by the p-base and n-emitter gates in a thyristor was studied by a new microwave technique. The initial conducting area, the lateral distribution of gate current flowing through the junction, and the time variation of excess carrier density injected into the n-base by the gate current were determined by measuring the reflection of microwave energy, vertically incident upon a small area (0.2 × 0.2 mm²) of the n-emitter layer. The new microwave technique has proved to be useful in designing new gate structures and in studying the operation of new devices.     

Characterizing the turn-off performance of multi-cathode GTOthyristors using thermal imaging

The thermal imaging of a switching gate-turn-off thyristor (GTO) is described. Using this method, the extent of redistribution occurring at turn-off under various gate drive and anode circuit conditions is determined. The effect of redistribution on the device rating and performance is discussed. Any redistribution in the current will be accompanied by an increase in the losses in the region to turn off last, and a reduction in the losses elsewhere. The experimental procedure for making the switching losses dominant is described. Results show that, under certain gate drive and anode-cathode voltage conditions at turn-off, the anode current redistributes between cathode islands, greatly stressing some islands. From this, conclusions are made concerning GTO rating and circuit design     

Realization of an n-channel GaAs/AlGaAs bistable transistor(BISFET)

The first realization of a novel heterostructure device, the bistable field-effect transistor (BISFET), is reported. The device uses an n-channel GaAs/AlGaAs inversion channel structure. It contains a positive feedback loop between the gate and source terminals, which is activated above a gate voltage of 1.7 V. This leads to abrupt transitions between high- and low-current states as the drain voltage is changed, with a switching ratio of 1.5. The transitions are accompanied by sharp changes in gate current as the feedback loop turns on and off. These transitions, referred to as switch up and switch down, form a large hysteresis loop in the drain characteristics. Hysteresis as large as 3.7 V is observed, making the device strongly bistable     

A novel dynamic memory cell with internal voltage gain

A 2T1D dynamic memory cell with two transistors (T) and a gated diode (D) is presented. A gated diode is a two terminal MOS device in which charge is stored when a voltage above the threshold voltage is applied between the gate and the source, and negligible charge is stored otherwise. The gated diode acts as a nonlinear capacitance for voltage boosting, where voltage for 1-data is boosted high and voltage for 0-data stays low, achieving significant voltage gain of the internal stored voltage, higher signal margin, higher current drive and low-voltage memory operation. Details about the gated diode structure, its signal amplification, the memory cell circuits and the array structure, some hardware and test results are presented, followed by comparison to other memory cells and future directions.     

On the temperature behavior of the logarithmic integrated circuit current source

The logarithmic constant current source in silicon integrated circuit form has been analyzed in detail. It is shown that the temperature behavior is critically dependent on the voltage developed across the emitter resistor of the source transistor. This resistor value can be chosen so as to over, under, or perfectly temperature compensate the current source. The results are used to design a current source and are verified by computer simulation.     

Resistive gate DMOST for low distortion mixing

A new device for mixing in the VHF range is presented which has very low third-order distortion. The device consists of a DMOST having a polysilicon resistive gate which is biased by a d.c. current that flows at right angles to the source to drain current in the DMOST. As a result of this gate bias current the device has a drain current to input gate voltage characteristic with a large square low region when the drain operates above the “pinch off” voltage. Samples of the device exhibit an extremely quadratic behaviour over several volts of the input gate voltage.     

Performance analysis of the segment npn anode LIGBT

The performance of a high-voltage lateral insulated gate bipolar transistor (LIGBTs) with segmented n+p/n anode fabricated in junction isolation technology is experimentally investigated at both room and elevated temperatures. Detailed two dimensional numerical modeling of a vertical representation of the structure shows that significant electron current passes through the n/sup +/p/n segment of the anode region during the on-state and when devices are subjected to clamped inductive switching. It is shown that the magnitude of electron current can be controlled by modifying the p-base charge which enables enhancement of the turn-off loss/forward voltage drop tradeoff in comparison to conventional LIGBTs.     

Importance of the n-base width in the turn-off performance of TIL GATT's

The influence of the n-base width on the turn-off performance of two interdigitation level (TIL) gate-assisted turn-off thyristors (GATT's) has been investigated. Devices with n-base width WnB= 250 and 360 µm, respectively, were comparatively tested. The two sets of high-power, 1.7-cm²area, gold-diffused TIL GATT's processed in identical conditions have low on-state losses, good turn-on sensitivity, and exhibit a high degree of immunity to internal noise signals. The investigations have shown that the TIL GATT's with WnB= 360 µm could possess a better efficiency of the turn-off time tqreduction in comparison with their counterparts having a thinner n base. The main physical mechanisms explaining the lack of incompatibility at the fundamental level between a larger n base and a reduced value of tqin TIL GATT's are described in detail. The results of this work show that the high blocking voltage capability, which is mainly a function of the base thickness WnBand doping, is in no way a hindrance in achieving a substantial reduction of tqin TIL GATT's with an adequate gate-assist signal.