Effects of voltage stress on the single event upset (SEU) response of 65 nm flip flop

A newly integrated pulsed laser system has been utilized to investigate the effects of voltage stress on single event upset (SEU) of flip flop chain manufactured in 65 nm bulk CMOS technology. Laser mappings of the flip flop chain revealed that the SEU sensitive regions increased with laser energy. Post-processing of the data from the laser mapping facilitated the plotting of the cross-section versus laser energy curve. We found a clear shift in the cross-section curves after voltage stress of 130 h. Comparisons of data revealed at least a doubled increase in sensitive areas after voltage stress. During the voltage stress, various electrical parameters were monitored and changes were observed. It was found that the increase in SEU sensitivity is related to electrical parameter changes and SPICE simulation results concur likewise.     

10 K NbN ADC for IR sensor applications

The authors report the design, fabrication and test results of a 12-bit NbN SFQ counting A/D converter operating at 9 to 10 K and its insertion into a test IR focal plane array sensor system. The NbN IC is based on a linearized SQUID front-end which generates SFQ pulses at a frequency proportional to the signal. A gated SFQ counter integrates the signal over the sample time and the data is driven off chip through a serializing latching voltage state logic (MVTL) output shift register. The TRW A/D converter chip has been packaged and inserted into an IR focal plane array sensor test facility, or test bed, at the NASA Jet Propulsion Laboratory. The entire system has been successfully demonstrated producing IR images at 100 frames/s with the NbN A/D converter operating at 9 K, dissipating 0.3 mW. Performance of the A/D converter chip, the package including magnetic shielding and medium/high speed signal I/O, and the integrated test bed system are discussed.     

Real-time measurements on a four stage RSFQ-counter with Nb–Al2O3–Nb Josephson junctions

RSFQ-toggle-flipflops with a SFQ-trigger circuit a Josephson transmission line at the input and a SFQ/dc-circuit at the output of each stage are implemented in the Nb–Al₂O₃–Nb Josephson junction technology on a single chip having coplanar wave guides at input and output. The counter is tested successfully at 4.2 K via coplanar/coaxial transitions using a bit pattern generator and a digital oscilloscope at room temperature up to f_I≈2 GHz pulse repetition frequency at the input. The highest test frequency f_I is limited by the available pattern generator.     

Active layer thickness effect on the recombination process of PCDTBT:PC71BM organic solar cells

We investigated the effect of active layer thickness on recombination kinetics of poly[N-9″-hepta-decanyl-2,7-carbazole-alt-5,5-(4′,7′-di-2-thienyl-2′,1′,3′-benzothiadiazole)] (PCDTBT) and [6,6]-phenyl C71-butyric acid methyl ester (PC₇₁BM) based solar cells. Analysis of the fitted Lambert W-function of illuminated current density–voltage (J–V) characteristics revealed increased recombination processes with increased active layer thicknesses. The ideality factor extracted from PCDTBT:PCBM solar cells continuously increased from 1.89 to 3.88 when photoactive layer thickness was increased from 70 to 150 nm. We found that such increase in ideality factor is closely related to the defect density which is increased with increased photoactive layer thickness beyond 110 nm. Therefore, the different density of defect states in PCDTBT:PCBM solar cells causes the different recombination paths where solar cells with a thicker active layer (?110 nm) are considered to undergo coupled trap-assisted recombination processes while single-defect trap-assisted recombination is dominant for thinner (70–90 nm) PCDTBT:PCBM solar cells. As a result, we found that the optimal efficiencies of PCDTBT:PC₇₁BM solar cells were limited to the active layers between 70 and 90 nm. Particularly, when PCDTBT:PC₇₁BM solar cells were optimized with an active layer thickness of 70 nm, energy conversion efficiency reached 6.5% while an increase in thickness led to the reduction of efficiency to 4.7% at 133 nm but then an increase to 5.02% at 150 nm.     

Bit error rate experiments in ring-shaped RSFQ circuits

Ring-shaped rapid single flux quantum (RSFQ) circuits composed of segments of Josephson transmission lines (JTLs) and other RSFQ circuits enable permanent SFQ pulse circulation. New ring structures of different designs have been realized which comprise T-flipflop (TFF) and multiplier (MULT) circuits. Reliability in circuit operation has been proven experimentally by a bit error rate BER≅10⁻¹⁶. The fabrication process has been optimized by using PTB-4 μm Nb/Al₂O₃–Al/Nb trilayer technology with externally shunted tunnel junctions of critical current densities of j_c=≅1 kA/cm². Characteristic voltage is V_c=250 μV and Steward–McCumber parameter β_c≤1. A linear dependence of pulse circulation frequency on JTL bias currents has been measured within a bias current interval of 20%.     

Defects annealing in 4H–SiC epitaxial layer probed by low temperature photoluminescence

The thermal evolution of defects induced in 4H–SiC by multiple implantation of C ions was investigated by Low Temperature Photoluminescence in the temperature range 450–1000 K. The photoluminescence spectra show sharp luminescent lines (alphabet lines) in the wavelength range 426–440 nm upon irradiation and thermal treatment at 450 K induces the appearance of a new line at 427 nm (D_I centre). The trend shown by the luminescence lines as a function of the temperature is quite complex. The alphabet lines intensity increases up to 850 K, whereas at higher temperature decreases with an activation energy of 2.0 eV, suggesting that the defect, responsible for these lines, is the Si-vacancy. The luminescence yield of D_I centre is always increasing as a function of the temperature, with a higher slope from 750 K, suggesting a correlation to the reconfiguration and to the annealing of point defects.     

An LP/CBP reconfigurable analog baseband circuit for software-defined radio receivers in 65 nm CMOS

A low pass (LP) and complex band pass (CBP) reconfigurable analog baseband circuit for software-defined radio (SDR) receivers is presented. It achieves 1–15 MHz LP bandwidth, 2–8 MHz CBP bandwidth and 0–36 dB gain range with 1 dB step. Nulling-resistor Miller feed-forward (NRMFF) differential-mode compensation, passive left half-plane (LHP) zero common-mode compensation and Quasi-Floating Gate (QFG) technique are proposed to improve the high frequency performance and driving capability of the embedded fully differential operational amplifier (Op-Amp). The analog baseband circuit has been implemented in 65 nm CMOS. It achieves 15.2 dB m/27.1 dB m IB/OB-IIP3, −2 dB m IP1dB and 71 dB m IIP2 while consuming 3.6–9.1 mW from a 1.2 V power supply and 0.75 mm² chip area.     

Low-power MicroVrms noise neural spike detector for implantable interface microsystem device

In this paper, an ultra-low-power and low-noise spike detector is proposed for massive integration in the implantable multichannel brain neural recording device. The detector circuit with nonlinear energy operator (NEO) algorithms achieves the spike detecting from action potential including complex noise. The spike detector circuit consists of a differentiator with a fully-differential structure and a multiplier based on CMOS translinear using sub-threshold technique. The differentiator has the steepness of a transmission function with frequency +20 dB/dec, frequency response from 10 Hz to 10.5 kHz. The linear range of multiplier is from −0.9 V to 0.9 V at V_DD = ±1.65 V. The spike detector is implemented in 0.35 μm technology with fully-CMOS process. One detector die size is 0.0187 mm² and its total current consumption of 825 nA. As is demonstrated by measured results, the proposed circuit has detected the instantaneous energy of the input real spike signals well, which the noise of small than 218 μV_rms over a nominal bandwidth of 500–10.5 kHz.     

Effect of sol–gel MgO spin-coating on the performance of TiO2-based dye-sensitized solar cells

This paper is concerned with the improvement of dye-sensitized solar cell (DSSC) efficiency upon MgO post-treatment of the TiO₂ electrode. A simple sol–gel technique, involving magnesium acetate as precursor, ethanol as solvent and nitric acid as stabilizer, is applied to prepare a solution of suspended MgO nanoparticles. A single drop of MgO sol at 0.1 M precursor concentration was spin-coated at 3000 rpm for 30 s onto the TiO₂ electrode and sintered at 500 K for 1 h. Dye-loading using N3-dye was applied for 6 h. An increase in the average efficiency of the DSSC from 2.5% to 3.9% (over 50% enhancement) was recorded. Measurements of the dark I–V characteristics, the open circuit voltage decays, the SEM images and the dye absorbance spectra, for both uncoated and MgO-coated electrodes were examined. The improvement of the DSSC efficiency was attributed to an upward shift of the TiO₂ flat band energy and a reduction of the rate of back-transport and recombination.     

Long-wave (10 μm) infrared light emitting diode device performance

Electroluminescence in the range of 6–12 μm is observed from an Sb-based type-II interband quantum cascade structure. The LED structure has 30 active/injection periods. We have studied both top-emitting and flip-chip mount bottom emitting LED devices. For room temperature operation, an increase, saturation and decrease in light output occur at successively higher injection currents. An increase of about 10 times in light output occurs when device is operated at 77 K compared to room temperature operation. This increase is attributed to reduced Auger non-radiative recombination at lower temperatures. The peak-emission wavelengths at room temperature and 80 K operation are 7 and 10 μm, respectively. These devices can be used for high-temperature simulation in an infrared scene generation experiment.     

Microwave properties and applications of Y–Ba–Cu–O thin films grown on various substrates

Microwave properties of YBa₂Cu₃O_7-δ (YBCO) films grown on (100) LaAlO₃ (LAO), (110) NdGaO₃ (NGO) and (001) SrLaAlO₄ (SLAO) substrates were studied in the form of a microstrip ring resonator at temperatures above 20 K. The YBCO resonator on a SLAO substrate showed microwave properties better than or comparable to other YBCO resonators on LAO substrates. For the YBCO resonators on LAO and SLAO substrates, both Q_U and f₀ appeared to decrease as the temperature was raised. Meanwhile the resonator on a NGO substrate showed different behaviors with Q_U showing a peak at ∼70 K, which are attributed to the unique temperature dependence of the loss tangent of the NGO substrate. An X-band oscillator with a YBCO ring resonator coupled to the circuit was prepared and its properties were investigated at low temperatures. The frequency of the oscillator signal appeared to change from 7.925 GHz at 30 K to 7.878 GHz at 77 K, which was mostly attributed to the change in f₀ of the YBCO ring resonator. The signal power appeared to be more than 4.5 mW at 30 K and 2.1 mW at 77 K, respectively. At 55 K, the frequency of the oscillator signal was 7.917 GHz with the 3 dB-linewidth of 450 Hz.     

A facile chemical reduction approach for effectively tuning thermoelectric properties of PEDOT films

Poly(3,4-ethylenedioxythiophene)–tosylate–polyethylene glycol–polypropylene glycol–polyethylene glycol (PEDOT–Tos–PPP) films were prepared via a vapor phase polymerization (VPP) method. The films possess good electrical conductivity (1550 S cm⁻¹), low Seebeck coefficient (14.9 μV K⁻¹) and thermal conductivity (0.501 W m⁻¹ K⁻¹), and ZT ∼ 0.02 at room temperature (RT, 295 K). Then, the films were treated with NaBH₄/DMSO solutions of different NaBH₄ concentrations to adjust the redox level. After the NaBH₄/DMSO treatment (dedoping), the electrical conductivity of the films continuously decreased from 1550 to 5.7 S cm⁻¹, whereas the Seebeck coefficient steeply increased from 14.9 to 143.5 μV K⁻¹. A maximum power factor of 98.1 μW m⁻¹ K⁻² has been achieved at an optimum redox level. In addition, the thermal conductivity of the PEDOT–Tos–PPP films decrease from 0.501 to 0.451 W m⁻¹ K⁻¹ after treated with 0.04% NaBH₄/DMSO solution. A maximum ZT value of 0.064 has been achieved at RT. The electrical conductivity and thermal conductivity (Seebeck coefficient) of the untreated and 0.04% NaBH₄/DMSO treated PEDOT–Tos–PPP films decrease (increases) with increasing temperature from 295 to 385 K. And the power factor of the films monotonically increases with temperature. The ZT at 385 K of the 0.04% NaBH₄/DMSO treated film is 0.155.     

Thermal characteristics and fabrication of silicon sub-mount based LED package

In this paper, the cost of a light emitting diode (LED) package is lowered by using a silicon substrate as the base attached to the chip, in contrast to the conventional chip-on-board (COB) package. In addition we proposed an LED package with a new structure to promote reliability and lifespan by maximizing heat dissipation from the chip. We designed an LED package combining the advantages of COB based on conventional metal printed circuit board (PCB) and the merits of a silicon sub-mount as a substrate. When an input current 500–1000 mA was applied, the fabricated LED exhibited the light output of approximately 112 lm/W at 29 W. We also measured and compared the thermal resistance of the sub-mount package and conventional COB package. The measured thermal resistance of the sub-mount package with a reflective film of Ag and the COB package were 0.625 K/W and 1.352 K/W, respectively.     

High photosensitivity with enhanced photoelectrical contribution in hybrid nanocomposite flexible UV photodetector

To devise a reliable strategy to develop an ultraviolet (UV) sensitive hybrid photodetector, plasma process is utilized as a single step method for production of large area nanocomposite films based on plasma polymerized aniline–titanium dioxide (PPani–TiO₂). The synthesis of PPani–TiO₂ nanocomposite films are made using reactive magnetron sputtering in combination with plasma polymerization. The deposited PPani–TiO₂ nanocomposite films are characterized and discussed in terms of structural, optical and electrochemical properties. A hybrid flexible nanostructured UV photodetector is constructed from PPani–TiO₂ nanocomposite and its optoelectronic properties are evaluated which exhibits a greatly enhanced photosensitivity resulting in high photoconductive gain (G = 4.56 × 10⁴) and high responsivity (R = 9.36 × 10³ AW⁻¹) under UV illumination of 254 nm. The flexible devices are successfully operated under bending up to 170° (bending radius, R = 8 mm) and showed a good folding strength and stability. The proposed plasma based method provides a green technology where the self-assembly of molecules, that is, the spontaneous association of atomic or molecular building blocks under plasma environment, emerge as a successful strategy to form well-defined structural and morphological units of nanometer dimensions.     

Low-voltage,high speed inkjet-printed flexible complementary polymer electronic circuits

We report the development of high-performance inkjet-printed organic field-effect transistors (OFETs) and complementary circuits using high-k polymer dielectric blends comprising poly(vinylidenefluoride-trifluoroethylene) (P(VDF-TrFE)) and poly(methyl methacrylate) (PMMA) for high-speed and low-voltage operation. Inkjet-printed p-type polymer semiconductors containing alkyl-substituted thienylenevinylene (TV) and dodecylthiophene (PC12TV12T) and n-type P(NDI2OD-T2) OFETs showed high field-effect mobilities of 0.1–0.4 cm² V^?1 s^?1 and low threshold voltages down to 5 V. These OFET properties were modified by changing the blend ratio of P(VDF-TrFE) and PMMA. The optimum blend – a 7:3 wt% mixture of P(VDF-TrFE) and PMMA – was successfully used to realize high-performance complementary inverters and ring oscillators (ROs). The complementary ROs operated at a supplied bias (V_DD) of 5 V and showed an oscillation frequency (f_osc) as high as ～80 kHz at V_DD = 30 V. Furthermore, the f_osc of the complementary ROs was significantly affected by a variety of fundamental parameters such as the electron and hole mobilities, channel width and length, capacitance of the gate dielectrics, V_DD, and the overlap capacitance in the circuit configuration.     

Solvent–vapor induced morphology reconstruction for efficient PCDTBT based polymer solar cells

This paper reports polymer solar cells with a 7% power conversion efficiency (PCE) based on bulk heterojunction (BHJ) composites of the alternating co-polymer, poly[N-9′′-hepta-decanyl-2,7-carbazole-alt-5,5-(4′,7′-di-2-thienyl-2′,1′,3′-benzothiadiazole) (PCDTBT), and the fullerene derivative [6,6]-phenyl C₇₁-butyric acid methyl ester (PC₇₁BM). As confirmed by transmission electron microscopy, solvent–vapor annealing (SVA) of the thin (70 nm) BHJ photoactive layer by exposure to chloroform vapor, for a short period of time (30 s) after deposition, leads to reconstructed nanoscale morphology of donor/acceptor domains, well-dispersed fullerene phase and effective photo-absorption of BHJ. Consequently, SVA-reconstructed devices with a PCDTBT:PC₇₁BM blend ratio of 1:5 (wt%) exhibit ～50% improvement in PCE, with short-circuit current J_sc = 15.65 mA/cm², open-circuit voltage V_oc = 0.87 V, and PCE = 7.03%, in comparison to those of the 1:4 (wt%) blends with SVA treatment.     

Fast,simple ZnO/organic CMOS integrated circuits

Hybrid organic–inorganic CMOS thin-film circuits are a simple, potentially low-cost, approach for large-area, low-power microelectronic applications. We have used atmospheric pressure processes to deposit inorganic ZnO and organic diF TES-ADT semiconductor layers and an Al₂O₃ gate dielectric. The organic semiconductor uses a contact-treatment-related microstructure that allows circuits to operate without directly patterning the organic layer. Using a simple 4-mask process with bifunctional Ti/Au contacts for both ZnO and organic transistors, 7-stage ring oscillators were fabricated and operated at >500 kHz corresponding to a propagation delay of <150 ns/stage at a supply bias of 35 V. These are the fastest organic–inorganic CMOS circuits reported to date.     

Impact of crystallization on ferro-, piezo- and pyro-electric characteristics in thin film P(VDF–TrFE)

In this paper, the impact of the crystallization and polymer chain length of the P(VDF–TrFe) on its dielectric, ferroelectric, piezoelectric and pyroelectric properties are studied. X-rays diffraction (XRD) analysis have revealed that a higher β crystalline phase is obtained with a lower polymer chain length corresponding to a higher grain size for a P(VDF–TrFe) composition of 72.2/27.8 mol.%. The polymer chain morphology was characterized by scanning electron microscopy (SEM) where the fibrils orientation and width were extracted. By coupling both XRD analysis and chain morphology analysis, we have established that an increase of the grain size of the polymer chain enhances the ferroelectric and piezoelectric effects of the P(VDF–TrFe) layer. On the other hand, we observed a slight degradation of its pyroelectric properties. In addition, the piezoelectric coefficient (d₃₃) of the P(VDF–TrFe) was enhanced by decreasing the molecular weight (M_w) of the copolymer, exhibiting a maximum value around −50 pC/N for the composition 72.2/27.8 with a molecular weight of 470 kg/mol. On the opposite, the pyroelectric properties were enhanced for the lowest polymer crystalline grain size studied and obtained with the composition 71/29 mol.% with a molecular weight of 505 kg/mol. A pyroelectric coefficient of 37.8 μC/m² K was measured.     

The effect of annealing temperature on the electronic parameters and carrier transport mechanism of Pt/n-type Ge Schottky diode

The Pt nano-film Schottky diodes on Ge substrate have been fabricated to investigate the effect of annealing temperature on the characteristics of the device. The germanide phase between Pt nano-films and Ge substrate changed and generated interface layer PtGe at 573 K and 673 K, Pt₂Ge₃ at 773 K. The current–voltage(I - V) characteristics of Pt/n-Ge Schottky diodes were measured in the temperature range of 183–303 K. Evaluation of the I - V data has revealed an increase of zero-bias barrier height Φ_B0 but the decrease of ideality factor n with the increase in temperature. Such behaviors have been successfully modeled on the basis of the thermionic emission mechanism by assuming the presence of Gaussian distributions. The variation of electronic transport properties of these Schottky diodes has been inferred to be attributed to combined effects of interfacial reaction and phase transformation during the annealing process. Therefore, the control of Schottky barrier height at metal/Ge interface is important to realize high performance Ge-based CMOS devices.     

Determination of contact parameters of Ni/n-GaP Schottky contacts

The electrical analysis of Ni/n-GaP structure has been investigated by means of current–voltage (I–V), capacitance–voltage (C–V) and capacitance–frequency (C–f) measurements in the temperature range of 120–320 K in dark conditions. The forward bias I–V characteristics have been analyzed on the basis of standard thermionic emission (TE) theory and the characteristic parameters of the Schottky contacts (SCs) such as Schottky barrier height (SBH), ideality factor (n) and series resistance (R_s) have been determined from the I–V measurements. The experimental values of SBH and n for the device ranged from 1.01 eV and 1.27 (at 320 K) to 0.38 eV and 5.93 (at 120 K) for Ni/n-GaP diode, respectively. The interface states in the semiconductor bandgap and their relaxation time have been determined from the C–f characteristics. The interface state density N_ss has ranged from 2.08 × 10¹⁵ (eV^?1 m^?2) at 120 K to 2.7 × 10¹⁵ (eV^?1 m^?2) at 320 K. C_ss has increased with increasing temperature. The relaxation time has ranged from 4.7 × 10^?7 s at 120 K to 5.15 × 10^?7 s at 320 K.