Uncooled multimirror broad-band infrared microbolometers

A new generation of microbolometers were designed, fabricated and tested for the NASA CERES (Clouds and the Earth's Radiant Energy System) instrument to measure the radiation flux at the Earth's surface and the radiant energy now within the atmosphere. These detectors are designed to measure the earth radiances in three spectral channels consisting of a short wave channel of 0.3 to 5 /spl mu/m, a wide-band channel of 0.3 to 100 /spl mu/m and a window channel from 8 to 12 /spl mu/m each housing a 1.5 mm x 1.5 mm microbolometers or alternatively 400 /spl mu/m x 400 mm microbolometers in a 1 /spl times/ 4 array of detectors in each of the three wavelength bands, thus yielding a total of 12 channels. The microbolometers were fabricated by radio frequency (RF) magnetron sputtering at ambient temperature, using polyimide sacrificial layers and standard micromachining techniques. A semiconducting YBaCuO thermometer was employed. A double micromirror structure with multiple resonance cavities was designed to achieve a relatively uniform absorption from 0.3 to 100 /spl mu/m wavelength. Surface micromachining techniques in conjunction with a polyimide sacrificial layer were utilized to create a gap underneath the detector and the Si/sub 3/N/sub 4/ bridge layer. The temperature coefficient of resistance was measured to be -2.8%/K. The voltage responsivities were over 10/sup 3/ V/W, detectivities above 10/sup 8/ cm Hz/sup 1/2//W, noise equivalent power less than 4 /spl times/ 10/sup -10/W/Hz/sup 1/2/ and thermal time constant less than 15 ms.     

A Novel Diamond Microprobe for Neuro-Chemical and -Electrical Recording in Neural Prosthesis

This paper describes the design, microfabrication, and testing of a novel polycrystalline-diamond (poly-C)-based microprobe for possible applications in neural prosthesis. The probe utilizes undoped poly-C with a resistivity on the order of $10^{5} Omegacdothbox{cm}$ as a supporting material, which has a Young's modulus in the range of 400–1000 GPa and is biocompatible. Boron-doped poly-C with a resistivity on the order of $10^{-3} Omegacdot hbox{cm}$ is used as an electrode material, which provides a chemically stable surface for both chemical and electrical detections in neural studies. The probe has eight poly-C electrode sites with diameters ranging from 2 to 150 $muhbox{m}$; the electrode capacitance is approximately 87 $muhbox{F/cm}^{2}$. The measured water potential window of the poly-C electrode spans across negative and positive electrode potentials and typically has a total value of 2.2 V in 1 M KCl. The smallest detectable concentration of norepinephrine (a neurotransmitter) was on the order of 10 nM. The poly-C probe has also been successfully implanted in the auditory cortex area of a guinea pig brain for in vivo neural studies. The recorded signal amplitude was 30–40 $muhbox{V}$ and had a duration of 1 ms. $hfill$[2008-0195]      

Evaluation of elastic properties and temperature effects in Si thin films using an electrostatic microresonator

Laterally driven microresonators were used to estimate the temperature-dependent elastic modulus of single-crystalline Si for microelectromechanical systems (MEMS). The resonators were fabricated through surface micromachining from silicon-on-glass wafers. They were moved laterally by alternating electrostatic force at a series of frequencies, and then a resonance frequency was determined, under temperature cycling in the range of 25/spl deg/C to 600/spl deg/C, by detecting the maximum displacement. The elastic modulus was obtained in the temperature range by Rayleigh's energy method from the detected resonance frequency. At this time, the temperature dependency of elastic modulus was affected by surface oxidation as well as its intrinsic variation: a temperature cycle permanently reduces the resonance frequency. The effect of Si oxidation was analyzed for thermal cycling by applying a simple composite model to the measured frequency data; here the oxide thickness was estimated from the difference in the resonance frequency before and after the temperature cycle, and was confirmed by field-emission scanning electron microscopy. Finally, the temperature coefficient of the elastic modulus of Si in the <110> direction was determined as -64/spl times/10/sup -6/[/spl deg/C/sup -1/]. This value was quite comparable to those reported in previous literatures, and much more so if the specimen temperature is calibrated more exactly.     

Encapsulated submillimeter piezoresistive accelerometers

While micromachined accelerometers are widely available and used in various applications, some biomedical applications require extremely small dimensions (相似文献   

Silicon-on-insulator microfluidic device with monolithic sensor integration for /spl mu/TAS applications

A novel concept for the integration of liquid phase charge sensors into microfluidic devices based on silicon-on-insulator (SOI) technology is reported. Utilizing standard silicon processing we fabricated basic microfluidic cross geometries comprising of 5-10-mm-long and 55-/spl mu/m-wide channels of 3 /spl mu/m depth by wet sacrificial etching of the buried oxide of an SOI substrate. To demonstrate the feasibility of fluid manipulation along the channel we performed electroosmotic pumping of a dye-labeled buffer solution. At selected positions along the channel we patterned the 205-nm thin top silicon layer into freely suspended, 10-/spl mu/m wide bars bridging the channel. We demonstrate how these monolithically integrated bars work as thin-film resistors that sensitively probe changes of the surface potential via the field effect. In this way, a combination of electrokinetic manipulation and separation of charged analytes together with an on-chip electronic detection can provide a new basis for the label-free analysis of, for example, biomolecular species as envisaged in the concept of micrototal analysis systems (/spl mu/TAS) or Lab-on-Chip (LOC).     

An in-plane high-sensitivity, low-noise micro-g silicon accelerometer with CMOS readout circuitry

A high-sensitivity, low-noise in-plane (lateral) capacitive silicon microaccelerometer utilizing a combined surface and bulk micromachining technology is reported. The accelerometer utilizes a 0.5-mm-thick, 2.4/spl times/1.0 mm/sup 2/ proof-mass and high aspect-ratio vertical polysilicon sensing electrodes fabricated using a trench refill process. The electrodes are separated from the proof-mass by a 1.1-/spl mu/m sensing gap formed using a sacrificial oxide layer. The measured device sensitivity is 5.6 pF/g. A CMOS readout circuit utilizing a switched-capacitor front-end /spl Sigma/-/spl Delta/ modulator operating at 1 MHz with chopper stabilization and correlated double sampling technique, can resolve a capacitance of 10 aF over a dynamic range of 120 dB in a 1 Hz BW. The measured input referred noise floor of the accelerometer-CMOS interface circuit is 1.6/spl mu/g//spl radic/Hz in atmosphere.     

New low-stress PECVD poly-SiGe Layers for MEMS

Thick poly-SiGe layers, deposited by plasma-enhanced chemical vapor deposition (PECVD), are very promising structural layers for use in microaccelerometers, microgyroscopes or for thin-film encapsulation, especially for applications where the thermal budget is limited. In this work it is shown for the first time that these layers are an attractive alternative to low-pressure CVD (LPCVD) poly-Si or poly-SiGe because of their high growth rate (100-200 nm/min) and low deposition temperature (520/spl deg/C-590/spl deg/C). The combination of both of these features is impossible to achieve with either LPCVD SiGe (2-30 nm/min growth rate) or LPCVD poly-Si (annealing temperature higher than 900/spl deg/C to achieve structural layer having low tensile stress). Additional advantages are that no nucleation layer is needed (deposition directly on SiO/sub 2/ is possible) and that the as-deposited layers are polycrystalline. No stress or dopant activation anneal of the structural layer is needed since in situ phosphorus doping gives an as-deposited tensile stress down to 20 MPa, and a resistivity of 10 m/spl Omega/-cm to 30 m/spl Omega/-cm. With in situ boron doping, resistivities down to 0.6 m/spl Omega/-cm are possible. The use of these films as an encapsulation layer above an accelerometer is shown.     

Fluidic packaging of microengine and microrocket devices for high-pressure and high-temperature operation

The fluidic packaging of Power MEMS devices such as the MIT microengine and microrocket requires the fabrication of hermetic seals capable of withstanding temperature in the range 20-600/spl deg/C and pressures in the range 100-300 atm. We describe an approach to such packaging by attaching Kovar metal tubes to a silicon device using glass seal technology. Failure due to fracture of the seals is a significant reliability concern in the baseline process: microscopy revealed a large number of voids in the glass, pre-cracks in the glass and silicon, and poor wetting of the glass to silicon. The effects of various processing and materials parameters on these phenomena were examined. A robust procedure, based on the use of metal-coated silicon substrates, was developed to ensure good wetting. The bending strength of single-tube specimens was determined at several temperatures. The dominant failure mode changed from fracture at room temperature to yielding of the glass and Kovar at 600/spl deg/C. The strength in tension at room temperature was analyzed using Weibull statistics; these results indicate a probability of survival of 0.99 at an operational pressure of 125 atm at room temperature for single tubes and a corresponding probability of 0.9 for a packaged device with 11 joints. The residual stresses were analyzed using the method of finite elements and recommendations for the improvement of packaging reliability are suggested.     

Polycrystalline silicon-germanium films for integrated microsystems

Two approaches were demonstrated for fabricating microstructures after completion of CMOS circuits with aluminum metallization. The first approach employed n-type poly-Ge deposited at 400/spl deg/C as a structural material with an SiO/sub 2/ sacrificial layer and an HF release. The CMOS circuits were protected from the release etchant with an amorphous Si layer. Clamped-clamped lateral resonator test structures had quality factors in vacuum as high as /spl sim/30000. Following a 500/spl deg/C, 30 s RTA the poly-Ge stress was 200 MPa (tensile) and the resistivity was 5.3 m/spl Omega/-cm. In the second integration approach, p-type poly-Si/sub 0.35/Ge/sub 0.65/ deposited at 450/spl deg/C was the structural material with poly-Ge as the sacrificial material and H/sub 2/O/sub 2/ as the release etchant. The H/sub 2/O/sub 2/ did not significantly etch the p-type poly-SiGe structural layer and no protection of the underlying CMOS layers was needed. For the first time, the fabrication of LPCVD surface microstructures directly on top of standard electronics was demonstrated, providing dramatic reductions in both MEMS-CMOS interconnect parasitics and device area. A folded flexure lateral resonator had a quality factor in vacuum as high as /spl sim/15000. No stress or dopant-activation anneal was needed, since the in situ boron-doped poly-SiGe was found to have an as-deposited stress of only -10 MPa (compressive) and a resistivity of only 1.8 m/spl Omega/-cm.     

BESOI-based integrated optical silicon accelerometer

The design, simulation, fabrication and characterization of a new integrated optical accelerometer is presented in this paper. The reduction of fabrication, packaging and thermomechanical stresses are considered by keeping the weak mechanical parts free of stresses. The mechanical sensor consists on a quad beam structure with one single mass. In addition, there are two waveguides on the frame of the chip self-aligned to one on the mass of the accelerometer. Four lateral beams increase the mechanical sensitivity and allow the flat displacement of the optical waveguides on the mass. The working principle is based on the variation of the output light intensity versus the acceleration due to the misalignment of the waveguides. The devices have been optimized by the finite-element method to obtain a mechanical sensitivity of 1 /spl mu/m/g. The fabrication technology is based on BESOI wafers combining bulk an surface micromachining. Moreover, machined glass wafers with cavities are bonded to the silicon wafer for packaging and damping control. Special packaging considerations as dicing, polishing and alignment are also presented. Optical measurements at 633 nm shown an optical sensitivity of 2.3 dB/g for negative and 1.7 dB/g for positive acceleration. This difference in the sensitivity has been demonstrated as a consequence of the passivation layer located over the core of the waveguides.     

A low-temperature thin-film electroplated metal vacuum package

This paper presents a packaging technology that employs an electroplated nickel film to vacuum seal a MEMS structure at the wafer level. The package is fabricated in a low-temperature (<250/spl deg/C) 3-mask process by electroplating a 40-/spl mu/m-thick nickel film over an 8-/spl mu/m sacrificial photoresist that is removed prior to package sealing. A large fluidic access port enables an 800/spl times/800 /spl mu/m package to be released in less than three hours. MEMS device release is performed after the formation of the first level package. The maximum fabrication temperature of 250/spl deg/C represents the lowest temperature ever reported for thin film packages (previous low /spl sim/400/spl deg/C). Implementation of electrical feedthroughs in this process requires no planarization. Several mechanisms, based upon localized melting and Pb/Sn solder bumping, for sealing low fluidic resistance feedthroughs have been investigated. This package has been fabricated with an integrated Pirani gauge to further characterize the different sealing technologies. These gauges have been used to establish the hermeticity of the different sealing technologies and have measured a sealing pressure of /spl sim/1.5 torr. Short-term (/spl sim/several weeks) reliability data is also presented.     

IR uncooled bolometers based on amorphous Ge/sub x/Si/sub 1-x/O/sub y/ on silicon micromachined structures

In this work, we present the fabrication of bulk micromachined microbolometers made of amorphous germanium-silicon-oxygen compounds (Ge/sub x/Si/sub 1-x/O/sub y/) grown by reactive sputtering of a Ge/sub 0.85/Si/sub 0.15/ target. We describe the complete procedure for fabricating thermally isolated microbolometers consisting of Ge/sub x/Si/sub 1-x/O/sub y/ sensing films deposited on sputtered silicon dioxide membranes suspended over a silicon substrate. The electrical properties of the sensitive material are set by controlling the deposition parameters of the sputtering technique. Under optimum deposition conditions, Ge/sub x/Si/sub 1-x/O/sub y/ layers with moderate electrical resistivity and thermal coefficient at room temperature as high as -4.2% /spl middot/ K/sup -1/ can be obtained. Isolated structures measured at atmospheric pressure in air have a thermal conductance of 3 /spl times/ 10/sup -6/ W /spl middot/ K/sup -1/ and a thermal capacitance of 6/spl middot/10/sup -9/ W /spl middot/ s /spl middot/ K/sup -1/, yielding a response time of 1.8 ms. Bolometers with an IR responsivity of 380 V /spl middot/ W/sup -1/ and a NEDT of 3.85 K at 100 nA bias current are obtained. The use of sputtered films allows designing a fully low-temperature fabrication process, wholly compatible with silicon integrated circuit technologies.     

Implantable multichannel electrode array based on SOI technology

This work presents a new method of fabricating implantable multielectrode arrays on lightly doped single-crystal silicon. Such arrays are essential tools for electrical stimulation and recording of nerve signals. Our new microfabrication process, based on silicon-on-insulator (SOI) technology, inherently has excellent control over the final probe thickness without wet etching. The needle shanks are 6 mm long and 80 /spl mu/m wide. Here the thickness of the probe, 25 /spl mu/m, is defined by the device layer thickness on the SOI wafer. Our new sprinkler fluidic channel, which has holes spaced 50 /spl mu/m apart along its 6 mm length, permits the perfusion of a large area of tissue with any desired neurotransmitter or other drug. The probes fabricated here are tested in the cat primary visual cortex; data recorded from adjacent neurons was used to characterize their orientation tuning. The sprinkler channel was characterized, and flowrate through the channel is a linear function of the applied pressure.     

Single crystal silicon nano-wire piezoresistors for mechanical sensors

A p-type silicon (Si) nano-wire piezoresistor, whose minimum cross-sectional area is 53 nm/spl times/53 nm, was fabricated by combination of thermal diffusion, EB (electron beam) direct writing and RIE (reactive ion etching). The maximum value of longitudinal piezoresistance coefficient /spl pi//sub l[011]/ of the Si nano-wire piezoresistor was found to be 48/spl times/10/sup -5/ (1/MPa) at surface impurity concentration of 5/spl times/10/sup 19/ (cm/sup -3/) and it has enough sensitivity for mechanical sensor applications. The longitudinal piezoresistance coefficient /spl pi//sub l[011]/ of the Si nano-wire piezoresistor increased up to 60% with a decrease in the cross sectional area, while transverse piezoresistance coefficient /spl pi//sub t[011]/ decreased with a increase in the aspect ratio of the cross section. These phenomena were briefly investigated based on a hole energy consideration and FEM (finite element method) stress analysis.     

Vertical comb array microactuators

A vertical actuator fabricated using a trench-refilled-with-polysilicon (TRiPs) process technology and employing an array of vertical oriented comb electrodes is presented. This actuator structure provides a linear drive to deflection characteristic and a large throw capability which are key features in many sensors, actuators and micromechanisms. The actuation principle and relevant theory is developed, including FastCap simulations for theoretical verification. Design simplifications have been suggested that enable one to use parallel plate analytical expressions which match simulation results with /spl sim/5.6% error. Several actuators were designed and fabricated using the 7-mask TRiPs technology with calculated drive voltages as low as 45 V producing 10 /spl mu/m of deflection. The actuators employed a mechanical structure that was 18 /spl mu/m tall using a polysilicon layer 1.5 /spl mu/m thick and occupying a total area of 750 /spl mu/m by 750 /spl mu/m. The actuators were successfully tested electrostatically and several microns of deflection were observed.     

Fabricating a hollow optical waveguide for optical communication applications

This work demonstrates a direct amorphous Si low-temperature wafer bonding technique to fabricate a semiconductor hollow waveguide with omni-directional reflectors for use in near infrared applications. The 2% dilute KOH solution was used to bond two ODR Si wafers with an amorphous Si thin film on the top of Si wafers. The resultant bonding interface is very thin, with a thickness that is close to that of the SiO/sub 2/ layer in the ODR substrate. Hence, the far-field image shows that light is strongly confined in the waveguides. The propagation loss was reduced to 1.0/spl plusmn/0.5 db/cm in the TE and TM modes, broadening the development of the semiconductor hollow waveguide with omni-directional reflectors for use in optical communication applications.     

A monolithic three-axis micro-g micromachined silicon capacitive accelerometer

A monolithic three-axis micro-g resolution silicon capacitive accelerometer system utilizing a combined surface and bulk micromachining technology is demonstrated. The accelerometer system consists of three individual single-axis accelerometers fabricated in a single substrate using a common fabrication process. All three devices have 475-/spl mu/m-thick silicon proof-mass, large area polysilicon sense/drive electrodes, and small sensing gap (<1.5 /spl mu/m) formed by a2004 sacrificial oxide layer. The fabricated accelerometer is 7/spl times/9 mm/sup 2/ in size, has 100 Hz bandwidth, >/spl sim/5 pF/g measured sensitivity and calculated sub-/spl mu/g//spl radic/Hz mechanical noise floor for all three axes. The total measured noise floor of the hybrid accelerometer assembled with a CMOS interface circuit is 1.60 /spl mu/g//spl radic/Hz (>1.5 kHz) and 1.08 /spl mu/g//spl radic/Hz (>600 Hz) for in-plane and out-of-plane devices, respectively.     

Multiple-stage microfabricated preconcentrator-focuser for micro gas chromatography system

The design, fabrication, and characterization of a multiple-stage Si microfabricated preconcentrator-focuser (/spl mu/PCF) for a micro gas chromatography (/spl mu/GC) system that can provide real-time quantification and identification of complex organic vapor mixtures are presented. The /spl mu/PCF consists of a Si microheater loaded with Carbopack B, Carbopack X, and Carboxen 1000 carbon adsorbent granules, and a Si micromachined cover plate. Deep reactive ion etching is utilized to produce mechanically robust fluidic interconnection adapters hermetically sealed to fused silica capillary tubing for connection to the other components in the /spl mu/GC. This three-stage device is designed to capture compounds spanning up to 4 orders of magnitude in volatility. The dead volume, thermal mass, heating efficiency, and pressure drop of the three-stage /spl mu/PCF are improved significantly over its single-stage /spl mu/PCF predecessor. We demonstrate the successful capture, desorption, and high-resolution chromatographic separation of a mixture of 30 common organic vapors using our three-stage /spl mu/PCF in a conventional GC system. The peak width at half height is <2.05 s for all compounds after elution from the GC column.     

A compact 3D VLSI classifier using bagging threshold network ensembles

A bagging ensemble consists of a set of classifiers trained independently and combined by a majority vote. Such a combination improves generalization performance but can require large amounts of memory and computation, a serious drawback for addressing portable real-time pattern recognition applications. We report here a compact three-dimensional (3D) multiprecision very large-scale integration (VLSI) implementation of a bagging ensemble. In our circuit, individual classifiers are decision trees implemented as threshold networks - one layer of threshold logic units (TLUs) followed by combinatorial logic functions. The hardware was fabricated using 0.7-/spl mu/m CMOS technology and packaged using MCM-V micro-packaging technology. The 3D chip implements up to 192 TLUs operating at a speed of up to 48 GCPPS and implemented in a volume of (/spl omega/ /spl times/ L /spl times/ h) = (2 /spl times/ 2 /spl times/ 0.7) cm/sup 3/. The 3D circuit features a high level of programmability and flexibility offering the possibility to make an efficient use of the hardware resources in order to reduce the power consumption. Successful operation of the 3D chip for various precisions and ensemble sizes is demonstrated through an electronic nose application.     

Flip chip packaging for MEMS microphones

We have developed a microphone package using flip chip technology instead of chip and wire bonding to create smaller MEMS microphones. With this new packaging technology the transducer chip and an ASIC chip are flip chip bonded on a ceramic substrate. The package is sealed by a polymer foil laminated over the chips and by a metal layer. The sound port is on the bottom side in the ceramic substrate. In this paper the packaging technology is explained in detail and results of electro-acoustic characterization and reliability testing are presented. We will also explain the way which has led us from the packaging of Surface Acoustic Wave (SAW) components to the packaging of MEMS microphones.