A prototype 3D optically interconnected neural network

We report the implementation of a prototype three-dimensional (3D) optoelectronic neural network that combines free-space optical interconnects with silicon-VLSI-based optoelectronic circuits. The prototype system consists of a 16-node input, 4-neuron hidden, and a single-neuron output layer, where the denser input-to-hidden-layer connections are optical. The input layer uses PLZT light modulators to generate optical outputs which are distributed over an optoelectronic neural network chip through space-invariant holographic optical interconnects. Optical interconnections provide negligible fan-out delay and allow compact, purely on-chip electronic H-tree type fan-in structure. The small prototype system achieves a measured 8-bit electronic fan-in precision and a calculated maximum speed of 640 million interconnections per second. The system was tested using synaptic weights learned off system and was shown to distinguish any vertical line from any horizontal one in an image of 4×4 pixels. New, more efficient light detector and small-area analog synapse circuits and denser optoelectronic neuron layouts are proposed to scale up the system. A high-speed, feed-forward optoelectronic synapse implementation density of up to 10⁴/cm² seems feasible using new synapse design. A scaling analysis of the system shows that the optically interconnected neural network implementation can provide higher fan-in speed and lower power consumption characteristics than a purely electronic, crossbar-based neural network implementation     

Planar lightwave integrated circuits with embedded actives for board and substrate level optical signal distribution

This paper explores design options for planar optical interconnections integrated onto boards, discusses fabrication options for both beam turning and embedded interconnections to optoelectronic devices, describes integration processes for creating embedded planar optical interconnections, and discusses measurement results for a number of integration schemes that have been demonstrated by the authors. In the area of optical interconnections with beams coupled to and from the board, the topics covered include integrated metal-coated polymer mirrors and volume holographic gratings for optical beam turning perpendicular to the board. Optical interconnections that utilize active thin film (approximately 1-5 /spl mu/m thick) optoelectronic components embedded in the board are also discussed, using both Si and high temperature FR-4 substrates. Both direct and evanescent coupling of optical signals into and out of the waveguide are discussed using embedded optical lasers and photodetectors.     

TFEL optoelectronic integrated circuit on Si

A unique optoelectronic integrated circuit fabricated with AC thin film electroluminescent (TFEL) devices directly onto the drain of an Si DMOS transistor is demonstrated. DMOS switching controls the high voltage ratio between the TFEL device and DMOS transistor. Active matrix addressing for electroluminescent devices is demonstrated using CMOS circuitry     

Microwave photonic multichip modules

The increasing use of microwave frequencies and gigabit per second transmission rates in optical-fibre systems and the corresponding interest in using optical techniques for microwave systems are spurring the development of microwave photonic circuits. Despite a considerable investment in research and development, monolithic photonic and optoelectronic integrated circuits have not entered into widespread production. The paper illustrates that for the majority of microwave photonic applications, the multichip module approach is better suited in terms not only of performance but also of economy and of ease of manufacture. The advantages of the silicon optical bench for optoelectronic integration are discussed in depth. It is then shown how, with suitable modifications, silicon-based multichip modules can also provide interconnections to microwave devices, thus creating microwave photonic multichip modules     

SOI集成光电子器件

Silicon-on-insula tor(SOI)集成光电子器件的工艺与标准CMOS工艺完全兼容,采用SOI技术可以实现低成本的整片集成光电子回路。文章回顾了近几年来SOI集成光电子器件的发展以及一些最新的研究进展。     

On the feasibility of through-wafer optical interconnects for hybrid wafer-scale-integrated architectures

The desire to achieve a high degree of parallelism in multiwafer wafer-scale-integrated (WSI) based architectures has stimulated study of three-dimensional interconnect structures obtained by stacking wafer circuit boards and providing interconnections vertically between wafers over the entire wafer area in addition to planar connections. While the advantages of optical over electrical interconnects for conventional two-dimensional VLSI and wafer-scale-integrated circuits have not been clearly demonstrated, for dense multiwafer WSI or hybrid-WSI three-dimensional architectures, the ability to pass information optically between circuit planes without mechanical electrical contacts offers potential advantages. While optical waveguides are readily fabricated in the wafer plane, waveguiding vertically through the wafer is difficult. If additional processing is required for waveguides or lenses, it should be compatible with standard VLSI processing. This paper presents one method of meeting this criterion. Using optical devices operating at wavelengths beyond the Si absorption cutoff, low-loss through-wafer propagation between WSI circuit planes can be achieved over the distances of interest (≈ 1 mm) with the interstitial Si wafers as part of the interconnect "free-space" transmission medium. The thickness of existing VLSI layers can be readily adjusted in featureless regions of the wafer to provide antireflection windows such that >90 percent transmittance can be obtained through p-type silicon. Initial results show a 400-percent source-detector coupling enhancement is obtainable for these optical interconnections using VLSI process-compatible SiO2phase-reversal zone plate lenses.     

基于Pspice光发射机驱动电路的仿真分析

根据发光二极管（LED）和双异质结激光器（DH-LD）的Pspice等效子电路程序,将它们做成新的元件嵌入Pspice A/D 8.0电路仿真平台中。利用该平台对各种光发射机的光驱动回路进行模拟,证明用光电子器件的等效电路模型来模拟光电集成回路的可行性和便利性。     

High-density 3-D packaging technology based on the sidewall interconnection method and its application for CCD micro-camera visual inspection system

High-density three-dimensional (3-D) packaging technology for a charge coupled device (CCD) micro-camera visual inspection system module has been developed by applying high-density interconnection stacked unit modules. The stacked unit modules have fine-pitch flip-chip interconnections within Cu-column-based solder bumps and high-aspect-ratio Cu sidewall footprints for vertical interconnections. Cu-column-based solder bump design and underfill encapsulation resin characteristics were optimized to reduce the strain in the bump so as to achieve fine-pitch flip-chip interconnection with high-reliability. High-aspect-ratio Cu sidewall footprints were realized by the Cu-filled stacked vias at the edge of the substrate. High-precision distribution of sidewall footprints was achieved by laminating the multiple stacked unit substrates simultaneously. The fabricated high-density 3-D packaging module has operated satisfactorily as the CCD imaging data transmission circuit. The technology was confirmed to be effective for incorporating many large scale integrated (LSI) devices of different sizes at far higher packaging density than it is possible to attain using conventional technology. This paper describes the high-density 3-D packaging technology which enables all of the CCD imaging data transmission circuit devices to be packaged into the restricted space of the CCD micro-camera visual inspection system interior.     

Direct bonding of GaAs films on silicon circuits by epitaxial liftoff

Epitaxial liftoff has emerged as a viable technique to integrate GaAs with silicon. The technique relies on the separation of a thin epi-GaAs film from its substrate followed by direct bonding of the thin film to a silicon substrate. The silicon substrate has to meet certain planarity and smoothness conditions in order to obtain high quality bonding. Unfortunately, processed silicon IC chips do not satisfy these conditions. In this paper, we report on the results of two different planarization techniques, plasma etch back and chemical-mechanical polishing, to integrate GaAs LEDs with silicon circuits using epitaxial liftoff. 4 by 8 arrays of GaAs LEDs have been integrated with silicon driver circuits using plasma etch back. We also have lifted off areas as large as 500 mm² and bonded them on 5″ device wafers by chemical-mechanical polishing. This can be essential for mass production of optoelectronic devices based on epitaxial liftoff.     

Parallel architectures for digital optical cellular imageprocessing

A parallel digital optical cellular image processor (DOCIP) functionally comprises an array of identical I-bit processing elements or cells, a fixed interconnection network, and a control unit. Four interconnection network topologies are described, and include two variants of a mesh-connected array and two variants of a cellular hypercube network. The instruction sets of these single-instruction multiple-data (SIMD) machines are based on a mathematical morphological theory, binary image algebra (BIA), which provide an inherently parallel programming structure for their control. Physically, a DOCIP architecture uses a holographic optical element in a 3D free-space optical system to implement off-chip interconnections, and an optoelectronic spatial light modulator to implement a 2D array of nonlinear processing elements and (optionally) local on-chip interconnections. Two examples are given. The first, an experimental implementation of a single 54-gate cell of the DOCIP, uses an optically recorded hologram for within-cell optical interconnections, and a spatial light modulator for a 2D array of optically accessible gates. The second, a design for an efficient and more manufacturable architecture, uses a computer-generated diffractive optical element for cell-to-cell interconnections, and a 20 smart-pixel array of DOCIP cells, each cell having electronic logic and optical input/output     

Light emission from silicon: Some perspectives and applications

Research on efficient light emission from silicon devices is moving toward leading-edge advances in components for nano-optoelectronics and related areas. A silicon laser is being eagerly sought and may be at hand soon. A key advantage is in the use of silicon-based materials and processing, thereby using high yield and low-cost fabrication techniques. Anticipated applications include an optical emitter for integrated optical circuits, logic, memory, and interconnects; electro-optic isolators; massively parallel optical interconnects and cross connects for integrated circuit chips; lightwave components; high-power discrete and array emitters; and optoelectronic nanocell arrays for detecting biological and chemical agents. The new technical approaches resolve a basic issue with native interband electro-optical emission from bulk Si, which competes with nonradiative phonon- and defect-mediated pathways for electron-hole recombination. Some of the new ways to enhance optical emission efficiency in Si diode devices rely on carrier confinement, including defect and strain engineering in the bulk material. Others use Si nanocrystallites, nanowires, and alloying with Ge and crystal strain methods to achieve the carrier confinement required to boost radiative recombination efficiency. Another approach draws on the considerable progress that has been made in high-efficiency, solar-cell design and uses the reciprocity between photo- and light-emitting diodes. Important advances are also being made with silicon-oxide materials containing optically active rare-earth impurities.     

半导体光集成电路

半导体光集成电路(PIC)是光电子集成电路(OEIC)的一个分支,它侧重于光学互连的导波光电子器件的单片集成。由于Ⅲ-Ⅴ族材料外延晶体生长和相关工艺技术方面的进步,这一研究领域最近取得明显进展。本文讨论了集成有源和无源光波导的某些必要技术,并介绍了几种典型器件。     

Three-Dimensional Integration Technology Based on Wafer Bonding With Vertical Buried Interconnections

A three-dimensional (3-D) integration technology has been developed for the fabrication of a new 3-D shared-memory test chip. This 3-D technology is based on the wafer bonding and thinning method. Five key technologies for 3-D integration were developed, namely, the formation of vertical buried interconnections, metal microbump formations, stacked wafer thinning, wafer alignment, and wafer bonding. Deep trenches having a diameter of 2 mum and a depth of approximately 50 mum were formed in the silicon substrate using inductively coupled plasma etching to form vertical buried interconnections. These trenches were oxidized and filled with n+ polycrystalline silicon or tungsten. The 3-D devices and 3-D shared-memory test chips with three-stacked layers were fabricated by bonding the wafers with vertical buried interconnections after thinning. No characteristic degradation was observed in the fabricated 3-D devices. It was confirmed that fundamental memory operation and broadcast operation between the three memory layers could be successfully performed in the fabricated 3-D shared-memory test chip     

短波中红外硅基光子学进展（特邀）

短波中红外光学（2~2.5 μm）在通信测距、卫星遥感、疾病诊断、军事国防等领域具有广泛的应用。作为短波中红外光学系统的关键核心部件,集成光电器件的开发一直都是重点的研究领域。得益于硅基材料超宽的光谱透明窗口,其在开发短波中红外集成光电子器件方面极具发展前景,近年来获得了广泛的关注。文中简要讨论了短波中红外硅基光子学的应用前景,从无源波导器件（包括波导、光栅耦合器、微型谐振腔、复用/解复用器等）、非线性光学波导器件和光电波导器件（包括调制器和探测器等）三方面综述了短波中红外硅基光子学的发展历史和前沿进展。     

Progress of Si-based Optoelectronic Devices

Si-based optoelectronics is becoming a very active research area due to its potential applications to optical communications. One of the major goals of this study is to realize all-Si optoelectronic integrated circuit. This is due to the fact that Si- based optoelectronic technology can be compatible with Si microelectronic technology. If Si - based optoelectronic devices and integrated circuits can be achieved, it will lead to a new irtformational technological revolution. In the article, the current developments of this exciting field are mainly reviewed in the recent years. The involved contents are the realization of various Si- based optoelectronic devices, such as light- emitting diodes, optical waveguides devices, Si photonic bandgap crystals, and Si laser,etc. Finally, the developed tendency of all-Si optoelectronic integrated technology are predicted in the near future.     

Flexible optical waveguide film fabrications and optoelectronic devices integration for fully embedded board-level optical interconnects

This paper demonstrates a flexible optical waveguide film with integrated optoelectronic devices (vertical-cavity surface-emitting laser (VCSEL) and p-i-n photodiode arrays) for fully embedded board-level optical interconnects. The optical waveguide circuit with 45/spl deg/ micromirror couplers was fabricated on a thin flexible polymeric substrate by soft molding. The 45/spl deg/ couplers were fabricated by cutting the waveguide with a microtome blade. The waveguide core material was SU-8 photoresist, and the cladding was cycloolefin copolymer. A thin VCSEL and p-i-n photodiode array were directly integrated on the waveguide film. Measured propagation loss of a waveguide was 0.6 dB/cm at 850 nm.     

An optically clocked transistor array with dual serial-to-parallel and parallel-to-serial conversion capability for optical label swapping

We propose an optically clocked transistor array optoelectronic integrated circuit (OEIC) for both serial-to-parallel and parallel-to-serial conversion (demux/mux), enabling an interface between high-speed asynchronous burst optical labels and CMOS circuitry for optical label swapping. Dual functionality of the OEIC reduces size, power, and cost of the optical label swapper. The capability for greater than 20-Gb/s conversion operation is demonstrated.     

256-channel bidirectional optical interconnect using VCSELs andphotodiodes on CMOS

Two-dimensional parallel optical interconnects (2-D-POIs) are capable of providing large connectivity between elements in computing and switching systems. Using this technology we have demonstrated a bidirectional optical interconnect between two printed circuit boards containing optoelectronic (OE) very large scale integration (VLSI) circuits. The OE-VLSI circuits were constructed using vertical cavity surface emitting lasers (VCSELs) and photodiodes (PDs) flip-chip bump-bonded to a 0.35-μm complementary metal-oxide-semiconductor (CMOS) chip. The CMOS was comprised of 256 laser driver circuits, 256 receiver circuits, and the corresponding buffering and control circuits required to operate the large transceiver array. This is the first system, to our knowledge, to send bidirectional data optically between OE-VLSI chips that have both VCSELs and photodiodes cointegrated on the same substrate     

Ultralow-threshold-current lasing in inversion channel lasers

A new regime of semiconductor laser operation was observed in quantum-well inversion channels of double heterostructure optoelectronic switches. The quantum-well active region operated with substantial excess negative charge imbalance due to the proximity of a high-density depleted donor charge sheet. Threshold current densities as low as 15 A/cm² in as-cleaved 400-μm-long devices were measured, and unusual high-frequency operation under low power operation was observed. These qualities may be of great significance for optical interconnections and optoelectronic integrated circuits