Fully Transparent p‐MoTe2 2D Transistors Using Ultrathin MoOx/Pt Contact Media for Indium‐Tin‐Oxide Source/Drain

Since transition metal dichalcogenide (TMD) semiconductors are found as 2D van der Waals materials with a discrete energy bandgap, many 2D‐like thin field effect transistors (FETs) and PN diodes are reported as prototype electrical and optoelectronic devices. As a potential application of display electronics, transparent 2D FET devices are also reported recently. Such transparent 2D FETs are very few in report, yet no p‐type channel 2D‐like FETs are seen. Here, 2D‐like thin transparent p‐channel MoTe₂ FETs with oxygen (O₂) plasma‐induced MoO_x/Pt/indium‐tin‐oxide (ITO) contact are reported for the first time. For source/drain contact, 60 s short O₂ plasma and ultrathin Pt‐deposition processes on MoTe₂ surface are sequentially introduced before ITO thin film deposition and patterning. As a result, almost transparent 2D FETs are obtained with a decent mobility of ≈5 cm² V^?1 s^?1, a high ON/OFF current ratio of ≈10⁵, and 70% transmittance. In particular, for normal MoTe₂ FETs without ITO, O₂ plasma process greatly improves the hole injection efficiency and device mobility (≈60 cm² V^?1 s^?1), introducing ultrathin MoO_x between Pt source/drain and MoTe₂. As a final device application, a photovoltaic current modulator, where the transparent FET stably operates as gated by photovoltaic effects, is integrated.     

Full Energy Spectra of Interface State Densities for n‐ and p‐type MoS2 Field‐Effect Transistors

2D materials are promising to overcome the scaling limit of Si field‐effect transistors (FETs). However, the insulator/2D channel interface severely degrades the performance of 2D FETs, and the origin of the degradation remains largely unexplored. Here, the full energy spectra of the interface state densities (D_it) are presented for both n‐ and p‐ MoS₂ FETs, based on the comprehensive and systematic studies, i.e., full rage of channel thickness and various gate stack structures with h‐BN as well as high‐k oxides. For n‐MoS₂, D_it around the mid‐gap is drastically reduced to 5 × 10¹¹ cm^?2 eV^?1 for the heterostructure FET with h‐BN from 5 × 10¹² cm^?2 eV^?1 for the high‐k top‐gate. On the other hand, D_it remains high, ≈ 10¹³ cm^?2 eV^?1, even for the heterostructure FET for p‐MoS₂. The systematic study elucidates that the strain induced externally through the substrate surface roughness and high‐k deposition process is the origin for the interface degradation on conduction band side, while sulfur‐vacancy‐induced defect states dominate the interface degradation on valance band side. The present understanding of the interface properties provides the key to further improving the performance of 2D FETs.     

Non‐Lithographic Fabrication of All‐2D α‐MoTe2 Dual Gate Transistors

As one of the emerging new transition‐metal dichalcogenides materials, molybdenum ditelluride (α‐MoTe₂) is attracting much attention due to its optical and electrical properties. This study fabricates all‐2D MoTe₂‐based field effect transistors (FETs) on glass, using thin hexagonal boron nitride and thin graphene in consideration of good dielectric/channel interface and source/drain contacts, respectively. Distinguished from previous works, in this study, all 2D FETs with α‐MoTe₂ nanoflakes are dual‐gated for driving higher current. Moreover, for the present 2D dual gate FET fabrications on glass, all thermal annealing and lithography processes are intentionally exempted for fully non‐lithographic method using only van der Waal's forces. The dual‐gate MoTe₂ FET displays quite a high hole and electron mobility over ≈20 cm² V^?1 s^?1 along with ON/OFF ratio of ≈10⁵ in maximum as an ambipolar FET and also demonstrates high drain current of a few tens‐to‐hundred μA at a low operation voltage. It appears promising enough to drive organic light emitting diode pixels and NOR logic functions on glass.     

Organic–Inorganic Perovskite Light‐Emitting Electrochemical Cells with a Large Capacitance

While perovskite light‐emitting diodes typically made with high work function anodes and low work function cathodes have recently gained intense interests. Perovskite light‐emitting devices with two high work function electrodes with interesting features are demonstrated here. Firstly, electroluminescence can be easily obtained from both forward and reverse biases. Secondly, the results of impedance spectroscopy indicate that the ionic conductivity in the iodide perovskite (CH₃NH₃PbI₃) is large with a value of ≈10^?8 S cm^?1. Thirdly, the shift of the emission spectrum in the mixed halide perovskite (CH₃NH₃PbI_3?xBr_x) light‐emitting devices indicates that I^? ions are mobile in the perovskites. Fourthly, this work shows that the accumulated ions at the interfaces result in a large capacitance (≈100 μF cm^?2). The above results conclusively prove that the organic–inorganic halide perovskites are solid electrolytes with mixed ionic and electronic conductivity and the light‐emitting device is a light‐emitting electrochemical cell. The work also suggests that the organic–inorganic halide perovskites are potential energy‐storage materials, which may be applicable in the field of solid‐state supercapacitors and batteries.     

Transition Metal Dichalcogenide‐Based Transistor Circuits for Gray Scale Organic Light‐Emitting Displays

Two types of transition metal dichalcogenide (TMD) transistors are applied to demonstrate their possibility as switching/driving elements for the pixel of organic light‐emitting diode (OLED) display. Such TMD materials are 6 nm thin WSe₂ and MoS₂ as a p‐type and n‐type channel, respectively, and the pixel is thus composed of external green OLED and nanoscale thin channel field effect transistors (FETs) for switching and driving. The maximum mobility of WSe₂‐FETs either as switch or as driver is ≈30 cm² V^?1 s^?1, in linear regime of the gate voltage sweep range. Digital (ON/OFF‐switching) and gray‐scale analogue operations of OLED pixel are nicely demonstrated. MoS₂ nanosheet FET‐based pixel is also demonstrated, although limited to alternating gray scale operation of OLED. Device stability issue is still remaining for future study but TMD channel FETs are very promising and novel for their applications to OLED pixel because of their high mobility and I _D ON/OFF ratio.     

High‐Performance,Air‐Stable,Top‐Gate,p‐Channel WSe2 Field‐Effect Transistor with Fluoropolymer Buffer Layer

High‐performance, air‐stable, p‐channel WSe₂ top‐gate field‐effect transistors (FETs) using a bilayer gate dielectric composed of high‐ and low‐k dielectrics are reported. Using only a high‐k Al₂O₃ as the top‐gate dielectric generally degrades the electrical properties of p‐channel WSe₂, therefore, a thin fluoropolymer (Cytop) as a buffer layer to protect the 2D channel from high‐k oxide forming is deposited. As a result, a top‐gate‐patterned 2D WSe₂ FET is realized. The top‐gate p‐channel WSe₂ FET demonstrates a high hole mobility of 100 cm²_­ V^?1 s^?1 and a I_ON/I_OFF ratio > 10⁷ at low gate voltages (V_GS ca. ?4 V) and a drain voltage (V_DS) of ?1 V on a glass substrate. Furthermore, the top‐gate FET shows a very good stability in ambient air with a relative humidity of 45% for 7 days after device fabrication. Our approach of creating a high‐k oxide/low‐k organic bilayer dielectric is advantageous over single‐layer high‐k dielectrics for top‐gate p‐channel WSe₂ FETs, which will lead the way toward future electronic nanodevices and their integration.     

Phthalocyanine‐Based 2D Conjugated Metal‐Organic Framework Nanosheets for High‐Performance Micro‐Supercapacitors

2D conjugated metal‐organic frameworks (2D c‐MOFs) are emerging as a novel class of conductive redox‐active materials for electrochemical energy storage. However, developing 2D c‐MOFs as flexible thin‐film electrodes have been largely limited, due to the lack of capability of solution‐processing and integration into nanodevices arising from the rigid powder samples by solvothermal synthesis. Here, the synthesis of phthalocyanine‐based 2D c‐MOF (Ni₂[CuPc(NH)₈]) nanosheets through ball milling mechanical exfoliation method are reported. The nanosheets feature with average lateral size of ≈160 nm and mean thickness of ≈7 nm (≈10 layers), and exhibit high crystallinity and chemical stability as well as a p‐type semiconducting behavior with mobility of ≈1.5 cm² V^?1 s^?1 at room temperature. Benefiting from the ultrathin feature, the nanosheets allow high utilization of active sites and facile solution‐processability. Thus, micro‐supercapacitor (MSC) devices are fabricated mixing Ni₂[CuPc(NH)₈] nanosheets with exfoliated graphene, which display outstanding cycling stability and a high areal capacitance up to 18.9 mF cm^?2; the performance surpasses most of the reported conducting polymers‐based and 2D materials‐based MSCs.     

Structural and Room‐Temperature Transport Properties of Zinc Blende and Wurtzite InAs Nanowires

Here, direct correlation between the microstructure of InAs nanowires (NWs) and their electronic transport behavior at room temperature is reported. Pure zinc blende (ZB) InAs NWs grown on SiO₂/Si substrates are characterized by a rotational twin along their growth‐direction axis while wurtzite (WZ) InAs NWs grown on InAs (111)B substrates have numerous stacking faults perpendicular to their growth‐direction axis with small ZB segments. In transport measurements on back‐gate field‐effect transistors (FETs) fabricated from both types of NWs, significantly distinct subthreshold characteristics are observed (I_on/I_off ～ 2 for ZB NWs and ～10⁴ for WZ NWs) despite only a slight difference in their transport coefficients. This difference is attributed to spontaneous polarization charges at the WZ/ZB interfaces, which suppress carrier accumulation at the NW surface, thus enabling full depletion of the WZ NW FET channel. 2D Silvaco‐Atlas simulations are used for ZB and WZ channels to analyze subthreshold current flow, and it is found that a polarization charge density of ≥10¹³ cm^?2 leads to good agreement with experimentally observed subthreshold characteristics for a WZ InAs NW given surface‐state densities in the 5 × 10¹¹–5 × 10¹² cm^?2 range.     

Efficient and Durable 3D Self‐Supported Nitrogen‐Doped Carbon‐Coupled Nickel/Cobalt Phosphide Electrodes: Stoichiometric Ratio Regulated Phase‐ and Morphology‐Dependent Overall Water Splitting Performance

The construction of a novel 3D self‐supported integrated Ni_xCo_2?xP@NC (0 < x < 2) nanowall array (NA) on Ni foam (NF) electrode constituting highly dispersed Ni_xCo_2?xP nanoparticles, nanorods, nanocapsules, and nanodendrites embedded in N‐doped carbon (NC) NA grown on NF is reported. Benefiting from the collective effects of special morphological and structural design and electronic structure engineering, the Ni_xCo_2?xP@NC NA/NF electrodes exhibit superior electrocatalytic performance for water splitting with an excellent stability in a wide pH range. The optimal NiCoP@NC NA/NF electrode exhibits the best hydrogen evolution reaction (HER) activity in acidic solution so far, attaining a current density of 10 mA cm^?2 at an overpotential of 34 mV. Moreover, the electrode manifests remarkable performances toward both HER and oxygen evolution reaction in alkaline medium with only small overpotentials of 37 mV at 10 mA cm^?2 and 305 mV at 50 mA cm^?2, respectively. Most importantly, when coupling with the NiCoP@NC NA/NF electrode for overall water splitting, an alkali electrolyzer delivers a current density of 20 mA cm^?2 at a very low cell voltage of ≈1.56 V. In addition, the NiCoP@NC NA/NF electrode has outstanding long‐term durability at j = 10 mA cm^?2 with a negligible degradation in current density over 22 h in both acidic and alkaline media.     

Scalable Production of Graphene Inks via Wet‐Jet Milling Exfoliation for Screen‐Printed Micro‐Supercapacitors

The miniaturization of energy storage units is pivotal for the development of next‐generation portable electronic devices. Micro‐supercapacitors (MSCs) hold great potential to work as on‐chip micro‐power sources and energy storage units complementing batteries and energy harvester systems. Scalable production of supercapacitor materials with cost‐effective and high‐throughput processing methods is crucial for the widespread application of MSCs. Here, wet‐jet milling exfoliation of graphite is reported to scale up the production of graphene as a supercapacitor material. The formulation of aqueous/alcohol‐based graphene inks allows metal‐free, flexible MSCs to be screen‐printed. These MSCs exhibit areal capacitance (C_areal) values up to 1.324 mF cm^?2 (5.296 mF cm^?2 for a single electrode), corresponding to an outstanding volumetric capacitance (C_vol) of 0.490 F cm^?3 (1.961 F cm^?3 for a single electrode). The screen‐printed MSCs can operate up to a power density above 20 mW cm^?2 at an energy density of 0.064 µWh cm^?2. The devices exhibit excellent cycling stability over charge–discharge cycling (10 000 cycles), bending cycling (100 cycles at a bending radius of 1 cm) and folding (up to angles of 180°). Moreover, ethylene vinyl acetate‐encapsulated MSCs retain their electrochemical properties after a home‐laundry cycle, providing waterproof and washable properties for prospective application in wearable electronics.     

Single‐Crystalline p‐Type Zn3As2 Nanowires for Field‐Effect Transistors and Visible‐Light Photodetectors on Rigid and Flexible Substrates

Zn₃As₂ is an important p‐type semiconductor with the merit of high effective mobility. The synthesis of single‐crystalline Zn₃As₂ nanowires (NWs) via a simple chemical vapor deposition method is reported. High‐performance single Zn₃As₂ NW field‐effect transistors (FETs) on rigid SiO₂/Si substrates and visible‐light photodetectors on rigid and flexible substrates are fabricated and studied. As‐fabricated single‐NW FETs exhibit typical p‐type transistor characteristics with the features of high mobility (305.5 cm² V^?1 s^?1) and a high I_on/I_off ratio (10⁵). Single‐NW photodetectors on SiO₂/Si substrate show good sensitivity to visible light. Using the contact printing process, large‐scale ordered Zn₃As₂ NW arrays are successfully assembled on SiO₂/Si substrate to prepare NW thin‐film transistors and photodetectors. The NW‐array photodetectors on rigid SiO₂/Si substrate and flexible PET substrate exhibit enhanced optoelectronic performance compared with the single‐NW devices. The results reveal that the p‐type Zn₃As₂ NWs have important applications in future electronic and optoelectronic devices.     

Knittable and Washable Multifunctional MXene‐Coated Cellulose Yarns

Textile‐based electronics enable the next generation of wearable devices, which have the potential to transform the architecture of consumer electronics. Highly conductive yarns that can be manufactured using industrial‐scale processing and be washed like everyday yarns are needed to fulfill the promise and rapid growth of the smart textile industry. By coating cellulose yarns with Ti₃C₂T_x MXene, highly conductive and electroactive yarns are produced, which can be knitted into textiles using an industrial knitting machine. It is shown that yarns with MXene loading of ≈77 wt% (≈2.2 mg cm^?1) have conductivity of up to 440 S cm^?1. After washing for 45 cycles at temperatures ranging from 30 to 80 °C, MXene‐coated cotton yarns exhibit a minimal increase in resistance while maintaining constant MXene loading. The MXene‐coated cotton yarn electrode offers a specific capacitance of 759.5 mF cm^?1 at 2 mV s^?1. A fully knitted textile‐based capacitive pressure sensor is also prepared, which offers high sensitivity (gauge factor of ≈6.02), wide sensing range of up to ≈20% compression, and excellent cycling stability (2000 cycles at ≈14% compression strain). This work provides new and practical insights toward the development of platform technology that can integrate MXene in cellulose‐based yarns for textile‐based devices.     

Implementation of Low‐Power Electronic Devices Using Solution‐Processed Tantalum Pentoxide Dielectric

The development of solution‐processed field effect transistors (FETs) based on organic and hybrid materials over the past two decades has demonstrated the incredible potential in these technologies. However, solution processed FETs generally require impracticably high voltages to switch on and off, which precludes their application in low‐power devices and prevent their integration with standard logic circuitry. Here, a universal and environmentally benign solution‐processing method for the preparation of Ta₂O₅, HfO₂ and ZrO₂ amorphous dielectric thin films is demonstrated. High mobility CdS FETs are fabricated on such high‐κ dielectric substrates entirely via solution‐processing. The highest mobility, 2.97 cm² V^?1 s^?1 is achieved in the device with Ta₂O₅ dielectric with a low threshold voltage of 1.00 V, which is higher than the mobility of the reference CdS FET with SiO₂ dielectric with an order of magnitude decrease in threshold voltage as well. Because these FETs can be operated at less than 5 V, they may potentially be integrated with existing logic and display circuitry without significant signal amplification. This report demonstrates high‐mobility FETs using solution‐processed Ta₂O₅ dielectrics with drastically reduced power consumption; ≈95% reduction compared to that of the device with a conventional SiO₂ gate dielectric.     

ε‐Branched Flexible Side Chain Substituted Diketopyrrolopyrrole‐Containing Polymers Designed for High Hole and Electron Mobilities

Based on the integrated consideration and engineering of both conjugated backbones and flexible side chains, solution‐processable polymeric semiconductors consisting of a diketopyrrolopyrrole (DPP) backbone and a finely modulated branching side chain (ε‐branched chain) are reported. The subtle change in the branching point from the backbone alters the π?π stacking and the lamellar distances between polymer backbones, which has a significant influence on the charge‐transport properties and in turn the performances of field‐effect transistors (FETs). In addition to their excellent electron mobilities (up to 2.25 cm² V^?1 s^?1), ultra‐high hole mobilities (up to 12.25 cm² V^?1 s^?1) with an on/off ratio (I_on/I_off) of at least 10⁶ are achieved in the FETs fabricated using the polymers. The developed polymers exhibit extraordinarily high electrical performance with both hole and electron mobilities superior to that of unipolar amorphous silicon.     

Stamping of Flexible,Coplanar Micro‐Supercapacitors Using MXene Inks

The fast growth of portable smart electronics and internet of things have greatly stimulated the demand for miniaturized energy storage devices. Micro‐supercapacitors (MSCs), which can provide high power density and a long lifetime, are ideal stand‐alone power sources for smart microelectronics. However, relatively few MSCs exhibit both high areal and volumetric capacitance. Here rapid production of flexible MSCs is demonstrated through a scalable, low‐cost stamping strategy. Combining 3D‐printed stamps with arbitrary shapes and 2D titanium carbide or carbonitride inks (Ti₃C₂T_x and Ti₃CNT_x, respectively, known as MXenes), flexible all‐MXene MSCs with controlled architectures are produced. The interdigitated Ti₃C₂T_x MSC exhibits high areal capacitance: 61 mF cm^?2 at 25 µA cm^?2 and 50 mF cm^?2 as the current density increases by 32 fold. The Ti₃C₂T_x MSCs also showcase capacitive charge storage properties, good cycling lifetime, high energy and power densities, etc. The production of such high‐performance Ti₃C₂T_x MSCs can be easily scaled up by designing pad or cylindrical stamps, followed by a cold rolling process. Collectively, the rapid, efficient production of flexible all‐MXene MSCs with state‐of‐the‐art performance opens new exciting opportunities for future applications in wearable and portable electronics.     

Field-Effect Transistors Based on Formamidinium Tin Triiodide Perovskite

To date, there are no reports of 3D tin perovskite being used as a semiconducting channel in field-effect transistors (FETs). This is probably due to the large amount of trap states and high p-doping typical of this material. Here, the first top-gate bottom-contact FET using formamidinium tin triiodide perovskite films is reported as a semiconducting channel. These FET devices show a hole mobility of up to 0.21 cm² V⁻¹ s⁻¹, an I_ON/OFF ratio of 10⁴, and a relatively small threshold voltage (V_TH) of 2.8 V. Besides the device geometry, the key factor explaining this performance is the reduced doping level of the active layer. In fact, by adding a small amount of the 2D material in the 3D tin perovskite, the crystallinity of FASnI₃ is enhanced, and the trap density and hole carrier density are reduced by one order of magnitude. Importantly, these transistors show enhanced parameters after 20 months of storage in a N₂ atmosphere.     

Water‐Induced Scandium Oxide Dielectric for Low‐Operating Voltage n‐ and p‐Type Metal‐Oxide Thin‐Film Transistors

Solution‐processed metal‐oxide thin films based on high dielectric constant (k) materials have been extensively studied for use in low‐cost and high‐performance thin‐film transistors (TFTs). Here, scandium oxide (ScO_x) is fabricated as a TFT dielectric with excellent electrical properties using a novel water‐inducement method. The thin films are annealed at various temperatures and characterized by using X‐ray diffraction, atomic‐force microscopy, X‐ray photoelectron spectroscopy, optical spectroscopy, and a series of electrical measurements. The optimized ScO_x thin film exhibits a low‐leakage current density of 0.2 nA cm^?2 at 2 MV cm^?1, a large areal capacitance of 460 nF cm^?2 at 20 Hz and a permittivity of 12.1. To verify the possible applications of ScO_x thin films as the gate dielectric in complementary metal oxide semiconductor (CMOS) electronics, they were integrated in both n‐type InZnO (IZO) and p‐type CuO TFTs for testing. The water‐induced full oxide IZO/ScO_x TFTs exhibit an excellent performance, including a high electron mobility of 27.7 cm² V^?1 s^?1, a large current ratio (I_on/I_off) of 2.7 × 10⁷ and high stability. Moreover, as far as we know it is the first time that solution‐processed p‐type oxide TFTs based on a high‐k dielectric are achieved. The as‐fabricated p‐type CuO/ScO_x TFTs exhibit a large I_on/I_off of around 10⁵ and a hole mobility of 0.8 cm² V^?1 at an operating voltage of 3 V. To the best of our knowledge, these electrical parameters are among the highest performances for solution‐processed p‐type TFTs, which represents a great step towards the achievement of low‐cost, all‐oxide, and low‐power consumption CMOS logics.     

High‐Performance Transition Metal Dichalcogenide Photodetectors Enhanced by Self‐Assembled Monolayer Doping

Most doping research into transition metal dichalcogenides (TMDs) has been mainly focused on the improvement of electronic device performance. Here, the effect of self‐assembled monolayer (SAM)‐based doping on the performance of WSe₂‐ and MoS₂‐based transistors and photodetectors is investigated. The achieved doping concentrations are ≈1.4 × 10¹¹ for octadecyltrichlorosilane (OTS) p‐doping and ≈10¹¹ for aminopropyltriethoxysilane (APTES) n‐doping (nondegenerate). Using this SAM doping technique, the field‐effect mobility is increased from 32.58 to 168.9 cm² V^?1 s in OTS/WSe₂ transistors and from 28.75 to 142.2 cm² V^?1 s in APTES/MoS₂ transistors. For the photodetectors, the responsivity is improved by a factor of ≈28.2 (from 517.2 to 1.45 × 10⁴ A W^?1) in the OTS/WSe₂ devices and by a factor of ≈26.4 (from 219 to 5.75 × 10³ A W^?1) in the APTES/MoS₂ devices. The enhanced photoresponsivity values are much higher than that of the previously reported TMD photodetectors. The detectivity enhancement is ≈26.6‐fold in the OTS/WSe₂ devices and ≈24.5‐fold in the APTES/MoS₂ devices and is caused by the increased photocurrent and maintained dark current after doping. The optoelectronic performance is also investigated with different optical powers and the air‐exposure times. This doping study performed on TMD devices will play a significant role for optimizing the performance of future TMD‐based electronic/optoelectronic applications.     

Network Structure Modification‐Enabled Hybrid Polymer Dielectric Film with Zirconia for the Stretchable Transistor Applications

Stretchable electronic devices should be enabled by the smart design of materials and architectures because their commercialization is limited by the tradeoff between stretchability and electrical performance limits. In this study, thin‐film transistors are fabricated using strategies that combine the unit process of a novel hybrid gate insulator and low‐temperature indium gallium tin oxide (IGTO) channel layer and a stress‐relief substrate structure. Novel hybrid dielectric films are synthesized and their molecular structural configurations are analyzed. These films consist of a polymer [poly(4‐vinylphenol‐co‐methylmethacrylate)], cross‐linkers having different binding structures [1,6‐bis(trimethoxysilyl)hexane (BTMSH), dodecyltrimethoxysilane, and poly(melamine‐co‐formaldehyde)], and an inorganic zirconia component (ZrO_x). The hybrid film with BTMSH cross‐linker and 0.2 M ZrO_x exhibits excellent insulating properties as well as mechanical stretchability. IGTO transistors fabricated on polyimide‐coated glass substrates are transferred to the rubber substrate to offer stretchability of the transistor pixelated thin‐film transistors. IGTO transistors fabricated on stretchable substrates using these strategies show promising electrical performance and mechanical durability. After 200 stretchability test cycles under uniaxial elongation of approximately 300%, the IGTO transistor still retains a high carrier mobility of 21.7 cm² V^?1 s^?1, a low sub‐threshold gate swing of 0.68 V decade^?1 and a high I_ON/OFF ratio of 2.0 × 10⁷.     

Shallow and Undoped Germanium Quantum Wells: A Playground for Spin and Hybrid Quantum Technology

Buried‐channel semiconductor heterostructures are an archetype material platform for the fabrication of gated semiconductor quantum devices. Sharp confinement potential is obtained by positioning the channel near the surface; however, nearby surface states degrade the electrical properties of the starting material. Here, a 2D hole gas of high mobility (5 × 10⁵ cm² V^?1 s^?1) is demonstrated in a very shallow strained germanium (Ge) channel, which is located only 22 nm below the surface. The top‐gate of a dopant‐less field effect transistor controls the channel carrier density confined in an undoped Ge/SiGe heterostructure with reduced background contamination, sharp interfaces, and high uniformity. The high mobility leads to mean free paths ≈ 6 µm, setting new benchmarks for holes in shallow field effect transistors. The high mobility, along with a percolation density of 1.2 × 10¹¹cm^?2, light effective mass (0.09m_e), and high effective g‐factor (up to 9.2) highlight the potential of undoped Ge/SiGe as a low‐disorder material platform for hybrid quantum technologies.