基于H.264实时编码的多核并行算法

针对H.264多核实时编码架构,根据编码模块的数据依赖关系,提出基于相邻宏块的并行算法,融合Slice级、宏块行级和相邻宏块级并行算法,实现多粒度并行编码算法,加大了数据并行深度。实验结果表明,该并行编码算法在图像质量几乎不变的情况下能有效提高并行加速比。     

紧耦合式实时视频通信架构分析与测试

当前实时视频通信系统中,视频编解码模块和传输协议工作在相对独立的控制回路中,对编码的速率控制粒度较粗,影响了视频通信性能.针对此问题,引入了一种新型紧耦合式的实时视频通信架构.介绍了该架构中基于VP8编解码标准实现的纯函数式编解码器;重点分析了视频编解码和视频数据收发过程中的状态选择、状态转换和状态同步以及该架构下的传...     

HEVC帧内预测Planar和DC模式的VLSI架构设计与实现

在研究新一代高性能视频编码标准（HEVC）帧内预测中planar和DC模式预测算法的基础上,分别设计了高效VLSI架构,通过状态机的自适应控制和模块的复用来实现速度的提高和面积的减少。针对planar模式,设计了一种基于状态机自适应控制的寄存器累加架构;针对DC模式,设计了一种基于算法的分割处理架构。实验结果表明,所设计的架构在TSMC180 nm的工艺下最高频率为350 MHz,面积合计为68.1 kgate,能够实现对4∶2∶0格式7 680×4 320@30 f/s视频序列的实时编码,最高工作频率可以达到23.4 MHz。     

基于CUDA的快速图像压缩

为了进一步提高JPEG编码效率,对JPEG压缩算法进行研究,分析得出JPEG核心步骤可以并行化处理.因此,实现平台宜采用以并行计算为优势的GPU,而不是以串行计算为主的CPU.NVIDIA新推出的CUDA(计算统一设备架构)为此实现提供了软硬件环境.CUDA是基于GPU进行通用计算的开发平台,非常适合大规模的并行数据计算.在GPU流处理器架构下用CUDA技术实现编码并行化,并针对流处理器架构特点进行内存读写等方面的优化,提高了JPEG编码的速度.实验结果表明了CUDA技术在并行处理方面的优越性,JPEG编码效率得到了极大提高.     

基于CUDA的并行全搜索运动估计算法

为了提高H.264视频编码效率,基于计算统一设备架构(CUDA)的并行全搜索运动估计算法,并利用GPU强大的计算能力和CUDA优化的存储层次结构,以加速H.264编码中的运动估计.与传统的以牺牲视频质量来提升运动估计性能的方法不同,该算法在保证视频质量的同时,结合运动估计计算密集、计算量大等特点,充分利用CUDA架构的并行性加快运动估计的速度,从而达到提高实时编码速度的目的.在GTX280实验平台上的实验结果显示,采用文中算法比优化的CPU实现可获得高达70倍的加速比.     

基于IEEE Std1500的IP核并行测试控制架构设计

随着IEEE 1500标准的不断推广应用,兼容该标准的IP核也越来越多,具有IEEE 1500标准结构的IP核也被越来越多的应用到片上系统的设计中;由于IEEE 1500标准定义了外壳架构和测试访问机制,因此如何实现片上系统中IP核的外壳架构和测试访问机制的测试控制便成为研究的热点问题;文章在研究标准的基础上,基于外壳架构和CAS-BUS测试访问机制,提出IP核的并行测试控制架构,通过多IP核的仿真时序图分析,验证了测试控制架构的有效性;该架构能够实现多IP核的并行测试控制,节约了测试时间,提高了测试效率,为片上系统的测试控制提供一种新思路。     

基于高清编码的自适应Slice划分算法

对于多核高清视频实时编码系统,提出一种自适应Slice划分算法。该算法基于码率控制和熵编码复杂度模型,通过Intra预测得到当前编码图像的纹理复杂度分布,预测编码图像的计算复杂度分布,通过自适应Slice划分实现多核间计算复杂度均匀分配,从而提高多核并行编码效率。实验结果表明,与固定宏块数的Slice划分算法相比,该算法能更有效地提高并行加速比。     

大规模MIMO中基于低复杂度雅克比预编码算法及实现

迫零线性预编码可以获得接近最优的系统容量,不同于传统MIMO系统,大规模MIMO将会配置成百根天线,随着天线数量增加,使得迫零线性预编码矩阵求逆计算复杂,不利于在应用中实现。为了减小线性预编码计算复杂度,提出基于低复杂度的雅克比迭代算法,该算法通过线性迭代,避免了矩阵求逆运算,减少了计算量。为了更进一步的减少计算时间,提出基于统一计算架构的异构多核并行算法,该方法利用GPU具有多核多线程结构特点,实现了异构多核并行计算。仿真结果表明,基于低复杂度雅克比预编码算法可以达到迫零预编码算法性能,同时与传统的线性预编码相比,该算法的计算量更少、时间更短。     

通用可编程LDPC编码器的设计

基于灵活性和通用性的考虑,设计一种基于多指令、多数据流的可编程处理器结构,实现准循环低密度奇偶校验码(LDPC)的编码算法。与传统的LDPC编码器相比,处理器采用数据位拼接方式实现矩阵与向量相乘,可以获得较高的计算速度、易于芯片布局。目前已经用硬件描述语言在Xilinx ISE平台可编程门阵列芯片XC2VP20上仿真实现了该处理器的架构,最大时钟频率为75 MHz。实验结果表明,该结构适用于多标准的LDPC编码器。     

基于Android的校园服务平台的设计与实现

随着移动互联网的飞速发展,以及Android系统的智能手机在大学生中的普及,为了丰富大学生活,设计并实现了基于Android的校园服务平台。按照软件开发流程,对该平台进行需求分析、功能模块设计、数据库设计,最终编码实现,给出了实现过程中的系统架构和关键技术,以及Android客户端和基于SSH框架的服务器端的运行效果。     

Software-based serverless endpoint video combiner architecture for high-definition multiparty video conferencing

This paper proposes an endpoint video combiner architecture in a multipoint control unit (MCU) system for high definition multiparty video conferencing. The proposed architecture addresses the current reliability, computational and quality drawbacks of a conventional centralized based video combiner architecture. This is achieved by redesigning the MCU video to move away the video combiner from the bridge and into the client endpoints. Moreover, the proposed architecture represents a serverless system and is able to scale a large number of clients at high resolutions in a multipoint video conferencing session. In order to realize this design, this paper also proposes a custom robust sustainable session management protocol which allows a dynamic multi-port management between the MCU video and client endpoints. In addition, the proposed custom session management protocol includes recommendation for a session protection structure. Experimental results suggest that the proposed architecture exhibits significant computational frame rate performance gains of up to 762.95% in comparison with the conventional centralized video combiner architecture based on a series of four and eight high definition combined video assessments. Moreover, reliability analysis suggests that the proposed architecture is also able to consistently sustain a high frame rate performance within a long duration high definition multipoint video conferencing session.     

基于流量控制的视频网格结构设计与性能分析

在二级视频网格和三级视频网格结构的基础上,提出当某区域服务器的网络带宽占用达到所设定的阈值时,将部分具有较高配置的客户端主机作为加盟服务器使用,以降低区域服务器的工作负载,同时原有的结构被扩展为树状的多级结构.详细论述了这种基于数据流量控制的多级视频网格结构的设计和工作模式,以及当加盟服务器突然失效时点播服务的平稳迁移策略.通过视频网格模拟器VGSim对这3种结构的视频网格服务能力进行模拟,结果表明,基于数据流量控制的多级视频网格结构的服务能力被有效增强.     

基于ARM和DSP的远程视频监控系统的设计与实现

本文提出了一种基于ARM和DSP的远程视频监控系统的体系结构,该体系结构将硬件分为两大模块,以Philips LPC2114为中央处理器的系统控制模块主要完成系统的控制功能 ,以Blackfin ADSP-BF533为中央处理器的图像处理模块主要完成御EG4视频流的压缩及自适应网络传输。本文还介绍了嵌入式网络视频服务器和远程控制平台的软件设计与实 现。通过自定义协议,系统实现了数据的可靠传输和MPEG-4视频流图像的平滑传输,各项指标均符合设计要求。     

Efficient hardware architecture of 2D-scan-based wavelet watermarking for image and video

This paper describes an efficient hardware architecture of 2D-Scan-based-Wavelet watermarking for image and video. The potential application for this architecture includes broadcast monitoring of video sequences for High Definition Television (HDTV) and DVD protection and access control. The proposed 2D design allows even distribution of the processing load onto a set of filters, with each set performing the calculation for one dimension according to the scan-based process. The video protection is achieved by the insertion of watermarks bank within the middle frequency of wavelet coefficients related to video frames by their selective quantization. The 2-D DWT is applied for both video stream and watermark in order to make the watermarking scheme robust and perceptually invisible. The proposed architecture has a very simple control part, since the data are operated in a row-column-slice fashion. This organization reduces the requirement of on-chip memory. In addition, the control unit selects which coefficient to pass to the low-pass and high-pass filters. The on-chip memory will be small as compared to the input size since it depends solely on the filter sizes. Due to the pipelining, all filters are utilized for 100% of the time except during the start-up and wind-down times. The major contribution of this research is towards the selection of appropriate real time watermarking scheme and performing a trade-off between the algorithmic aspects of our proposed watermarking scheme and the hardware implementation technique. The hardware architecture is designed, as a watermarking based IP core with the Avalon interface related to NIOS embedded processor, and tested in order to evaluate the performance of our proposed watermarking algorithm. This architecture has been implemented on the Altera Stratix-II Field Programmable Gate Array (FPGA) prototyping board. Experimental results are presented to demonstrate the capability of the proposed watermarking system for real time applications and its robustness against malicious attacks.     

基于FPGA的实时视频处理平台设计

为了能够实时地采集、处理、显示视频,设计并实现了一种基于双PowerPC硬核架构的实时视频处理平台;用硬件实现视频的预处理算法,并以用户IP核的形式添加到硬件系统中,上层的视频处理软件程序则直接从存储器中调用预处理后的图像数据;重点介绍了在FPGA上构建双PowerPC硬核架构的硬件系统;采用乒乓控制算法缓存一行图像数据;用DMA的方式将图像数据保存在存储器中;以边缘检测作为视频预处理算法的一个实例,在平台上实现,实验结果表明,用本平台实现仅需40ms;本平台能够实时处理视频,具有较高的实用价值。     

A secure framework of the surveillance video network integrating heterogeneous video formats and protocols

Recently, IT technologies are becoming focused on different traditional industries. The large scaled intelligent video surveillance system is one of them and it integrates a large number of digitalized CCTV [1] devices through the Web. However, existing video devices have been deployed for many years by different vendors as different models with different specifications. To integrate these heterogeneous devices, the centralized management server (CMS) and its clients need a specialized architecture to deal with different types of media encodings and connection protocols etc. In particular, well-defined access control mechanism is required for a large scaled surveillance video network. In this paper, we designed and implemented a server that incorporates the architecture integrating and delivering multiple video streams from different types of video devices to multiple clients and securing the access to the video streams.     

城市监控联网平台视频播放器

针对城市监控联网平台视频播放器进行研究,通过分析现存视频播放器的优缺点,提出了一种新型多功能的播放器.该播放器是以VLC架构为基础,结合C# ActiveX控件技术、流媒体技术实现的B/S模式视频播放器.经实践证明,该播放器很大程度上提高了安防工作者的工作效率,减少了人力的浪费,具有很好的实用价值和应用前景.     

支持新型控制协议SIP的电力系统视频监控设计

针对电力系统视频监控工程的实际技术问题,采用嵌入式设备和基于网络分层的SIP管理架构,提出了一种支持新型控制协议SIP的电力系统视频监控设计,包括SIP的控制机制、基于SIP的监控系统结构、视频监控系统总体组成、硬件设计、软件设计和实验结论等;该系统的各成员之间可以通过组播或单播的方式进行交互,并在域内处理大量的信令信息和媒体流信息,具有扩展性、智能性、灵活性、自主性和互操作性等多种优良特性;经测试指标符合技术规范,实现了电力系统视频监控管理及控制的基本和扩展功能。     

A Multicast-Enabled Delivery Framework for QoE Assurance of Over-The-Top Services in Multimedia Access Networks

Over-The-Top (OTT) video services are becoming more and more important in today’s broadband access networks. While original OTT services only offered short duration medium quality videos, more recently, premium content such as high definition full feature movies and live video are offered as well. For operators, who see the potential in providing Quality of Experience (QoE) assurance for an increased revenue, this introduces important new network management challenges. Traditional network management paradigms are often not suited for ensuring QoE guarantees as the provider does not have any control on the content’s origin. In this article, we focus on the management of an OTT-based video service. We present a loosely coupled architecture that can be seamlessly integrated into an existing OTT-based video delivery architecture. The framework has the goal of resolving the network bottleneck that might occur from high peaks in the requests for OTT video services. The proposed approach groups the existing Hypertext Transfer Protocol (HTTP) based video connections to be multicasted over an access network’s bottleneck and then splits them again to reconstruct the original HTTP connections. A prototype of this architecture is presented, which includes the caching of videos and incorporates retransmission schemes to ensure robust transmission. Furthermore, an autonomic algorithm is presented that allows to intelligently select which OTT videos need to be multicasted by making a remote assessment of the cache state to predict the future availability of content. The approach was evaluated through both simulation and large scale emulation and shows a significant gain in scalability of the prototype compared to a traditional video delivery architecture.     

Peer Assisted Video Streaming With Supply-Demand-Based Cache Optimization

In this paper, we consider a hybrid P2P video on-demand architecture that utilizes both the server and the peer resources for efficient transmission of popular videos. In our system architecture, each peer dedicates some cache space to store a particular segment of a video file as well as some of its upload bandwidth to serve the cached segment to other peers. Peers join the system and issue a streaming request to a control server. Control server directs the peers to streaming servers or to other peers who have the desired video segments. Control server also decides which peer should cache which video segment. Our main contribution in this paper is to determine the proper caching strategies at peers such that we minimize the average load on the streaming servers.