共查询到19条相似文献,搜索用时 78 毫秒
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文中介绍了以AD603为核心构成的低噪声可变增益放大器的实用电路,通过模式选择、引脚编程,可选择不同的带宽,以及得到不同的增益.通过对增益控制方式的选择,可得到最佳的信噪比. 相似文献
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一种具有新型增益控制技术的CMOS宽带可变增益LNA 总被引:1,自引:0,他引:1
高速超宽带无线通信的多标准融合是未来射频器件的发展趋势,该文提出一种基于CMOS工艺、具有新型增益控制技术的宽带低噪声放大器(LNA),采用并联电阻反馈实现宽带输入匹配,并引入噪声消除技术来减小噪声以提高低噪声性能;输出带有新型6位数字可编程增益控制电路以实现可变增益。采用中芯国际0.13m RF CMOS工艺流片,芯片面积为0.76 mm2。测试结果表明LNA工作频段为1.1-1.8 GHz,最大增益为21.8 dB、最小增益8.2 dB,共7种增益模式。最小噪声系数为2.7 dB,典型的IIP3为-7 dBm。 相似文献
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《固体电子学研究与进展》2004,24(3):336-336
南京电子器件研究所于 2 0 0 2年已研制出 WFD0 0 2 0型 2~ 8GHz Ga As单片可变增益低噪声放大器芯片。该放大器采用南京电子器件研究所 76mm圆片 0 .5 μm PHEMT标准工艺制作而成。它由三级放大器和一个衰减器组成 ,采用 7个 PHEMT、若干无源元件组成 ,高度集成在 3.6mm× 2 .2 mm的 Ga As衬底上。三级放大器的电源为 +5 V,放大器芯片的增益可以由衰减器控制。衰减器连接在第二和第三级放大器之间。测得该芯片工作频率范围为 2~ 8GHz,在零衰减时 ,整个带内增益大于 2 5 d B,噪声系数不大于 3.5 d B,增益平坦度小于± 0 .75 d… 相似文献
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低噪声放大器是超宽带接收机系统中最重要的模块之一,设计了一种可应用于3.1~5.2GHz频段超宽带可变增益低噪声放大器。电路输入级采用共栅结构实现超宽带输入匹配,并引入电流舵结构实现了放大器的可变增益。仿真基于TSMC 0.18μm RF CMOS工艺。结果表明,在全频段电路的最大功率增益为10.5dB,增益平坦度小于0.5dB,噪声系数小于5dB,输入反射系数低于-15dB,在1.8V电源电压下,功耗为9mW。因此,该电路能够在低功耗超宽带射频接收机系统中应用。 相似文献
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提出了一种增益高且增益可调谐的1~3 GHz宽带低噪声放大器(HTG-LNA)。在输入级,采用带有RC串联负反馈的共基-共射电流镜结构,实现了良好的输入匹配,并提高了电路的稳定性;在中间级,采用以有源电感作为负载的共基-共射达林顿电路结构,在保证宽带的同时实现了较高的增益与增益的可调谐;在输出级,采用带有电流镜的射极跟随器结构,获得了较大的输出功率和良好的输出匹配。基于稳懋0.2 μm GaAs HBT工艺进行验证,结果表明,该HTG-LNA的电压增益大于37 dB,最高可达50.7 dB;功率增益大于37.4 dB,最高可达51 dB;最大增益可调谐幅度为2.2 dB;输入回波损耗小于-7.11 dB;输出回波损耗小于-11.97 dB;噪声系数小于3.23 dB;稳定因子大于5.61;在5 V工作电压下,静态功耗小于65 mW。 相似文献
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设计了一种工作频率为2.4 GHz的低功耗可变增益低噪声放大器。针对不同的增益模式,采用不同的设计方法来满足不同的性能要求。在高增益模式下,通过理论分析,提出了一种新的定功耗约束条件下的噪声优化方法,考虑了栅匹配电感的损耗和输入端口的各种寄生效应,给出了简明而有效的设计公式和设计过程。在低增益模式下,提出了一种改进线性度的方法。采用TSMC 0.18 μm CMOS RF工艺进行了设计。后仿真结果表明,在功耗为1.8 mW时,最高增益为35 dB,对应的噪声系数为1.96 dB;最低增益为5 dB,对应的输入3阶交调点为3.2 dBm。 相似文献
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基于0.35μm BCD工艺,设计了一款面向宽输出电压范围Buck变换器的DCR电流采样电路。内含电平位移电路与浮动电压产生电路,可以在宽电压范围内正常工作,满足启动、短路保护、高占空比等多种工作条件下的电流采样。仿真结果显示,所提出的DCR电流采样电路应用于输出电压为2.5~24V、开关频率为100k Hz~1MHz的Buck变换器中时,DCR电流采样电路的增益为15.4d B,-3 d B带宽为9.35 MHz,输入电压范围为0~24 V,实现了精准稳定的电感电流采样功能。 相似文献
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Mixed-signal or analog chips often require a wide range of biasing currents that are independent of process and supply voltage and that are proportional to absolute temperature. This paper describes CMOS circuits that we use to generate a set of fixed bias currents typically spanning six decades at room temperature down to a few times the transistor off-current. A bootstrapped current reference with a new startup and power-control mechanism generates a master current, which is successively divided by a current splitter to generate the desired reference currents. These references are nondestructively copied to form the chip’s biases. Measurements of behavior, including temperature effects from 1.6 and 0.35 μ implementations, are presented and nonidealities are investigated. Temperature dependence of the transistor off-current is investigated because it determines the lower limit for generated currents. Readers are directed to a design kit that allows easy generation of the complete layout for a bias generator with a set of desired currents for scalable MOSIS CMOS processes.Tobi Delbrück is a group leader at the Inst. of Neuuroinformatics (INI), part of ETH Zurich and the University of Zurich, Switzerland. His main interest is in developing application-specific low-power vision sensor chips. In 1993 he graduated with a PhD in Computation and Neural Systems from Caltech, where he worked in Carver Mead’s laboratory. He co-invented with Mead a widely-used adaptive photoreceptor circuit and invented the bump circuit. Subsequently he worked for several years for Arithmos, Synaptics, National Semiconductor, and Foveon, where he was one of the founding employees. In 1998 he moved to Switzerland to join INI. In 2002 he was lead developer of a tactile luminous floor used in INI’s exhibit “Ada: Playful Intelligent Space” experienced by more than a half million visitors to the Swiss National Exhibition. He has been awarded 7 patents, and has written or coauthored 8 journal papers, 14 peer-reviewed conference papers, 4 book chapters, and 1 book.André van Schaik obtained his M.Sc. in electronics from the University of Twente in 1990. In 1991–1994he worked at CSEM, Neuchâtel, Switzerland, in the Advanced Research group of prof. Eric Vittoz. In this period he designed several analogue VLSI chips for perceptive tasks, some of which have been industrialised. A good example of such a chip is the artificial, motion detecting, retina in Logitech’s Trackman Marble TM.From 1994 until 1998, he was a research assistant and Ph.D. student with Prof. Vittoz at the Swiss Federal Institute of Technology in Lausanne (EPFL). The subject of his Ph.D. research was the development of analogue VLSI models of the auditory pathway. In 1998 he was a post-doctorate research fellow at the Auditory Neuroscience Laboratory at the University of Sydney.In April 1999 he became a Senior Lecturer in Computer Engineering for the School of Electrical & Information Engineering at the University of Sydney. He is now a Reader in the same School and Head of the Computing and Audio Research Laboratory. His research interests include analogue VLSI, neuromorphic systems, wireless sensor networks, human sound localisation, and virtual reality audio systems. 相似文献
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为提高发光二极管(LED)驱动电路恒流稳定性,设计一种基于原边反馈反激变换器的数字恒流源作为驱动电路。采用数字软启动电路消除浪涌电流,避免了输出电压过冲。软开关技术的应用使得系统在整个恒流范围内的平均效率高达80.49%。逐周期的峰值电流控制实现了恒流输出。基于SMIC 0.18 μm CMOS工艺进行物理设计,版图面积为14 370 μm2。仿真结果表明,该LED驱动电路可根据用户需求,通过调整电路参数,在提高输出电流稳定性的基础上实现400~1 000 mA的恒流输出,输出电流纹波仅为0.28%。 相似文献
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基于栅压控制MOS管等效电阻实现放大器输出电阻和射极电阻同时改变的原理,构造一种新型可变增益放大器,通过控制电路和稳压电路提高了增益动态范围和电路稳定性。采用UMC0.5μm BiCMOS工艺,使用HSpice软件仿真,结果表明该放大器可在0-70μA的较小控制电流下实现增益在0-66dB宽范围内连续变化,带宽超过73MHz,具有良好的线性度。 相似文献
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高精度宽量程智能电流源的设计 总被引:4,自引:0,他引:4
介绍了一种闭环智能电流源的设计。该系统以单片机为中心,通过闭环控制、PID算法以实现高精度、宽量程,同时通过串行通讯口连接PC机或系统自带键盘的控制,实现了电流可预置、可步进调整、输出的电流信号可直接数字显示的功能。该电流源的性能稳定、带负载能力强,为实验教学的自动化测量提供了条件。 相似文献
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提出了一种具有宽电流可调谐范围的新型CMOS电调谐第二代电流传输器( ECCII),通过引入基于差分差动电流传输器( DDCC)的对数反对数电流放大器,使电流增益通过偏置电流连续可调,在一定偏置电流下,调节系数0相似文献