共查询到20条相似文献,搜索用时 218 毫秒
1.
针对塑封电子元器件的密封可靠性问题,本文通过研究高温高湿贮存环境中塑封器件的水汽含量变化、测试试验后电子元器件的电气性能以及在不同高温高湿环境条件下对于器件的影响。结果表明:对电子器件水煮后测试其电性能,在正向电压下电子元器件的漏电流会增大,其他电学性能无太大变化;水煮实验对比其他高温高湿贮存条件更加严酷,可以快速缩短半导体器件内部水汽含量饱和时间;水煮实验与恒定湿热实验存在等价关系,通过加压水煮更能缩短器件贮存实验时间。 相似文献
2.
随着塑封器件在武器系统使用越来越广泛,各种假冒、翻新塑封器件也随之涌入进来,这些假冒、翻新器件一旦安装到型号产品上将给产品的可靠性带来巨大的风险。本文对假冒、伪劣塑封器件进行了分类,并通过对工作中接触到的各种假冒、翻新塑封器件特征进行整理、分析,总结出识别假冒、翻新塑封器件的方法。 相似文献
3.
器件由于内部芯片失效而产生IGBT故障,且检测保护困难,大多只能在系统外特性上加以防护,本体还是会受较大损害。高压大功率IGBT模块内部由多芯片和大量键合线构成,器件功能失效很大部分是由铝键合线脱落或者断裂引起的。提早发现或辨知此类缺陷或失效导致的电气特性变化,是构建IGBT故障的先导判据条件,有利于规避潜在故障风险,提高IGBT利用可靠性。针对英飞凌6.5kV多芯片并联封装IGBT模块的布局结构和连接特点,分析连接寄生参数差异对芯片工作状态的影响。以模块内部芯片间键合线的杂散电感和栅极电容参数为研究对象,利用最小二乘法参数辨识机制,构建一种区分模块缺陷与失效的先导判据。研究IGBT模块和元胞栅极等效电路,分析键合线故障导致的电路参数和工作特性变化,通过采样栅极电压与电流数据,利用最小二乘法参数估计得到故障类型及杂散参数数值,通过仿真与实验验证了该方法的有效性。 相似文献
4.
无压低温银烧结技术是高功率密度SiC器件的无铅化关键互连技术,对SiC功率模块的可靠性提升具有重要的意义。针对典型Si基功率模块封装连接工艺及其可靠性,阐述了当前无压低温纳米银烧封装技术的进展与思考:(1)讨论了电力电子器件封装连接可靠性的典型风险和原因;(2)介绍了无压低温连接技术的最新发展;(3)基于Si基典型功率模块封装向高可靠SiC功率模块转变过程中在封装结构和材料方面的需求,阐述了无压低温银烧结技术在引线型、平面型和双面冷却功率模块封装方面的进展;(4)提出无压低温银烧结技术当前有待解决的技术难题。 相似文献
5.
MOSFET是实现电力电子装置功能的核心器件,但其寿命短是制约电力电子系统可靠性的关键因素。由老化造成的MOSFET失效分为封装失效和参数漂移失效,前者由MOSFET制造工艺及材料导致的缺陷在工作环境中恶化而产生,后者为器件在使用过程中其内部微观退化机制在宏观参数的体现。对目前已有的MOSFET寿命相关的研究成果进行总结,分析了MOSFET的各类失效模式,并建立了各类失效模式下MOSFET寿命模型;并进一步总结了各类失效模式下寿命模型的失效判据及其各类寿命预测模型实验验证方法。 相似文献
6.
本文论述了细线PCB组装引起的特别挑战和电子封装测试技术方面的改进,简要说明了一些测试方法诸如在线测试(ICT)、自动X射线测试(AXI)和扫描声学显微镜检测(SAM),最后表明了现代封装技术(FC、CSP)及其与之并驾齐驱的封装测试技术的发展前景。 相似文献
7.
8.
9.
《中国电机工程学报》2019,(12)
高压大功率压接型IGBT器件具有功率密度大、寄生电感低、双面散热、失效短路等优点,是用于智能电网、轨道交通等高压大功率电压源换流装备的理想器件。该文对ABB、Fuji、Toshiba、Westcode等公司的压接型IGBT器件封装技术路线进行介绍和分析,并对现有商业化大功率压接型IGBT器件的特性进行对比。综合已有压接型IGBT器件封装技术的特点与试验测量结果,提出将封装关键技术分为3个部分,并简要介绍各个部分的具体关键技术及研究现状。最后,基于压接型IGBT封装技术特点,结合实际工艺要求,提出一种评估压接型IGBT器件性能的判据,为后续压接型IGBT器件的开发与设计提供参考。 相似文献
10.
11.
12.
13.
14.
15.
Guotao Wang Merrill C. Jie-Hua Zhao Groothuis S.K. Ho P.S. 《Device and Materials Reliability, IEEE Transactions on》2003,3(4):119-128
Chip-packaging interaction is becoming a critical reliability issue for Cu/low-k chips during assembly into a plastic flip-chip package. With the traditional TEOS interlevel dielectric being replaced by much weaker low-k dielectrics, packaging induced interfacial delamination in low-k interconnects has been widely observed, raising serious reliability concerns for Cu/low-k chips. In a flip-chip package, the thermal deformation of the package can be directly coupled into the Cu/low-k interconnect structure inducing large local deformation to drive interfacial crack formation. In this paper, we summarize experimental and modeling results from studies performed in our laboratory to investigate the chip-package interaction and its impact on low-k interconnect reliability. We first review the experimental techniques for measuring thermal deformation in a flip-chip package and interfacial fracture energy for low-k interfaces. Then results from three-dimensional finite element analysis (FEA) based on a multilevel submodeling approach in combination with high-resolution moire/spl acute/ interferometry to investigate the chip-package interaction for low-k interconnects are discussed. Packaging induced crack driving forces for relevant interfaces in Cu/low-k structures are deduced and compared with corresponding interfaces in Cu/TEOS and Al/TEOS structures to assess the effect of ILD on packaging reliability. Our results indicate that packaging assembly can significantly impact wafer-level reliability causing interfacial delamination to become a serious reliability concern for Cu/low-k structures. 相似文献
16.
This paper focuses on advancements in three areas of analyzing interfaces, namely, acoustic microscopy for detecting damage to closely spaced interfaces, thermal imaging to detect damage and degradation of thermal interface materials and laser spallation, a relatively new concept to understand the strength of interfaces. Acoustic microscopy has been used widely in the semiconductor assembly and package area to detect delamination, cracks and voids in the package, but the resolution in the axial direction has always been a limitation of the technique. Recent advancements in acoustic waveform analysis has now allowed for detection and resolution of closely spaced interfaces such as layers within the die. Thermal imaging using infrared (IR) thermography has long been used for detection of hot spots in the die or package. With recent advancements in very high-speed IR cameras, improved pixel resolution, and sophisticated software programming, the kinetics of heat flow can now be imaged and analyzed to reveal damage or degradation of interfaces that are critical to heat transfer. The technique has been demonstrated to be useful to understand defects and degradation of thermal interface materials used to conduct heat away from the device. Laser spallation is a method that uses a short duration laser pulse to cause fracture at the weakest interface and has the ability to measure the adhesion strength of the interface. The advantage of this technique is that it can be used for fully processed die or wafers and even on packaged devices. The technique has been used to understand interfaces in devices with copper metallization and low-k dielectrics. 相似文献
17.
18.
Hartfield C.D. Ogawa E.T. Young-Joon Park Tz-Cheng Chiu Honglin Guo 《Device and Materials Reliability, IEEE Transactions on》2004,4(2):129-141
Multiple new materials are being adopted by the semiconductor industry at a rapid rate for both semiconductor devices and packages. These advances are driving significant investigation into the impact of these materials on device and package reliability. Active investigation is focused on the impact of back-end-of-line (BEOL) processing on Cu/low-k reliability. This paper discusses Cu/low-k BEOL interfacial reliability issues and relates key items from the assembly process and packaging viewpoint that should be managed in order to prevent adverse assembly impact on BEOL interfacial reliability. Reliability failure mechanisms discussed include interface diffusion-controlled events such as the well-known example of Cu electromigration (EM), as well as stress-migration voiding. Interface defectivity impact on dielectric breakdown and leakage is discussed. Lastly, assessments of assembly impact on these Cu/low-k interfacial concerns are highlighted. 相似文献
19.
输配电线路带电作业技术的研究与发展 总被引:9,自引:7,他引:9
随着电网快速发展和特高压输电技术的研究及应用,为迎接我国带电作业的新发展,简述了国内外带电作业的发展历史和概况,探讨了带电作业的发展趋势和方向,分析和论述了近年来在研究和应用中涉及较多的如带电作业安全距离、带电作业保护间隙、带电作业工具、1000 kV特高压带电作业、配电线路带电作业等问题。另外,介绍了带电作业标准的制订情况。并提出了随着电网的快速发展和供电可靠性要求的提高,带电作业也出现了一系列新的研究课题,需在总结我国带电作业特点和经验的基础上,结合安全运行的实际需要,进一步加强先进技术的研究和标准制订工作。 相似文献