一种可扩展的双层光互连网络设计与分析

本文设计一种具有可扩展性的双层并行光互连网络.顶层为数字路由结点和光网络接口卡组成的星型网,底层为光网络接口卡连接而成的环形网.结点机以及数字路由结点影响网络的性能.结点机的吞吐能力限制了整个网络的吞吐率;扩展PCI总线的位数能够提高光网络接口卡的吞吐速率,采用64bit/66MHz工作模式可获得4.224 Gbps峰值传输速率.网络的实际最大吞吐速率为8.448Gbps,环网内平均延迟2195ns,环网间平均延迟4713 ns.可以采用本文设计的数字路由结点对网络进行低成本级联扩展,扩展后网络性能显著提高.     

Incrementally scalable optical interconnection network with a constant degree and constant diameter for parallel computing

A new scalable interconnection topology called the spanning-bus connected hypercube (SBCH) that is suitable for massively parallel systems is proposed. The SBCH uses the hypercube topology as a basic building block and connects such building blocks by use of multidimensional spanning buses. In doing so, the SBCH combines positive features of both the hypercube (small diameter, high connectivity, symmetry, simple routing, and fault tolerance) and the spanning-bus hypercube (SBH) (constant node degree, scalability, and ease of physical implementation), while at the same time circumventing their disadvantages. The SBCH topology permits the efficient support of many communication patterns found in different classes of computation, such as bus-based, mesh-based, and tree-based problems, as well as hypercube-based problems. A very attractive feature of the SBCH network is its ability to support a large number of processors while maintaining a constant degree and a constant diameter. Other positive features include symmetry, incremental scalability, and fault tolerance. An optical implementation methodology is proposed for the SBCH. The implementation methodology combines the advantages of free-space optics with those of wavelength-division multiplexing techniques. An analysis of the feasibility of the proposed network is also presented.     

Scalable optical hypercube-based interconnection network for massively parallel computing

Two important parameters of a network for massively parallel computers are scalability and modularity. Scalability has two aspects: size and time (or generation). Size scalability refers to the property that the size of the network can be increased with nominal effect on the existing configuration. Also, the increase in size is expected to result in a linear increase in performance. Time scalability implies that the communication capabilities of a network should be large enough to support the evolution of processing elements through generations. A modular network enables the construction of a large network out of many smaller ones. The lack of these two important parameters has limited the use of certain types of interconnection networks in the area of massively parallel computers. We present a new modular optical interconnection network, called an optical multimesh hypercube (OMMH), which is both size and time scalable. The OMMH combines positive features of both the hypercube (small diameter, high connectivity, symmetry, simple routing, and fault tolerance) and the torus (constant node degree and size scalability) networks. Also presented is a three-dimensional optical implementation of the OMMH network. A basic building block of the OMMH network is a hypercube module that is constructed with free-space optics to provide compact and high-density localized hypercube connections. The OMMH network is then constructed by the connection of such basic building blocks with multiwavelength optical fibers to realize torus connections. The proposed implementation methodology is intended to exploit the advantages of both space-invariant free-space and multiwavelength fiber-based optical interconnect technologies. The analysis of the proposed implementation shows that such a network is optically feasible in terms of the physical size and the optical power budget.     

Feasibility study of a scalable optical interconnection network for massively parallel processing systems

The theoretical modeling of a novel topology for scalable optical interconnection networks, called optical multimesh hypercube (OMMH), is developed to predict size, bit rate, bit-error rate, power budget, noise, efficiency, interconnect distance, pixel density, and misalignment sensitivity. The numerical predictions are validated with experimental data from commercially available products to assess the effects of various thermal, system, and geometric parameters on the behavior of the sample model. OMMH is a scalable network architecture that combines positive features of the hypercube (small diameter, regular, symmetric, and fault tolerant) and the mesh (constant node degree and size scalability). The OMMH is implemented by a free-space imaging system incorporated with a space-invariant hologram for the hypercube links and fiber optics to provide the mesh connectivity. The results of this work show that the free-space links can operate at 368 Mbits/s and the fiber-based links at 228 Mbits/s for a bit-error rate of 10(-17) per channel. The predicted system size for 32 nodes in the OMMH is 4.16 mm × 4.16 mm × 3.38 cm. Using 16-bit, bit-parallel transmission per node, the system can operate at a bit rate of up to 5.88 Gbits/s for a size of 1.04 cm × 1.04 cm × 3.38 cm.     

Beam-array combination with planar integrated optics for three-dimensional multistage interconnection networks

We propose a configuration of planar integrated optics for three-dimensional multistage interconnection networks. To show the feasibility of cascading operations in the planar integrated optics, we present experimental results on the beam combination of signal- and power-beam arrays at a node stage. The beam-combination efficiency measured in the experiment is ~42% of the theoretical limit.     

Optical implementation of rearrangeable nonblocking double banyan interconnection network in free space

The banyan network plays an important role in optical interconnection networks. A smart and compact double banyan network with cascading banyan network and inverse banyan network is proposed by using a polarizing beam-splitter (PBS), a phase spatial light modulator (PSLM), a half-wave plate (HWP), a double-faced reflective mirror (DFRM), and mirrors. The PBS features that the s-component (perpendicular to the incident plane) of the incident light beam is reflected, and the p-component (parallel to the incident plane) passes through it. Simultaneously, the bipartition graph algorithm (BGA) is adopted to ascertain the state of the node switch in each node stage (straight or crossover connection). According to switching logic, under control of external electrical signals, the PSLM functions to control routing paths of the signal beams, i.e. the polarization of each optical signal is rotated or not rotated 90° by a programmable PSLM. Since the proposed optical setup consists of only optical polarization elements, it is compact in structure, and possesses a low energy loss, a high signal-to-noise ratio and an available large number of optical channels. Finally, the discussions and the experimental results show that the double banyan network proposed here, owing to without signal blocking and conflict, may be used in optical communication and optical information processing.     

Elements of a hybrid interconnection theory

We present a textbooklike treatment of hybrid systems employing both optical and electrical interconnections. We investigate how these two different interconnection media can be used in conjunction to realize a system not possible with any alone. More specifically, we determine the optimal mix of optical and normally conducting interconnections maximizing a given figure-of-merit function. We find that optical interconnections have relatively little to offer if the optical paths are constrained to lie on a plane (such as in an integrated optics system). However, if optical paths are permitted to leave the plane, they may enable considerable increase in performance. In any event the prize in terms of performance is accompanied by a penalty in terms of system power and/or size.     

Compact polarization-based all-optical interconnection systems with growth capability

All-optical communication requires all-optical interconnections, thus leading to reliable, fast, and flexible modular communication means in future systems. Free-space approaches are advantageous since they fully use the two dimensions optics offer. A folded architecture based on a polarization code is proposed for dynamic optical interconnection. The suggested systems are compact and appropriate for both intracomputer and intercomputer communication. The modularity of the proposed architecture is presented, and a growth rule for the fully connected versions of the system is introduced. The proposed approach significantly reduces both the price of the interconnection systems and their complexity. Presented are 4 x 4 and 8 x 8 fully connected switches, a rearrangeable nonblocking 4 x 4 switch, and a crossbar architecture.     

Three-dimensional optoelectronic stacked processor by use of free-space optical interconnection and three-dimensional VLSI chip stacks

We present a demonstration system under the three-dimensional (3D) optoelectronic stacked processor consortium. The processor combines the advantages of optics in global, high-density, high-speed parallel interconnections with the density and computational power of 3D chip stacks. In particular, a compact and scalable optoelectronic switching system with a high bandwidth is designed. The system consists of three silicon chip stacks, each integrated with a single vertical-cavity-surface-emitting-laser-metal-semiconductor-metal detector array and an optical interconnection module. Any input signal at one end stack can be switched through the central crossbar stack to any output channel on the opposite end stack. The crossbar bandwidth is designed to be 256 Gb/s. For the free-space optical interconnection, a novel folded hybrid micro-macro optical system with a concave reflection mirror has been designed. The optics module can provide a high resolution, a large field of view, a high link efficiency, and low optical cross talk. It is also symmetric and modular. Off-the-shelf macro-optical components are used. The concave reflection mirror can significantly improve the image quality and tolerate a large misalignment of the optical components, and it can also compensate for the lateral shift of the chip stacks. Scaling of the macrolens can be used to adjust the interconnection length between the chip stacks or make the system more compact. The components are easy to align, and only passive alignment is required. Optics and electronics are separated until the final assembly step, and the optomechanic module can be removed and replaced. By use of 3D chip stacks, commercially available optical components, and simple passive packaging techniques, it is possible to achieve a high-performance optoelectronic switching system.     

Free-space parallel multichip interconnection system

A parallel data-communication scheme is described for interchip communication with free-space optics. We present a proof-of-concept and feasibility demonstration of a practical modular packaging approach in which free-space optical interconnect modules can be simply integrated on top of an electronic multichip module (MCM). Our packaging architecture is based on a modified folded 4-f imaging system that is implemented with off-the-shelf optics, conventional electronic packaging techniques, and passive assembly techniques to yield a potentially low-cost packaging solution. The prototype system, as built, supports 48 independent free-space channels with eight separate laser and detector chips, in which each chip consists of a one-dimensional array of 12 devices. All chips are assembled on a single ceramic carrier together with three silicon complementary metal-oxide semiconductor chips. Parallel optoelectronic (OE) free-space interconnections are demonstrated at a speed of 200 MHz. The system is compact at only 10 in.(3) (~164 cm(3)) and is scalable because it can easily accommodate additional chips as well as two-dimensional OE device arrays for increased interconnection density.     

Algorithm for optimizing bipolar interconnection weights with applications in associative memories and multitarget classification

An algorithm for optimizing a bipolar interconnection weight matrix with the Hopfield network is proposed. The effectiveness of this algorithm is demonstrated by computer simulation and optical implementation. In the optical implementation of the neural network the interconnection weights are biased to yield a nonnegative weight matrix. Moreover, a threshold subchannel is added so that the system can realize, in real time, the bipolar weighted summation in a single channel. Preliminary experimental results obtained from the applications in associative memories and multitarget classification with rotation invariance are shown.     

Experimental demonstration of the optical multi-mesh hypercube: scaleable interconnection network for multiprocessors and multicomputers

A prototype of a novel topology for scaleable optical interconnection networks called the optical multi-mesh hypercube (OMMH) is experimentally demonstrated to as high as a 150-Mbit/s data rate (2(7) - 1 nonreturn-to-zero pseudo-random data pattern) at a bit error rate of 10(-13)/link by the use of commercially available devices. OMMH is a scaleable network [Appl. Opt. 33, 7558 (1994); J. Lightwave Technol. 12, 704 (1994)] architecture that combines the positive features of the hypercube (small diameter, connectivity, symmetry, simple routing, and fault tolerance) and the mesh (constant node degree and size scaleability). The optical implementation method is divided into two levels: high-density local connections for the hypercube modules, and high-bit-rate, low-density, long connections for the mesh links connecting the hypercube modules. Free-space imaging systems utilizing vertical-cavity surface-emitting laser (VCSEL) arrays, lenslet arrays, space-invariant holographic techniques, and photodiode arrays are demonstrated for the local connections. Optobus fiber interconnects from Motorola are used for the long-distance connections. The OMMH was optimized to operate at the data rate of Motorola's Optobus (10-bit-wide, VCSEL-based bidirectional data interconnects at 150 Mbits/s). Difficulties encountered included the varying fan-out efficiencies of the different orders of the hologram, misalignment sensitivity of the free-space links, low power (1 mW) of the individual VCSEL's, and noise.     

Topologies for optical interconnection networks based on the optical transpose interconnection system

Many results exist in the literature describing technological and theoretical advances in optical network topologies and design. However, an essential effort has yet to be made in linking those results together. We propose a step in this direction by giving optical layouts for several graph-theoretical topologies studied in the literature, using the optical transpose interconnection system (OTIS) architecture. These topologies include the family of partitioned optical passive star (POPS) and stack-Kautz networks as well as a generalization of the Kautz and the de Bruijn digraphs.     

Performance scaling comparison for free-space optical and electrical interconnection approaches

Projected performance metrics of free-space optical and electrical interconnections are estimated and compared in terms of smart-pixel input-output bandwidth density and practical geometric packaging constraints. The results suggest that three-dimensional optical interconnects based on smart pixels provide the highest volume, latency, and power-consumption benefits for applications in which globally interconnected networks are required to implement links across many integrated-circuit chips. It is further shown that interconnection approaches based on macro-optical elements achieve better scaling than those based on micro-optical elements. The scaling limits of micro-optical-based architectures stem from the need for repeaters to overcome diffraction losses in multichip architectures with high bisection bandwidth. The overall results provide guidance in determining whether and how strongly a free-space optical interconnection approach can be applied to a given multiprocessor problem.     

Locality and decomposition of regular optical interconnection patterns

Methods that a designer can use to optimize the placement of nodes in a large switching network to decrease the requirements on holographic interconnections are investigated. Localized interconnections between subdivided switches are combined with simpler global interconnections. The interconnections between subdivided switches can be implemented by use of metallic traces on smart-pixel arrays. The global interconnections would be provided by optical free-space techniques. Several advantages arise from this procedure: (1) The regular interconnection pattern is decomposed into several pipes (collection of light beams that form a complete pattern) without loss of functionality. (2) The interconnection pattern may be optimized by variation of the placement of the switches in a switching network (e.g., to obtain a minimum deflection angle). (3) The interconnection pattern may be adjusted to the need of an algorithm by an additional parameter (the dimension). The application to photonic switching networks and signal processing is discussed.     

Highly efficient interconnection for use with a multistage optical switching network with orthogonally polarized data and address information

A novel optical interconnection is introduced for a multistage optical switching network that uses orthogonally polarized data and address information. The network is unique in that the data information is never regenerated and remains in optical form throughout (i.e., it is never converted into electrical information). This has two main consequences: (1) the bandwidth of the data is not restricted by electrical circuit considerations, and (2) the optical interconnections from one stage of the network to the next must be highly efficient. The interconnection meets several goals: high efficiency, preservation of cross polarization of data and address, low cross talk between polarizations, good manufacturability, resistance to misalignment caused by thermal expansion, and absence of significant aberrations. In addition, sychronization of the signals is maintained, as the optical path lengths for all routes through the system are equal.     

All-optical packet-switched interconnection network based on modular photonic digital processing

Future interconnection networks will be required to achieve ultra-high bandwidth and low latency communications to cope with the increasing performance requirements of backbone routers, large data storage systems and supercomputing systems. Aiming at achieving ultra-high bandwidth communications and approaching optical time-of-flight processing latency while being robust to cascade impairments, the authors propose an all-optical packet-switched interconnection network, where not only the actual packet switching but also the packet processing is performed in the photonic domain. The authors present two modular architectures, based on the crossbar and the Batcher?Banyan topologies, capable of forwarding fixed-length packets with two classes of service. Both use photonic digital-processing subsystems built by combining a single integrable module which exploits cross gain modulation in a semiconductor optical amplifier. System level simulations on the crossbar switch controller guarantee that the control signals maintain an acceptable quality during the processing. Moreover, the Batcher? Banyan configuration is more cost-effective than the crossbar for increasing port count, while effective network performance in terms of packet loss rate can be obtained by adding just few recirculating delay lines.     

Time multiplexing and control for optical cellular-hypercube arrays

We discuss the cellular-hypercube optical free-space interconnection architecture and its implementation by two-dimensional smart-pixel optoelectronic cellular arrays. We emphasize the behavior of the cellular hypercube in performing shift-invariant parallel shifts of data, a basic requirement of most single-instruction multiple-data algorithms. We present a time-multiplexing scheme for realizing the cellular hypercube, showing that the communication time is inversely proportional to the number of optical detectors per cell. We also present an improved hybrid interconnection network with improved performance that combines the cellular hypercube and mesh, using optics for the longer-distance connections and electronics for nearest-neighbor connections.     

Generalized methodology for modeling and simulating optical interconnection networks using diffraction analysis

Research in the field of free-space optical interconnection networks has reached a point where simulators and other design tools are desirable for reducing development costs and for improving design time. Previously proposed methodologies have only been applicable to simple systems. Our goal was to develop a simulation methodology capable of evaluating the performance characteristics for a variety of different free-space networks under a range of different configurations and operating states. The proposed methodology operates by first establishing the optical signal powers at various locations in the network. These powers are developed through the simulation by diffraction analysis of the light propagation through the network. After this evaluation, characteristics such as bit-error rate, signal-to-noise ratio, and system bandwidth are calculated. Further, the simultaneous evaluation of this process for a set of component misalignments provides a measure of the alignment tolerance of a design. We discuss this simulation process in detail as well as provide models for different optical interconnection network components.     

Design and implementation of a modulator-based free-space optical backplane for multiprocessor applications

Design and implementation of a free-space optical backplane for multiprocessor applications is presented. The system is designed to interconnect four multiprocessor nodes that communicate by using multiplexed 32-bit packets. Each multiprocessor node is electrically connected to an optoelectronic VLSI chip which implements the hyperplane interconnection architecture. The chips each contain 256 optical transmitters (implemented as dual-rail multiple quantum-well modulators) and 256 optical receivers. A rigid free-space microoptical interconnection system that interconnects the transceiver chips in a 512-channel unidirectional ring is implemented. Full design, implementation, and operational details are provided.